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Change subject: security/tpm: Retrieve factory configuration for device w/ Google TPM
......................................................................
Patch Set 6: Code-Review+2
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Hello Eric Lai, Kapil Porwal, Shelley Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: vendorcode/google/chromeos: Add API for Chromebook Plus check
......................................................................
vendorcode/google/chromeos: Add API for Chromebook Plus check
This patch implements an API which relies on the
chromeos_get_factory_config() function to retrieve the factory
config value.
This information is useful to determine whether a ChromeOS device
is branded as a Chromebook Plus based on specific bit flags:
- Bit 4 (0x10): Indicates whether the device chassis has the
"chromebook-plus" branding.
- Bits 3-0 (0x1): Must be 0x1 to signify compliance with
Chromebook Plus hardware specifications.
BUG=b:317880956
TEST=Able to verify that google/screebo is branced as
Chromebook Plus.
Change-Id: Iebaed1c60e34af4cc36316f1f87a89df778b0857
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/vendorcode/google/chromeos/chromeos.h
M src/vendorcode/google/chromeos/tpm_factory_config.c
2 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/79763/2
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I'd like you to reexamine a change. Please visit
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Change subject: vendorcode/google/chromeos: Add API to read factory config
......................................................................
vendorcode/google/chromeos: Add API to read factory config
This code leverages the TPM vendor-specific function
tlcl_cr50_get_factory_config() to fetch the device's factory
configuration.
BUG=b:317880956
TEST=Able to retrieve the factory config from google/screebo.
Change-Id: I34f47c9a94972534cda656ef624ef12ed5ddeb06
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/vendorcode/google/chromeos/Makefile.inc
M src/vendorcode/google/chromeos/chromeos.h
A src/vendorcode/google/chromeos/tpm_factory_config.c
3 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/79737/7
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I'd like you to reexamine a change. Please visit
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Change subject: security/tpm: Retrieve factory configuration for device w/ Google TPM
......................................................................
security/tpm: Retrieve factory configuration for device w/ Google TPM
This patch enables retrieval of factory configuration data from
Google TPM devices (both Cr50 and Ti50).
This patch utilizes vendor-specific command
TPM2_CR50_SUB_CMD_GET_FACTORY_CONFIG (68).
The factory config space is a 64-bit, one-time programmable.
For the unprovisioned one, the read will be 0x0.
BUG=b:317880956
TEST=Able to retrieve the factory config from google/screebo.
Change-Id: Ifd0e850770152a03aa46d7f8bbb76f7520a59081
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/security/tpm/tss/tcg-2.0/tss_marshaling.c
M src/security/tpm/tss/tcg-2.0/tss_structures.h
M src/security/tpm/tss/vendor/cr50/cr50.c
M src/security/tpm/tss/vendor/cr50/cr50.h
4 files changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/79736/6
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Change subject: security/tpm: Retrieve factory configuration for device w/ Google TPM
......................................................................
Patch Set 5:
(3 comments)
File src/security/tpm/tss/tcg-2.0/tss_structures.h:
https://review.coreboot.org/c/coreboot/+/79736/comment/0a8df00e_e4c539fb :
PS5, Line 361: uint64_t factory_config;
> Why are you doing it like this? Unless I'm missing something here I think you should just put it ins […]
Acknowledged
File src/security/tpm/tss/vendor/cr50/cr50.c:
https://review.coreboot.org/c/coreboot/+/79736/comment/4109e8d1_754487ac :
PS5, Line 186: printk(BIOS_INFO, "Reading factory config\n");
> Actually, the caching would probably better be done in chromeos_get_factory_config(), if anything.
Acknowledged
https://review.coreboot.org/c/coreboot/+/79736/comment/dc555c32_5390da56 :
PS5, Line 196: * ladder.
> Is this actually relevant to this command and its use case? Why would the key ladder be disabled her […]
Acknowledged
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Change subject: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
File src/northbridge/intel/sandybridge/mrc_wrapper.S:
https://review.coreboot.org/c/coreboot/+/79754/comment/b474cd14_fe083497 :
PS2, Line 37: mrc_console_wrapper:
: /* Set up new stack frame */
: pushal
: mov %esp, %ebp
:
: /* Align stack and make space for arguments */
: andl $0xfffffff0, %esp
: subl $8, %esp
:
: /* Get argument */
: movl 36(%ebp), %eax
: push %eax
:
: /* Get function to call */
: mov $do_putchar, %eax
: push %eax
:
: /*
: * Elevate to long mode. As 2nd and 3rd argument are unused they
: * haven't been pushed to the stack.
: */
: call long_mode_call_3arg
:
: /* Restore stack pointer */
: mov %ebp, %esp
: popal
FSP also has callbacks into coreboot. Would it make sense to turn this in a macro to generate these wrappers for callbacks?
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Change subject: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64
......................................................................
Patch Set 2: Code-Review+2
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Change subject: cpu/x86/64bit/mode_switch: Simplify assembly code
......................................................................
Patch Set 2: Code-Review+2
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Hello Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
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Change subject: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
......................................................................
northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
Enable x86_64 support for MRC.bin:
- Add a wrapper function for console printing that calls into
long mode to call native do_putchar
- Remove Kconfig guard for x86_64 when MRC is being used
Tested: Booted Lenovo X220 using mrc.bin under x86_64 and
MRC is able to print to the console.
Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/cpu/intel/model_206ax/Kconfig
M src/northbridge/intel/sandybridge/mrc_wrapper.S
M src/northbridge/intel/sandybridge/raminit_mrc.c
3 files changed, 42 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/79754/2
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