coreboot-gerrit December 2023

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[M] Change in coreboot[main]: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Attention is currently required from: Angel Pons, Patrick Rudolph. Hello Angel Pons, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79751?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 ...................................................................... northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 - Remove pointers in argument list passed to MRC to make sure the struct has the same size on x86_64 as on x86_32. - Add assembly wrapper to call the MRC with argument in EAX. - Wrap calling MRC in protected_mode_call_2arg, which is a stub on x86_32 Tested: Boots on Lenovo X220 using MRC in x86_32 and x86_64 mode. Change-Id: Id755e7381c5a94360e3511c53432d68b7687df67 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/northbridge/intel/sandybridge/Makefile.inc A src/northbridge/intel/sandybridge/mrc_wrapper.S M src/northbridge/intel/sandybridge/pei_data.h M src/northbridge/intel/sandybridge/raminit_mrc.c 4 files changed, 50 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/79751/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id755e7381c5a94360e3511c53432d68b7687df67 Gerrit-Change-Number: 79751 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79750?usp=email ) Change subject: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/79750?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc Gerrit-Change-Number: 79750 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: cpu/x86/64bit/mode_switch: Simplify assembly code
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79748?usp=email ) Change subject: cpu/x86/64bit/mode_switch: Simplify assembly code ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/79748?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30809453a1800ba3c0df60acd7eca778841c520f Gerrit-Change-Number: 79748 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: cpu/x86/64bit/mode_switch2: The reverse function to mode_switch
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79749?usp=email ) Change subject: cpu/x86/64bit/mode_switch2: The reverse function to mode_switch ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/79749?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib625233e5f673eae9f3dcb2d03004c06bb07b149 Gerrit-Change-Number: 79749 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79747?usp=email ) Change subject: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/79747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id755e7381c5a94360e3511c53432d68b7687df67 Gerrit-Change-Number: 79747 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[main]: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Attention is currently required from: Angel Pons. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79754?usp=email ) Change subject: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin ...................................................................... northbridge/intel/sandybridge: Enable x86_64 for mrc.bin Enable x86_64 support for MRC.bin: - Add a wrapper function for console printing that calls into long mode to call native do_putchar - Remove Kconfig guard for x86_64 when MRC is being used Tested: Booted Lenovo X220 using mrc.bin under x86_64 and MRC is able to print to the console. Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/cpu/intel/model_206ax/Kconfig M src/northbridge/intel/sandybridge/mrc_wrapper.S M src/northbridge/intel/sandybridge/raminit_mrc.c 3 files changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/79754/1 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 10c0ae3..649ef4e 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -1,7 +1,7 @@ config CPU_INTEL_MODEL_206AX bool select ARCH_X86 - select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT + select HAVE_EXP_X86_64_SUPPORT select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/northbridge/intel/sandybridge/mrc_wrapper.S b/src/northbridge/intel/sandybridge/mrc_wrapper.S index e169064..c92289c 100644 --- a/src/northbridge/intel/sandybridge/mrc_wrapper.S +++ b/src/northbridge/intel/sandybridge/mrc_wrapper.S @@ -26,3 +26,38 @@ popal ret + .section ".text.mrc_console_wrapper", "ax", @progbits + .globl mrc_console_wrapper + + /* + * Callback for MRC to print a character on the console. + * As MRC is x86_32 call into long mode and use the x86_64 + * function do_putchar to print to console. + */ +mrc_console_wrapper: + /* Set up new stack frame */ + pushal + mov %esp, %ebp + + /* Align stack and make space for arguments */ + andl $0xfffffff0, %esp + subl $8, %esp + + /* Get argument */ + movl 36(%ebp), %eax + push %eax + + /* Get function to call */ + mov $do_putchar, %eax + push %eax + + /* + * Elevate to long mode. As 2nd and 3rd argument are unused they + * haven't been pushed to the stack. + */ + call long_mode_call_3arg + + /* Restore stack pointer */ + mov %ebp, %esp + popal + ret \ No newline at end of file diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index d59aa86..0bcc817 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -52,6 +52,7 @@ /* Assembly functions: */ void mrc_wrapper(void *func_ptr, uint32_t arg1); +void mrc_console_wrapper(uint8_t byte); static void save_mrc_data(struct pei_data *pei_data) { @@ -155,7 +156,10 @@ } /* Pass console handler in pei_data */ - pei_data->tx_byte_ptr = (uintptr_t)do_putchar; + if (ENV_X86_64) + pei_data->tx_byte_ptr = (uintptr_t)mrc_console_wrapper; + else + pei_data->tx_byte_ptr = (uintptr_t)do_putchar; /* Locate and call UEFI System Agent binary. */ entry = cbfs_map("mrc.bin", NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/79754?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc Gerrit-Change-Number: 79754 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: cpu/x86/64bit/mode_switch2: The reverse function to mode_switch
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Attention is currently required from: Jérémy Compostella. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79753?usp=email ) Change subject: cpu/x86/64bit/mode_switch2: The reverse function to mode_switch ...................................................................... cpu/x86/64bit/mode_switch2: The reverse function to mode_switch Add another mode_switch assembly function to call x86_64 code from x86_32 code. This is particullary useful for BLOBs like mrc.bin or FSP that calls back into coreboot. Tested: - Called x86_64 code from x86_32 code in qemu. - Booted Lenovo X220 using x86_32 MRC using x86_64 console. Change-Id: Ib625233e5f673eae9f3dcb2d03004c06bb07b149 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/include/mode_switch.h M src/cpu/x86/64bit/Makefile.inc A src/cpu/x86/64bit/mode_switch2.S 3 files changed, 114 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/79753/1 diff --git a/src/arch/x86/include/mode_switch.h b/src/arch/x86/include/mode_switch.h index 4235db9..c2cbbf5 100644 --- a/src/arch/x86/include/mode_switch.h +++ b/src/arch/x86/include/mode_switch.h @@ -3,6 +3,27 @@ #include <stdint.h> #if ENV_X86_64 +static inline int long_mode_call(void *func) +{ + int (*doit)(void) = func; + + return doit(); +} + +static inline int long_mode_call_1arg(void *func, uint32_t arg1) +{ + int (*doit)(uint32_t arg1) = func; + + return doit(arg1); +} + +static inline int long_mode_call_2arg(void *func, uint32_t arg1, uint32_t arg2) +{ + int (*doit)(uint32_t arg1, uint32_t arg2) = func; + + return doit(arg1, arg2); +} + /* * Assembly code that drops into protected mode and calls the function * specified as first argument, which must have been compiled for x86_32. @@ -54,6 +75,55 @@ return protected_mode_call_3arg((uintptr_t)func, arg1, arg2, 0); } #else +/* + * Assembly function that elevates into long mode and calls the function + * specified as first argument, which must have been compiled for x86_64. + * After the function returns it enters protected mode again. + * The function pointer destination must be below 4GiB in physical memory. + * + * The called function has three arguments and returns an int. + */ +int long_mode_call_3arg(uint32_t func_ptr, + uint32_t opt_arg1, + uint32_t opt_arg2, + uint32_t opt_arg3); + +/* + * Elevates into long mode and calls the function, which must have been compiled for x86_64. + * After the function returns it enters protected mode again. + * The function pointer destination must be below 4GiB in physical memory. + * + * The called function doesn't have arguments and returns an int. + */ +static inline int long_mode_call(void *func) +{ + return long_mode_call_3arg((uintptr_t)func, 0, 0, 0); +} + +/* + * Elevates into long mode and calls the function, which must have been compiled for x86_64. + * After the function returns it enters protected mode again. + * The function pointer destination must be below 4GiB in physical memory. + * + * The called function has one argument and returns an int. + */ +static inline int long_mode_call_1arg(void *func, uint32_t arg1) +{ + return long_mode_call_3arg((uintptr_t)func, arg1, 0, 0); +} + +/* + * Elevates into long mode and calls the function, which must have been compiled for x86_64. + * After the function returns it enters protected mode again. + * The function pointer destination must be below 4GiB in physical memory. + * + * The called function has two arguments and returns an int. + */ +static inline int long_mode_call_2arg(void *func, uint32_t arg1, uint32_t arg2) +{ + return long_mode_call_3arg((uintptr_t)func, arg1, arg2, 0); +} + static inline int protected_mode_call(void *func) { int (*doit)(void) = func; diff --git a/src/cpu/x86/64bit/Makefile.inc b/src/cpu/x86/64bit/Makefile.inc index e1cf743..24a5a96 100644 --- a/src/cpu/x86/64bit/Makefile.inc +++ b/src/cpu/x86/64bit/Makefile.inc @@ -1,6 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-only all_x86-y += mode_switch.S +all_x86-y += mode_switch2.S # Add --defsym=_start=0 to suppress a linker warning. $(objcbfs)/pt: $(dir)/pt.S $(obj)/config.h diff --git a/src/cpu/x86/64bit/mode_switch2.S b/src/cpu/x86/64bit/mode_switch2.S new file mode 100644 index 0000000..0d39f50 --- /dev/null +++ b/src/cpu/x86/64bit/mode_switch2.S @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Calls a x86_64 function from x86_32 context */ + +.text +.code32 + .section ".text.long_mode_call_3arg", "ax", @progbits + .globl long_mode_call_3arg +long_mode_call_3arg: + + /* Backup registers */ + pushal + + /* Backup stack pointer */ + mov %esp, %ebp + + /* Enter long mode, preserves ebx */ + #include <cpu/x86/64bit/entry64.inc> + + /* Align stack */ + movabs $0xfffffffffffffff0, %rax + andq %rax, %rsp + + movl 36(%rbp), %ebx /* Function to call */ + movl 40(%rbp), %edi /* 1st arg */ + movl 44(%rbp), %esi /* 2nd arg */ + movl 48(%rbp), %edx /* 3rd arg */ + + call *%rbx + + /* Store return value on stack. popal will fetch it. */ + mov %eax, 28(%rbp) + shr $32, %rax + movl %eax, 24(%rbp) + + #include <cpu/x86/64bit/exit32.inc> + + /* Restore stack pointer */ + mov %ebp, %esp + + /* Restore registers */ + popal + + ret -- To view, visit https://review.coreboot.org/c/coreboot/+/79753?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib625233e5f673eae9f3dcb2d03004c06bb07b149 Gerrit-Change-Number: 79753 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: cpu/x86/64bit/mode_switch: Simplify assembly code
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79752?usp=email ) Change subject: cpu/x86/64bit/mode_switch: Simplify assembly code ...................................................................... cpu/x86/64bit/mode_switch: Simplify assembly code Drop the first argument specifying the number of arguments pushed to the stack. Instead always push the 3 arguments to stack and use the first one as function pointer to call while in protected mode. While on it add more comments and simplify register restore code. Tested: - On qemu can call x86_32 function and pass argument and return value. - Booted Lenovo X220 in x86_64 mode using x86_32 MRC. Change-Id: I30809453a1800ba3c0df60acd7eca778841c520f Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/include/mode_switch.h M src/cpu/x86/64bit/mode_switch.S 2 files changed, 45 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/79752/1 diff --git a/src/arch/x86/include/mode_switch.h b/src/arch/x86/include/mode_switch.h index 24efb1e..4235db9 100644 --- a/src/arch/x86/include/mode_switch.h +++ b/src/arch/x86/include/mode_switch.h @@ -3,10 +3,18 @@ #include <stdint.h> #if ENV_X86_64 -int protected_mode_call_narg(uint32_t arg_count, - uint32_t func_ptr, +/* + * Assembly code that drops into protected mode and calls the function + * specified as first argument, which must have been compiled for x86_32. + * After the function returns it enters long mode again. + * The function pointer destination must be below 4GiB in physical memory. + * + * The called function has 0-3 arguments and returns an int. + */ +int protected_mode_call_3arg(uint32_t func_ptr, uint32_t opt_arg1, - uint32_t opt_arg2); + uint32_t opt_arg2, + uint32_t opt_arg3); /* * Drops into protected mode and calls the function, which must have been compiled for x86_32. @@ -17,7 +25,7 @@ */ static inline int protected_mode_call(void *func) { - return protected_mode_call_narg(0, (uintptr_t)func, 0, 0); + return protected_mode_call_3arg((uintptr_t)func, 0, 0, 0); } /* @@ -30,7 +38,7 @@ */ static inline int protected_mode_call_1arg(void *func, uint32_t arg1) { - return protected_mode_call_narg(1, (uintptr_t)func, arg1, 0); + return protected_mode_call_3arg((uintptr_t)func, arg1, 0, 0); } /* @@ -43,7 +51,7 @@ */ static inline int protected_mode_call_2arg(void *func, uint32_t arg1, uint32_t arg2) { - return protected_mode_call_narg(2, (uintptr_t)func, arg1, arg2); + return protected_mode_call_3arg((uintptr_t)func, arg1, arg2, 0); } #else static inline int protected_mode_call(void *func) diff --git a/src/cpu/x86/64bit/mode_switch.S b/src/cpu/x86/64bit/mode_switch.S index c27f540..f9f784e 100644 --- a/src/cpu/x86/64bit/mode_switch.S +++ b/src/cpu/x86/64bit/mode_switch.S @@ -1,14 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +/* Calls a x86_32 function from x86_64 context */ .text .code64 .section ".text.protected_mode_call", "ax", @progbits - .globl protected_mode_call_narg -protected_mode_call_narg: - - push %rbp - mov %rsp, %rbp + .globl protected_mode_call_3arg +protected_mode_call_3arg: /* Preserve registers */ + push %rbp push %rbx push %r12 push %r13 @@ -19,58 +18,47 @@ movl %gs, %eax push %rax - /* Arguments to stack */ - push %rdi - push %rsi - push %rdx - push %rcx + /* Store stack pointer */ + mov %rsp, %rbp + /* Align stack and make space for arguments */ + movabs $0xfffffffffffffff0, %rax + andq %rax, %rsp + sub $16, %rsp + + /* Arguments to stack */ + movl %edi, 12(%rsp) + movl %esi, 0(%rsp) + movl %edx, 4(%rsp) + movl %ecx, 8(%rsp) + + /* Drop to protected mode */ #include <cpu/x86/64bit/exit32.inc> - movl -56(%ebp), %eax /* Argument count */ - movl -72(%ebp), %edx /* Argument 0 */ - movl -80(%ebp), %ecx /* Argument 1 */ + /* Fetch function to call */ + movl 12(%esp), %ebx - /* Align the stack */ - andl $0xFFFFFFF0, %esp - test %eax, %eax - je 1f /* Zero arguments */ - - subl $1, %eax - test %eax, %eax - je 2f /* One argument */ - - /* Two arguments */ - subl $8, %esp - pushl %ecx /* Argument 1 */ - pushl %edx /* Argument 0 */ - jmp 1f -2: - subl $12, %esp - pushl %edx /* Argument 0 */ - -1: - movl -64(%ebp), %ebx /* Function to call */ + /* Call function */ call *%ebx movl %eax, %ebx - /* Preserves ebx */ + /* Jump to long mode. Preserves ebx */ #include <cpu/x86/64bit/entry64.inc> /* Place return value in rax */ movl %ebx, %eax - /* Restore registers */ - mov -48(%rbp), %rbx - movl %ebx, %gs - mov -40(%rbp), %r15 - mov -32(%rbp), %r14 - mov -24(%rbp), %r13 - mov -16(%rbp), %r12 - mov -8(%rbp), %rbx - /* Restore stack pointer */ mov %rbp, %rsp + + /* Restore registers */ + pop %rbx + movl %ebx, %gs + pop %r15 + pop %r14 + pop %r13 + pop %r12 + pop %rbx pop %rbp ret -- To view, visit https://review.coreboot.org/c/coreboot/+/79752?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I30809453a1800ba3c0df60acd7eca778841c520f Gerrit-Change-Number: 79752 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79751?usp=email ) Change subject: northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 ...................................................................... northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 - Remove pointers in argument list passed to MRC to make sure the struct has the same size on x86_64 as on x86_32. - Add assembly wrapper to call the MRC with argument in EAX. - Wrap calling MRC in protected_mode_call_2arg, which is a stub on x86_32 Tested: Boots on Lenovo X220 using MRC in x86_32 and x86_64 mode. Change-Id: Id755e7381c5a94360e3511c53432d68b7687df67 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/northbridge/intel/sandybridge/Makefile.inc A src/northbridge/intel/sandybridge/mrc_wrapper.S M src/northbridge/intel/sandybridge/pei_data.h M src/northbridge/intel/sandybridge/raminit_mrc.c 4 files changed, 51 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/79751/1 diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 36fc16b..6ecb17a 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -27,6 +27,7 @@ romstage-y += raminit_tables.c else romstage-y += raminit_mrc.c +romstage-y += mrc_wrapper.S cbfs-files-y += mrc.bin mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) mrc.bin-position := 0xfffa0000 diff --git a/src/northbridge/intel/sandybridge/mrc_wrapper.S b/src/northbridge/intel/sandybridge/mrc_wrapper.S new file mode 100644 index 0000000..e169064 --- /dev/null +++ b/src/northbridge/intel/sandybridge/mrc_wrapper.S @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Functions to call MRC.bin from x86_64 */ + +.text +.code32 + .section ".text.mrc_wrapper", "ax", @progbits + .globl mrc_wrapper +mrc_wrapper: + /* Set up new stack frame */ + pushal + mov %esp, %ebp + + /* Align stack */ + andl $0xfffffff0, %esp + + movl 36(%ebp), %ebx /* Get function pointer */ + movl 40(%ebp), %eax /* Get argument */ + + call *%ebx + + /* Place return value on stack so that popal fetches it */ + movl %eax, 28(%ebp) + + /* Restore stack pointer */ + mov %ebp, %esp + popal + ret + diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index 7abc25f..0309cf3 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -50,10 +50,10 @@ uint32_t scrambler_seed; uint32_t scrambler_seed_s3; /* Data read from flash and passed into MRC */ - unsigned char *mrc_input; + uint32_t mrc_input_ptr; unsigned int mrc_input_len; /* Data from MRC that should be saved to flash */ - unsigned char *mrc_output; + uint32_t mrc_output_ptr; unsigned int mrc_output_len; /* * Max frequency DDR3 could be ran at. Could be one of four values: @@ -87,7 +87,9 @@ * which DIMMs should use the SPD from spd_data[0]. */ uint8_t spd_data[4][256]; - tx_byte_func tx_byte; + /* 32 bit pointer to tx_byte_func */ + uint32_t tx_byte_ptr; + int ddr3lv_support; /* * pcie_init needs to be set to 1 to have the system agent initialize PCIe. diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 68b02b8..d59aa86 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -28,6 +28,7 @@ #include <security/vboot/vboot_common.h> #include <southbridge/intel/bd82x6x/pch.h> #include <memory_info.h> +#include <mode_switch.h> /* Management Engine is in the southbridge */ #include <southbridge/intel/bd82x6x/me.h> @@ -49,13 +50,17 @@ #define MRC_CACHE_VERSION 0 +/* Assembly functions: */ +void mrc_wrapper(void *func_ptr, uint32_t arg1); + static void save_mrc_data(struct pei_data *pei_data) { u16 c1, c2, checksum; /* Save the MRC S3 restore data to cbmem */ - mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, pei_data->mrc_output, - pei_data->mrc_output_len); + mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, + (void *)(uintptr_t)pei_data->mrc_output_ptr, + pei_data->mrc_output_len); /* Save the MRC seed values to CMOS */ cmos_write32(pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); @@ -81,7 +86,7 @@ size_t mrc_size; /* Preset just in case there is an error */ - pei_data->mrc_input = NULL; + pei_data->mrc_input_ptr = 0; pei_data->mrc_input_len = 0; /* Read scrambler seeds from CMOS */ @@ -108,18 +113,18 @@ return; } - pei_data->mrc_input = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, + pei_data->mrc_input_ptr = (uintptr_t)mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, MRC_CACHE_VERSION, &mrc_size); - if (!pei_data->mrc_input) { + if (!pei_data->mrc_input_ptr) { /* Error message printed in find_current_mrc_cache */ return; } pei_data->mrc_input_len = mrc_size; - printk(BIOS_DEBUG, "%s: at %p, size %zx\n", __func__, - pei_data->mrc_input, mrc_size); + printk(BIOS_DEBUG, "%s: at 0x%x, size %zx\n", __func__, + pei_data->mrc_input_ptr, mrc_size); } /** @@ -129,7 +134,7 @@ */ static void sdram_initialize(struct pei_data *pei_data) { - int (*entry)(struct pei_data *pei_data) __attribute__((regparm(1))); + int (*entry)(struct pei_data *pei_data); /* Wait for ME to be ready */ intel_early_me_init(); @@ -144,19 +149,19 @@ prepare_mrc_cache(pei_data); /* If MRC data is not found we cannot continue S3 resume. */ - if (pei_data->boot_mode == 2 && !pei_data->mrc_input) { + if (pei_data->boot_mode == 2 && !pei_data->mrc_input_ptr) { printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__); system_reset(); } /* Pass console handler in pei_data */ - pei_data->tx_byte = do_putchar; + pei_data->tx_byte_ptr = (uintptr_t)do_putchar; /* Locate and call UEFI System Agent binary. */ entry = cbfs_map("mrc.bin", NULL); if (entry) { int rv; - rv = entry(pei_data); + rv = protected_mode_call_2arg(mrc_wrapper, (uintptr_t)entry, (uintptr_t)pei_data); if (rv) { switch (rv) { case -1: @@ -403,7 +408,7 @@ /* Sanity check mrc_var location by verifying a known field */ mrc_var = (void *)DCACHE_RAM_MRC_VAR_BASE; - if (mrc_var->tx_byte == (uintptr_t)pei_data.tx_byte) { + if (mrc_var->tx_byte == pei_data.tx_byte_ptr) { printk(BIOS_DEBUG, "MRC_VAR pool occupied [%08x,%08x]\n", mrc_var->pool_base, mrc_var->pool_base + mrc_var->pool_used); -- To view, visit https://review.coreboot.org/c/coreboot/+/79751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id755e7381c5a94360e3511c53432d68b7687df67 Gerrit-Change-Number: 79751 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin
by Patrick Rudolph (Code Review) 29 Dec '23

29 Dec '23

Attention is currently required from: Angel Pons. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79750?usp=email ) Change subject: northbridge/intel/sandybridge: Enable x86_64 for mrc.bin ...................................................................... northbridge/intel/sandybridge: Enable x86_64 for mrc.bin Enable x86_64 support for MRC.bin: - Add a wrapper function for console printing that calls into long mode to call native do_putchar - Remove Kconfig guard for x86_64 when MRC is being used Tested: Booted Lenovo X220 using mrc.bin under x86_64 and MRC is able to print to the console. Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/cpu/intel/model_206ax/Kconfig M src/northbridge/intel/sandybridge/mrc_wrapper.S M src/northbridge/intel/sandybridge/raminit_mrc.c 3 files changed, 41 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/79750/1 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 10c0ae3..649ef4e 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -1,7 +1,7 @@ config CPU_INTEL_MODEL_206AX bool select ARCH_X86 - select HAVE_EXP_X86_64_SUPPORT if USE_NATIVE_RAMINIT + select HAVE_EXP_X86_64_SUPPORT select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/northbridge/intel/sandybridge/mrc_wrapper.S b/src/northbridge/intel/sandybridge/mrc_wrapper.S index e169064..c92289c 100644 --- a/src/northbridge/intel/sandybridge/mrc_wrapper.S +++ b/src/northbridge/intel/sandybridge/mrc_wrapper.S @@ -26,3 +26,38 @@ popal ret + .section ".text.mrc_console_wrapper", "ax", @progbits + .globl mrc_console_wrapper + + /* + * Callback for MRC to print a character on the console. + * As MRC is x86_32 call into long mode and use the x86_64 + * function do_putchar to print to console. + */ +mrc_console_wrapper: + /* Set up new stack frame */ + pushal + mov %esp, %ebp + + /* Align stack and make space for arguments */ + andl $0xfffffff0, %esp + subl $8, %esp + + /* Get argument */ + movl 36(%ebp), %eax + push %eax + + /* Get function to call */ + mov $do_putchar, %eax + push %eax + + /* + * Elevate to long mode. As 2nd and 3rd argument are unused they + * haven't been pushed to the stack. + */ + call long_mode_call_3arg + + /* Restore stack pointer */ + mov %ebp, %esp + popal + ret \ No newline at end of file diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index d59aa86..0bcc817 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -52,6 +52,7 @@ /* Assembly functions: */ void mrc_wrapper(void *func_ptr, uint32_t arg1); +void mrc_console_wrapper(uint8_t byte); static void save_mrc_data(struct pei_data *pei_data) { @@ -155,7 +156,10 @@ } /* Pass console handler in pei_data */ - pei_data->tx_byte_ptr = (uintptr_t)do_putchar; + if (ENV_X86_64) + pei_data->tx_byte_ptr = (uintptr_t)mrc_console_wrapper; + else + pei_data->tx_byte_ptr = (uintptr_t)do_putchar; /* Locate and call UEFI System Agent binary. */ entry = cbfs_map("mrc.bin", NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/79750?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21ffcb5f5d4bf155593e8111531bdf0ed7071dfc Gerrit-Change-Number: 79750 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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