coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[master]: arch/x86/mmu: Port armv8 MMU to x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Patrick Rudolph. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30119?usp=email ) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... Patch Set 18: (1 comment) File src/arch/x86/include/arch/mmu.h: https://review.coreboot.org/c/coreboot/+/30119/comment/9a53db9b_e8984413 : PS17, Line 10: */ > It’d be great if the recommended multi-line comment styles could be used [1]. […] Done in the cherry-pick. -- To view, visit https://review.coreboot.org/c/coreboot/+/30119?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 30119 Gerrit-PatchSet: 18 Gerrit-Owner: Patrick Rudolph <rudolphpatrick05(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <rudolphpatrick05(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <rudolphpatrick05(a)gmail.com> Gerrit-Comment-Date: Wed, 22 Nov 2023 21:41:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: src/arch/x86/c_start.S: Add proper x86_64 code
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Angel Pons, Felix Singer, Jérémy Compostella, Patrick Rudolph, Tim Wawrzynczak. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59874?usp=email ) Change subject: src/arch/x86/c_start.S: Add proper x86_64 code ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > You can probably do it. Rebase done. -- To view, visit https://review.coreboot.org/c/coreboot/+/59874?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Gerrit-Change-Number: 59874 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 22 Nov 2023 21:38:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: arch/x86/mmu: Port armv8 MMU to x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Jérémy Compostella. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79161?usp=email ) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... Patch Set 3: (4 comments) File src/arch/x86/mmu-ramstage.c: https://review.coreboot.org/c/coreboot/+/79161/comment/08fd2d32_2bec0d4f : PS1, Line 13: #include <commonlib/region.h> > alphabetical order ? Done File src/arch/x86/mmu.c: https://review.coreboot.org/c/coreboot/+/79161/comment/239c047a_7bf0b064 : PS1, Line 13: #include <commonlib/region.h> > alphabetical order ? Done https://review.coreboot.org/c/coreboot/+/79161/comment/9aedf028_b2cd6f9d : PS1, Line 350: pages += PDPTs; /* PDPT pointing to 1 GiB PLEs */ > the beginning of both branches is identical, can't we take them out of the condition ? Done https://review.coreboot.org/c/coreboot/+/79161/comment/310d351f_cb43be13 : PS1, Line 364: 4 * KiB > There are a lot of `4 * KiB` in this file, could we create a constant ? Changed to GRANULE_SIZE, but yes, that actually might be Arm terminology. Either way, we are using a constant, so I'll mark this as done and look into it on your other comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/79161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 79161 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 22 Nov 2023 21:37:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: src/arch/x86/c_start.S: Add proper x86_64 code
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Benjamin Doron, Felix Singer, Jérémy Compostella, Tim Wawrzynczak. Benjamin Doron has uploaded a new patch set (#4) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/59874?usp=email ) Change subject: src/arch/x86/c_start.S: Add proper x86_64 code ...................................................................... src/arch/x86/c_start.S: Add proper x86_64 code Don't truncate upper bits in assembly code and thus allow loading of ramstage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Co-authored-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/arch/x86/c_start.S 1 file changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/59874/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59874?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc9b45f69d0b7534b2faacaad0d099cef2667478 Gerrit-Change-Number: 59874 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: src/arch/x86/exit_car: Add proper x86_64 code
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Jérémy Compostella. Hello Jérémy Compostella, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79162?usp=email to look at the new patch set (#2). Change subject: src/arch/x86/exit_car: Add proper x86_64 code ...................................................................... src/arch/x86/exit_car: Add proper x86_64 code Don't truncate upper bits in assembly code and thus allow loading of postcar stage above 4GiB. Tested on qemu with cbmem_top set to TOUUD. Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/arch/x86/exit_car.S 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/79162/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79162?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b Gerrit-Change-Number: 79162 Gerrit-PatchSet: 2 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: arch/x86/mmu: Port armv8 MMU to x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Benjamin Doron, Lean Sheng Tan. Hello Jérémy Compostella, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79161?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... arch/x86/mmu: Port armv8 MMU to x86_64 Add functions to set up page tables for long mode. In addition generate new page tables where necessary: - before CBMEM setup, if CBMEM is above 4GiB - after CBMEM setup, if CBMEM is above 4GiB - at end of BS_DEV_RESOURCES in CBMEM At end of BS_DEV_RESOURCES the memory map is fully known and the page tables can be properly generated based on the memory resources. This allows the CPU to access all DRAM and MMIO even beyond 4GiB. Right now there's no use case for this, but the code is necessary to: - Load stages above 4GiB - Load payloads above 4GiB - Install tables (like CBMEM/ACPI/SMBIOS) above 4GiB - allow coreboot PCI drivers to access BARs mapped above 4GiB Tested on prodrive/hermes: Still boots to payload. Doesn't affect existing x86_32 code. Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Co-authored-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc A src/arch/x86/include/arch/mmu.h A src/arch/x86/mmu-ramstage.c A src/arch/x86/mmu-romstage.c A src/arch/x86/mmu.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/lib/imd_cbmem.c 8 files changed, 630 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/79161/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 79161 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: Documentation: Improve x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth, Patrick Rudolph. Hello Arthur Heymans, Martin L Roth, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79160?usp=email to look at the new patch set (#2). Change subject: Documentation: Improve x86_64 ...................................................................... Documentation: Improve x86_64 * Move to own markdown document * Better describe current implementation * Update TODOs Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M Documentation/arch/x86/index.md A Documentation/arch/x86/x86_64.md 2 files changed, 159 insertions(+), 90 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/79160/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79160?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Gerrit-Change-Number: 79160 Gerrit-PatchSet: 2 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: Documentation: Improve x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

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[M] Change in coreboot[main]: Documentation: Improve x86_64
by Benjamin Doron (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth, Patrick Rudolph. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79160?usp=email ) Change subject: Documentation: Improve x86_64 ...................................................................... Patch Set 1: (9 comments) Patchset: PS1: > Thanks for doing this. […] So far, I've rebased some commits for 64-bit support onto the main branch, and fixed the merge conflicts. I'll work on updating it to reflect current status as I can. File Documentation/arch/x86/x86_64.md: https://review.coreboot.org/c/coreboot/+/79160/comment/81efc031_5a383606 : PS1, Line 3: experimental > Do you have any thoughts about how long this is going to remain experimental? What's preventing it f […] Likely, it'll take time to test platforms/configurations and ensure there aren't any problems. That might mean fixing compiler issues, but I'm also wondering if turning on page tables will break some platforms if they don't report resources correctly. On some platforms, callbacks from the FSP to coreboot are an issue now (PPI, console). There is only mode switch code for entry at the moment. This is solvable with a couple of mode switch functions though. https://review.coreboot.org/c/coreboot/+/79160/comment/dcd7717b_7ac491f7 : PS1, Line 10: a *"hack"* which places page tables in ROM > Add: "This will be explained further below in the section on page tables"? Sure, I suppose this needs rewriting. It's also somewhat out-of-date. With the follow-up change, romstage generates page tables if memory above 4 GiB is used, and ramstage will do use reported resources to generate tables unconditionally. https://review.coreboot.org/c/coreboot/+/79160/comment/b7bc187f_124c3b2f : PS1, Line 24: : The large memory model causes the compiler to emit 64bit addressing : instructions, which are not only slower, but also increase code size. > Should this be moved to a section comparing advantages and disadvantages between 32 & 64-bit modes? […] Page tables can be used to provide security benefits, such as by marking memory as non-executable or removing it entirely. This could be useful for SMM: mark regular DRAM as NX. (Intel platforms already have SMM code access check, which triggers a protection fault if SMM executes code outside DRAM, but we can't enable it because the MSR requires SMM to set it on all cores.) https://review.coreboot.org/c/coreboot/+/79160/comment/2896b972_27a1a981 : PS1, Line 28: must generate page tables at build time > Is this really a toolchain requirement, or just an implementation detail? I'm not sure I understand? If you're asking if long mode architecturally needs page tables in ROM, no. That's just the implementation in-tree, and with the follow-up, the implementation that bootblock sets-up (also used by verstage, and possibly until ramstage). https://review.coreboot.org/c/coreboot/+/79160/comment/28d74d5a_9688fabb : PS1, Line 107: * Fix running VGA Option ROMs > option roms can't currently be run directly when in long mode, since only going to real mode is only […] If necessary, I suppose `protected_mode_call_argx()` could be used to run the code that drops from protected to real mode. But of course, that isn't done yet. https://review.coreboot.org/c/coreboot/+/79160/comment/ed266f0c_cb0f821b : PS1, Line 117: * Place and run code above 4GiB > do we really need this? i'd say that we should just keep all code and stack/heap below 4GB Probably not, I think. I don't know what the thought process was when this was written though. https://review.coreboot.org/c/coreboot/+/79160/comment/1b519ae1_3c388fe7 : PS1, Line 140: Here's a list of known issues: > Should this be another subsection, or is this still referring to QEMU? I'm not sure. I'll check Intel's SDM and some AMD documentation. https://review.coreboot.org/c/coreboot/+/79160/comment/ee1ed59d_3b9e16a5 : PS1, Line 155: * Entering long mode crashes on AMD host platforms. > i haven't added the code for switching back to 32 bit mode before calling FSP; that code was already […] Yeah, this might be out of date. -- To view, visit https://review.coreboot.org/c/coreboot/+/79160?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Gerrit-Change-Number: 79160 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 22 Nov 2023 20:14:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
by Srinivas Hegde (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans, Paul Menzel. Srinivas Hegde has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79218?usp=email ) Change subject: arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79218/comment/caaaceb1_c8a335e3 : PS3, Line 7: src/ > It’s normally left out of the prefix. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/79218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Gerrit-Change-Number: 79218 Gerrit-PatchSet: 4 Gerrit-Owner: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 22 Nov 2023 19:28:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2023