coreboot-gerrit November 2023

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[XS] Change in coreboot[main]: arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
by Srinivas Hegde (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans, Srinivas Hegde. Hello Julius Werner, Jérémy Compostella, Patrick Georgi, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79218?usp=email to look at the new patch set (#4). Change subject: arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker ...................................................................... arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker We seem to be passing CPPFLAGS to linker in x86 arch ramstage. This is superflous as these are only meant to be compiler flags and should not be passed to the linker. Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Signed-off-by: Srinivas Hegde <srinivashegde(a)google.com> --- M src/arch/x86/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/79218/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Gerrit-Change-Number: 79218 Gerrit-PatchSet: 4 Gerrit-Owner: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
by Paul Menzel (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans, Srinivas Hegde. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79218?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79218/comment/db4378ca_3b81c254 : PS3, Line 7: src/ It’s normally left out of the prefix. -- To view, visit https://review.coreboot.org/c/coreboot/+/79218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Gerrit-Change-Number: 79218 Gerrit-PatchSet: 3 Gerrit-Owner: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 22 Nov 2023 19:11:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
by Srinivas Hegde (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Arthur Heymans. Srinivas Hegde has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79218?usp=email ) Change subject: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > The '$$(call src-to-obj,$1,$$(1).ld):' target does the CPP so it can be omitted here. […] Updated the commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/79218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Gerrit-Change-Number: 79218 Gerrit-PatchSet: 3 Gerrit-Owner: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 22 Nov 2023 18:56:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
by Srinivas Hegde (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Srinivas Hegde. Hello Julius Werner, Jérémy Compostella, Patrick Georgi, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79218?usp=email to look at the new patch set (#3). Change subject: src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker ...................................................................... src/arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker We seem to be passing CPPFLAGS to linker in x86 arch ramstage. This is superflous as these are only meant to be compiler flags and should not be passed to the linker. Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Signed-off-by: Srinivas Hegde <srinivashegde(a)google.com> --- M src/arch/x86/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/79218/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878 Gerrit-Change-Number: 79218 Gerrit-PatchSet: 3 Gerrit-Owner: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Srinivas Hegde <srinivashegde(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: acpi.c: Fix generating pointer to cb_tables located >4G
by Subrata Banik (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Cliff Huang, Eric Lai, Felix Held, Hannah Williams, Jamie Ryu, Lance Zhao, Maximilian Brune, Paul Menzel, Pratikkumar V Prajapati, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76181?usp=email ) Change subject: acpi.c: Fix generating pointer to cb_tables located >4G ...................................................................... Patch Set 15: (1 comment) Patchset: PS15: I remember Intel had mentioned similar issue with ACPI 4G allocator change -- To view, visit https://review.coreboot.org/c/coreboot/+/76181?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1bc553b18d08cee502b765166227810f8e619631 Gerrit-Change-Number: 76181 Gerrit-PatchSet: 15 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 22 Nov 2023 18:39:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: acpi.c: Fix generating pointer to cb_tables located >4G
by Lean Sheng Tan (Code Review) 22 Nov '23

22 Nov '23

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Cliff Huang, Eric Lai, Felix Held, Lance Zhao, Maximilian Brune, Paul Menzel, Subrata Banik, Tim Wawrzynczak. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76181?usp=email ) Change subject: acpi.c: Fix generating pointer to cb_tables located >4G ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76181?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1bc553b18d08cee502b765166227810f8e619631 Gerrit-Change-Number: 76181 Gerrit-PatchSet: 15 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 22 Nov 2023 18:12:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/asus/p8z77-m: Ensure RAM stays powered in ACPI S3 suspend
by Felix Held (Code Review) 22 Nov '23

22 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78205?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/asus/p8z77-m: Ensure RAM stays powered in ACPI S3 suspend ...................................................................... mb/asus/p8z77-m: Ensure RAM stays powered in ACPI S3 suspend Enable 3VSBSW# in NCT6779D super I/O like other variants in the family, needed to maintain power to memory during S3 suspend. Without it resuming totally fails. (Enabling it in devicetree is OK; it needs not be done in early board init.) TEST=Resuming from S3 works. Change-Id: Ia8059b2a263ab5c459e54685f046eeb913776473 Signed-off-by: Keith Hui <buurin(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78205 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-by: Kevin Keijzer <kevin(a)quietlife.nl> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved Kevin Keijzer: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb index cdcaa57..c9fd784 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb @@ -52,6 +52,7 @@ drq 0xe1 = 0x80 # GP07 high end device pnp 2e.a on # ACPI + drq 0xe4 = 0x10 # Enable 3VSBSW#, needed for S3 suspend drq 0xe7 = 0x11 # HWM reset by LRESET#, 0.5s S3 delay for compatibility drq 0xf2 = 0x5d # Enable RSTOUT[0-2]# and PME end -- To view, visit https://review.coreboot.org/c/coreboot/+/78205?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8059b2a263ab5c459e54685f046eeb913776473 Gerrit-Change-Number: 78205 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/nissa/var/craaskov: Add 6W and 15W DPTF parameters
by Felix Held (Code Review) 22 Nov '23

22 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79183?usp=email ) Change subject: mb/google/nissa/var/craaskov: Add 6W and 15W DPTF parameters ...................................................................... mb/google/nissa/var/craaskov: Add 6W and 15W DPTF parameters The DPTF parameters were defined by the thermal team. Based on thermal table in 290705146#comment17. BUG=b:290705146 BRUNCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: I02b4187000eec9990bf10a57875b23007f7bdd12 Signed-off-by: Van Chen <van_chen(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79183 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/craaskov/overridetree.cb 1 file changed, 94 insertions(+), 3 deletions(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/craaskov/overridetree.cb b/src/mainboard/google/brya/variants/craaskov/overridetree.cb index 8c29567..c9299de 100644 --- a/src/mainboard/google/brya/variants/craaskov/overridetree.cb +++ b/src/mainboard/google/brya/variants/craaskov/overridetree.cb @@ -1,3 +1,10 @@ +fw_config + field THERMAL_SOLUTION 0 0 + option THERMAL_SOLUTION_6W 0 + option THERMAL_SOLUTION_15W 1 + end +end + chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" @@ -99,6 +106,22 @@ register "options.tsr[1].desc" = ""charger"" register "options.tsr[2].desc" = ""ambient"" + ## Active Policy + register "policies.active" = "{ + [0] = { + .target = DPTF_CPU, + .thresholds = { + TEMP_PCT(0, 0), + TEMP_PCT(35, 27), + TEMP_PCT(38, 31), + TEMP_PCT(39, 35), + TEMP_PCT(42, 41), + TEMP_PCT(60, 47), + TEMP_PCT(70, 100), + } + } + }" + ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), @@ -117,8 +140,8 @@ register "controls.power_limits" = "{ .pl1 = { - .min_power = 5500, - .max_power = 6000, + .min_power = 6000, + .max_power = 20000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, .granularity = 500 @@ -139,7 +162,75 @@ [2] = { 16, 1000 }, [3] = { 8, 500 } }" - device generic 0 on end + device generic 0 on + probe THERMAL_SOLUTION THERMAL_SOLUTION_6W + end + end + chip drivers/intel/dptf + ## sensor information + register "options.tsr[0].desc" = ""DDR"" + register "options.tsr[1].desc" = ""charger"" + register "options.tsr[2].desc" = ""ambient"" + + ## Active Policy + register "policies.active" = "{ + [0] = { + .target = DPTF_CPU, + .thresholds = { + TEMP_PCT(0, 0), + TEMP_PCT(35, 27), + TEMP_PCT(38, 31), + TEMP_PCT(39, 35), + TEMP_PCT(42, 41), + TEMP_PCT(60, 47), + TEMP_PCT(70, 100), + } + } + }" + + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 5000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 70, 5000), + }" + + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN), + }" + + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 15000, + .max_power = 20000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 28 * MSECS_PER_SEC, + .granularity = 500 + }, + .pl2 = { + .min_power = 35000, + .max_power = 35000, + .time_window_min = 32 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 500 + } + }" + + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 255, 1700 }, + [1] = { 24, 1500 }, + [2] = { 16, 1000 }, + [3] = { 8, 500 } + }" + device generic 1 on + probe THERMAL_SOLUTION THERMAL_SOLUTION_15W + end end end device ref i2c1 on -- To view, visit https://review.coreboot.org/c/coreboot/+/79183?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02b4187000eec9990bf10a57875b23007f7bdd12 Gerrit-Change-Number: 79183 Gerrit-PatchSet: 4 Gerrit-Owner: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/rex: Enable FSP logo rendering for all Rex variants
by Felix Held (Code Review) 22 Nov '23

22 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79175?usp=email ) Change subject: mb/google/rex: Enable FSP logo rendering for all Rex variants ...................................................................... mb/google/rex: Enable FSP logo rendering for all Rex variants This patch enables the FSP (Firmware Splash Screen) rendering feature for all Rex variants, including chromeboxes like Ovis. This will allow users to see the FSP logo during the boot process. BUG=b:284799726 TEST=Verify that the FSP logo is displayed during the boot process on an google/ovis chromebox. Change-Id: I73d82e16f70ffdc8cb168506c86d9c4e9a92c38d Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79175 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/rex/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index d7f8e4c..011c7a9 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -19,6 +19,7 @@ select GOOGLE_SMBIOS_MAINBOARD_VERSION select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP select I2C_TPM select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_DISABLE_STAGE_CACHE @@ -37,7 +38,6 @@ select DRIVERS_INTEL_PMC select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_WWAN_FM350GL - select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP select HAVE_SLP_S0_GATE select MAINBOARD_HAS_CHROMEOS select MEMORY_SOLDERDOWN -- To view, visit https://review.coreboot.org/c/coreboot/+/79175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I73d82e16f70ffdc8cb168506c86d9c4e9a92c38d Gerrit-Change-Number: 79175 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku
by Felix Held (Code Review) 22 Nov '23

22 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79213?usp=email ) Change subject: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku ...................................................................... mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku Set pen detect pin to NC base on fw_config. BUG=b:304680060 TEST=emerge-rex coreboot pass Change-Id: Icf9171fca49cfed1a05a67ae7fc8d62b7e9630c9 Signed-off-by: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79213 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/rex/variants/karis/fw_config.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/rex/variants/karis/fw_config.c b/src/mainboard/google/rex/variants/karis/fw_config.c index 7211d8a..ea9f9eb 100644 --- a/src/mainboard/google/rex/variants/karis/fw_config.c +++ b/src/mainboard/google/rex/variants/karis/fw_config.c @@ -30,6 +30,8 @@ static const struct pad_config stylus_disable_pads[] = { /* GPP_E04 : SOC_PEN_DETECT */ PAD_NC(GPP_E04, NONE), + /* GPP_E09 : SOC_PEN_DETECT */ + PAD_NC(GPP_E09, NONE), }; void fw_config_gpio_padbased_override(struct pad_config *padbased_table) -- To view, visit https://review.coreboot.org/c/coreboot/+/79213?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf9171fca49cfed1a05a67ae7fc8d62b7e9630c9 Gerrit-Change-Number: 79213 Gerrit-PatchSet: 2 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2023