coreboot-gerrit November 2023

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification
by Jérémy Compostella (Code Review) 28 Nov '23

28 Nov '23

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun. Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79291?usp=email ) Change subject: soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification ...................................................................... soc/intel/meteorlake: Enable SSE2 accelerated RSA sign. verification | modpow() function call during boot | original | SSE2 Algorithm 2 | |------------------------------------+----------+------------------| | coreboot/verstage - step 1 | 6.531 | 2.965 | | coreboot/verstage - step 2 | 1.854 | 0.750 | | coreboot/verstage - step 3 | 1.841 | 0.751 | |------------------------------------+----------+------------------| | Total (ms) | 10.226 | 4.466 | BUG=b:312709384 TEST=modular exponentiation is more than twice faster on rex0 Change-Id: I382e62a765dbf2027c4ac54d6eb19a9542a8c302 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/soc/intel/meteorlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/79291/1 diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index e95756f..5040a8e 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -324,6 +324,7 @@ select VBOOT_VBNV_CMOS select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH select VBOOT_X86_SHA256_ACCELERATION + select VBOOT_X86_SSE2_ACCELERATION # Default hash block size is 1KiB. Increasing it to 4KiB to improve # hashing time as well as read time. -- To view, visit https://review.coreboot.org/c/coreboot/+/79291?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I382e62a765dbf2027c4ac54d6eb19a9542a8c302 Gerrit-Change-Number: 79291 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: libpayload: Add VBOOT_X86_SSE2_INSTR config
by Jérémy Compostella (Code Review) 28 Nov '23

28 Nov '23

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79290?usp=email ) Change subject: libpayload: Add VBOOT_X86_SSE2_INSTR config ...................................................................... libpayload: Add VBOOT_X86_SSE2_INSTR config Add `VBOOT_X86_SSE2_INSTR' Kconfig option to enable SSE2 instruction set implementation of modulus exponentiation which is part of the RSA signature verification process. This option is enabled on CHROMEOS. | modpow() function call during boot | original on rex0 | SSE2 on rex0 | |------------------------------------+------------------+--------------| | depthcharge - step 1 | 0.547 | 0.288 | | depthcharge - step 2 | 0.152 | 0.081 | | depthcharge - step 3 | 0.164 | 0.079 | |------------------------------------+------------------+--------------| | Total (ms) | 0.863 | 0.448 | | modpow() function call during boot | original on brya0 | SSE2 on rex0 | |------------------------------------+-------------------+--------------| | depthcharge - step 1 | 0.693 | 0.248 | | depthcharge - step 2 | 0.172 | 0.065 | | depthcharge - step 3 | 0.223 | 0.067 | |------------------------------------+-------------------+--------------| | Total (ms) | 1.088 | 0.38 | BUG=b:312709384 TEST=modular exponentiation is about twice faster on rex0 and brya0 Change-Id: I801ebd7839261c6bd07fb218e1e36a7108e219bf Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M payloads/libpayload/vboot/Kconfig M payloads/libpayload/vboot/Makefile.inc 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/79290/1 diff --git a/payloads/libpayload/vboot/Kconfig b/payloads/libpayload/vboot/Kconfig index 25ca35e..0de39d8 100644 --- a/payloads/libpayload/vboot/Kconfig +++ b/payloads/libpayload/vboot/Kconfig @@ -31,6 +31,16 @@ This option enables SHA256 implementation using x86 SHA processor extension instructions: sha256msg1, sha256msg2, sha256rnds2. +config VBOOT_X86_SSE2_INSTR + bool "Use SSE2 instructions for RSA signature verification" + default y if CHROMEOS + default n + depends on ARCH_X86 + help + Use paddq, pmuludq, psrlq, punpckldq and punpcklqdq SSE2 + instructions to accelerate the modulus exponentiation which + is part of the RSA signature verification process. + config VBOOT_SHA_ARMV8_CE bool "SHA256 implementation using ARMv8 Crypto Extension" default y if CHROMEOS diff --git a/payloads/libpayload/vboot/Makefile.inc b/payloads/libpayload/vboot/Makefile.inc index 5677df9..2597f0b 100644 --- a/payloads/libpayload/vboot/Makefile.inc +++ b/payloads/libpayload/vboot/Makefile.inc @@ -37,6 +37,7 @@ $(MAKE) -C "$(VBOOT_SOURCE)" \ TPM2_MODE=$(call kconfig-to-binary, $(CONFIG_LP_VBOOT_TPM2_MODE)) \ X86_SHA_EXT=$(call kconfig-to-binary, $(CONFIG_LP_VBOOT_X86_SHA_EXT)) \ + X86_SSE2_INSTR=$(call kconfig-to-binary, $(CONFIG_LP_VBOOT_X86_SSE2_INSTR)) \ ARMV8_CRYPTO_EXT=$(call kconfig-to-binary, $(CONFIG_LP_VBOOT_SHA_ARMV8_CE)) \ UNROLL_LOOPS=1 \ BUILD="$(VBOOT_BUILD_DIR)" \ -- To view, visit https://review.coreboot.org/c/coreboot/+/79290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I801ebd7839261c6bd07fb218e1e36a7108e219bf Gerrit-Change-Number: 79290 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: vboot: add VBOOT_X86_SSE2_ACCELERATION config
by Jérémy Compostella (Code Review) 28 Nov '23

28 Nov '23

Attention is currently required from: Julius Werner, Yu-Ping Wu. Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79289?usp=email ) Change subject: vboot: add VBOOT_X86_SSE2_ACCELERATION config ...................................................................... vboot: add VBOOT_X86_SSE2_ACCELERATION config Add `VBOOT_X86_SSE2_ACCELERATION' Kconfig option to enable SSE2 instruction set implementation of modulus exponentiation which is part of the RSA signature verification process. BUG=b:312709384 TEST=Able to use SSE2 accelerated implementation on rex0 Change-Id: Ib6e39eb9f592f36ad3dca76c8eaf2fe334704265 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/security/vboot/Kconfig M src/security/vboot/Makefile.inc 2 files changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/79289/1 diff --git a/src/security/vboot/Kconfig b/src/security/vboot/Kconfig index 2d5b20f..295f8b8 100644 --- a/src/security/vboot/Kconfig +++ b/src/security/vboot/Kconfig @@ -292,6 +292,15 @@ Use sha256msg1, sha256msg2, sha256rnds2 instruction to accelerate SHA hash calculation in vboot. +config VBOOT_X86_SSE2_ACCELERATION + bool "Use SSE2 instructions for RSA signature verification" + default n + depends on ARCH_X86 + help + Use paddq, pmuludq, psrlq, punpckldq and punpcklqdq SSE2 + instructions to accelerate the modulus exponentiation which + is part of the RSA signature verification process. + config VBOOT_ARMV8_CE_SHA256_ACCELERATION bool "Use ARMv8 Crypto Extension for sha256 hash calculation" default y if CHROMEOS diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index 1b3568a..af87261 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -30,6 +30,8 @@ EC_EFS="$(CONFIG_VBOOT_EC_EFS)" \ X86_SHA_EXT="$(if $(CONFIG_ARCH_$(call toupper,$(1))_X86_32)$(CONFIG_ARCH_$(call toupper,$(1))_X86_64),$\ $(CONFIG_VBOOT_X86_SHA256_ACCELERATION))" \ + X86_SSE2_INSTR="$(if $(CONFIG_ARCH_$(call toupper,$(1))_X86_32)$(CONFIG_ARCH_$(call toupper,$(1))_X86_64),$\ + $(CONFIG_VBOOT_X86_SSE2_ACCELERATION))" \ ARMV8_CRYPTO_EXT="$(if $(CONFIG_ARCH_$(call toupper,$(1))_ARMV8_64),$$(CONFIG_VBOOT_ARMV8_CE_SHA256_ACCELERATION))" \ $(MAKE) -C $(VBOOT_SOURCE) \ BUILD=$$(abspath $$(dir $$(VBOOT_LIB_$(1)))) \ -- To view, visit https://review.coreboot.org/c/coreboot/+/79289?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6e39eb9f592f36ad3dca76c8eaf2fe334704265 Gerrit-Change-Number: 79289 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: arch/x86/car.ld: Use VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE constant
by Jérémy Compostella (Code Review) 28 Nov '23

28 Nov '23

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79288?usp=email ) Change subject: arch/x86/car.ld: Use VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE constant ...................................................................... arch/x86/car.ld: Use VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE constant Use the `VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE' constant defined by the vboot project instead of hard-coding the buffer size. Change-Id: I6039fc7cf2439535ca88663806bdcf99ad5089b0 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/arch/x86/car.ld 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/79288/1 diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index eb75981..17e6eea 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -17,7 +17,7 @@ #if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) /* Vboot work buffer only needs to be available when verified boot * starts in bootblock. */ - VBOOT2_WORK(., 12K) + VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) #endif #if CONFIG(TPM_MEASURED_BOOT) /* Vboot measured boot TPM log measurements. -- To view, visit https://review.coreboot.org/c/coreboot/+/79288?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6039fc7cf2439535ca88663806bdcf99ad5089b0 Gerrit-Change-Number: 79288 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: acpi: Enable 64bit ECAM resource
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79096?usp=email ) Change subject: acpi: Enable 64bit ECAM resource ...................................................................... acpi: Enable 64bit ECAM resource Adjust ACPI DSDT to support ECAM resource above 4GB by modifying the PCI ECAM Resource Consumption settings. The changes include specifying a QWordMemory resource template, accommodating non-cacheable, read-write attributes, and adjusting the address range. Change-Id: Idb049d848f2311e27df5279a10c33f9fab259c08 Signed-off-by: Naresh Solanki <naresh.solanki(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79096 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Reviewed-by: Maximilian Brune <maximilian.brune(a)9elements.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/acpi/dsdt_top.asl 1 file changed, 20 insertions(+), 4 deletions(-) Approvals: Lean Sheng Tan: Looks good to me, approved Maximilian Brune: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve diff --git a/src/acpi/dsdt_top.asl b/src/acpi/dsdt_top.asl index 6a0129f..7539f00 100644 --- a/src/acpi/dsdt_top.asl +++ b/src/acpi/dsdt_top.asl @@ -57,11 +57,27 @@ Device (PERC) // PCI ECAM Resource Consumption { Name (_HID, EisaId("PNP0C02")) - Name (_CRS, ResourceTemplate() + Method (_CRS, 0, Serialized) { - Memory32Fixed (ReadWrite, CONFIG_ECAM_MMCONF_BASE_ADDRESS, - CONFIG_ECAM_MMCONF_LENGTH) - }) + Name (RBUF, ResourceTemplate () + { + QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, + NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // _MIN + 0x0000000000000001, // _MAX + 0x0000000000000000, // Translation + 0x0000000000000002, // _Len + ,, _Y00, AddressRangeMemory, TypeStatic) + }) + CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MIN, MIN1) + CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._MAX, MAX1) + CreateQWordField (RBUF, \_SB.PERC._CRS._Y00._LEN, LEN1) + MIN1 = CONFIG_ECAM_MMCONF_BASE_ADDRESS + MAX1 = (MIN1 + CONFIG_ECAM_MMCONF_LENGTH -1) + LEN1 = CONFIG_ECAM_MMCONF_LENGTH + Return (RBUF) + } } } #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/79096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb049d848f2311e27df5279a10c33f9fab259c08 Gerrit-Change-Number: 79096 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: acpi: Enable 64bit ECAM resource
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Angel Pons, Arthur Heymans, Cliff Huang, David Milosevic, Felix Singer, Lance Zhao, Martin L Roth, Maximilian Brune, Naresh Solanki, Patrick Rudolph, Tim Wawrzynczak. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79096?usp=email ) Change subject: acpi: Enable 64bit ECAM resource ...................................................................... Patch Set 5: Code-Review+2 (1 comment) Patchset: PS5: as expected, windows 10 still boots with this patch applied and when rebooted to make sure that it'll actually evaluate the new acpi code. only tested with the ecam mmconf region below 4gb though, but i'd say that this should be sufficient -- To view, visit https://review.coreboot.org/c/coreboot/+/79096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb049d848f2311e27df5279a10c33f9fab259c08 Gerrit-Change-Number: 79096 Gerrit-PatchSet: 5 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 21:10:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: util/kconfig: Uprev to Linux 6.1's kconfig
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Patrick Georgi. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79203?usp=email ) Change subject: util/kconfig: Uprev to Linux 6.1's kconfig ...................................................................... Patch Set 3: (1 comment) File util/kconfig/confdata.c: https://review.coreboot.org/c/coreboot/+/79203/comment/b21fd132_0fd73aa9 : PS3, Line 235: char *name = getenv("KCONFIG_RUSTCCFG"); looks like we need to set that one. haven't bisected this, but seems to me that this is the reason why a build now creates include/generated/rustc_cfg inside the coreboot directory which then shows up as unstaged file. not sure if we need that one, but if so, we should probably specify KCONFIG_RUSTCCFG so that it'll point to somewhere inside build/ -- To view, visit https://review.coreboot.org/c/coreboot/+/79203?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I79159130ba3515ede59e9fb9fbf087e2ed76257a Gerrit-Change-Number: 79203 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Mon, 27 Nov 2023 21:07:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: acpi: Enable 64bit ECAM resource
by Nico Huber (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Angel Pons, Arthur Heymans, Cliff Huang, David Milosevic, Felix Singer, Lance Zhao, Martin L Roth, Maximilian Brune, Naresh Solanki, Patrick Rudolph, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79096?usp=email ) Change subject: acpi: Enable 64bit ECAM resource ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb049d848f2311e27df5279a10c33f9fab259c08 Gerrit-Change-Number: 79096 Gerrit-PatchSet: 5 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 20:19:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: util/crossgcc: Update LLVM from 16.0.6 to 17.0.5
by Felix Singer (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Arthur Heymans, Maximilian Brune, Paul Menzel. Hello Arthur Heymans, Maximilian Brune, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78884?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel Change subject: util/crossgcc: Update LLVM from 16.0.6 to 17.0.5 ...................................................................... util/crossgcc: Update LLVM from 16.0.6 to 17.0.5 Change-Id: Ifed410f4b7fdc358535f01850328c642d19ff1f6 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M util/crossgcc/buildgcc D util/crossgcc/sum/clang-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-17.0.5.src.tar.xz.cksum D util/crossgcc/sum/clang-tools-extra-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-tools-extra-17.0.5.src.tar.xz.cksum D util/crossgcc/sum/cmake-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/cmake-17.0.5.src.tar.xz.cksum D util/crossgcc/sum/compiler-rt-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/compiler-rt-17.0.5.src.tar.xz.cksum D util/crossgcc/sum/llvm-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/llvm-17.0.5.src.tar.xz.cksum 11 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/78884/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78884?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifed410f4b7fdc358535f01850328c642d19ff1f6 Gerrit-Change-Number: 78884 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: util/scripts/restore_agesa.sh - restores the opensource AMD AGESA boards
by Mike Banon (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Balázs Vinarz, HacX Scedix, Kyösti Mälkki, Martin L Roth, Paul Menzel, Vlado Ilic, awokd(a)danwin1210.me. Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76832?usp=email ) Change subject: util/scripts/restore_agesa.sh - restores the opensource AMD AGESA boards ...................................................................... Patch Set 9: (1 comment) Patchset: PS7: Thanks to Patrick Georgi's latest fix at coreboot master, I could remove 1 CBF revert and 2 GRF reverts (although had to add one more GRF revert for another new commit) -- To view, visit https://review.coreboot.org/c/coreboot/+/76832?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4658dcaf4ff6fbac36070529284f2c982ed73c3 Gerrit-Change-Number: 76832 Gerrit-PatchSet: 9 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Balázs Vinarz <vinibali1(a)gmail.com> Gerrit-Reviewer: HacX Scedix <oblongs.figure-0z(a)icloud.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Vlado Ilic <kakonema(a)gmail.com> Gerrit-Reviewer: awokd(a)danwin1210.me Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexander Goncharov <chat(a)joursoir.net> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: HacX Scedix <oblongs.figure-0z(a)icloud.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: awokd(a)danwin1210.me Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Balázs Vinarz <vinibali1(a)gmail.com> Gerrit-Attention: Vlado Ilic <kakonema(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 19:56:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2023