coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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3037 discussions

[S] Change in coreboot[main]: soc/amd/common/psp_verstage: Make SPI ROM mapping configurable
by Karthik Ramasubramanian (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Mark Hasemeyer, Matt DeVillier, Raul Rangel. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79155?usp=email ) Change subject: soc/amd/common/psp_verstage: Make SPI ROM mapping configurable ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/psp_verstage/Kconfig: https://review.coreboot.org/c/coreboot/+/79155/comment/fc7a32f3_43f0e47a : PS2, Line 49: default y if SOC_AMD_CEZANNE > hm, would it be better to drop this line and select this option in the Cezanne Kconfig? i'm fine wit […] Sure, will submit a follow-up CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/79155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I166ac7b50b367c067e1a743fc94686e69dd07844 Gerrit-Change-Number: 79155 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 15:25:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: acpi: Enable 64bit ECAM resource
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Angel Pons, Arthur Heymans, Cliff Huang, David Milosevic, Felix Singer, Lance Zhao, Martin L Roth, Maximilian Brune, Naresh Solanki, Patrick Rudolph, Tim Wawrzynczak. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79096?usp=email ) Change subject: acpi: Enable 64bit ECAM resource ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: did you test this with windows, since it's more picky than linux? if not, i can test that later today -- To view, visit https://review.coreboot.org/c/coreboot/+/79096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb049d848f2311e27df5279a10c33f9fab259c08 Gerrit-Change-Number: 79096 Gerrit-PatchSet: 5 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 15:25:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Update amd_blobs submodule to upstream main branch
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79305?usp=email ) Change subject: Update amd_blobs submodule to upstream main branch ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79305?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4cf528c2d2489782758d2e16ea9201324c466919 Gerrit-Change-Number: 79305 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 15:08:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Enable CNVi Bluetooth
by Eric Lai (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Dolan Liu, Nick Vaccaro, Paul Menzel, Subrata Banik, Weimin Wu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79055?usp=email ) Change subject: mb/google/nissa/var/anraggar: Enable CNVi Bluetooth ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79055?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcae800836c17307bc133de5a91658f6dda5985c Gerrit-Change-Number: 79055 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 27 Nov 2023 15:05:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Update amd_blobs submodule to upstream main branch
by Matt DeVillier (Code Review) 27 Nov '23

27 Nov '23

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79305?usp=email ) Change subject: Update amd_blobs submodule to upstream main branch ...................................................................... Update amd_blobs submodule to upstream main branch Updating from commit id e4519efca746 (2023-11-15): Revert "picasso: Update PSP binaries to release 0.8.13.7B" to commit id 68ebd4b567f4 (2023-11-27): PCO: Update ABL to version CABLRV21080200 This brings in 1 new commit: 68ebd4b567 PCO: Update ABL to version CABLRV21080200 Change-Id: I4cf528c2d2489782758d2e16ea9201324c466919 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> --- M 3rdparty/amd_blobs 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/79305/1 diff --git a/3rdparty/amd_blobs b/3rdparty/amd_blobs index e4519ef..68ebd4b 160000 --- a/3rdparty/amd_blobs +++ b/3rdparty/amd_blobs @@ -1 +1 @@ -Subproject commit e4519efca74615f0f322d595afa7702c64753914 +Subproject commit 68ebd4b567f467d2045c19251bb632fa337d99b6 -- To view, visit https://review.coreboot.org/c/coreboot/+/79305?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4cf528c2d2489782758d2e16ea9201324c466919 Gerrit-Change-Number: 79305 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: [UNTESTED] acpi/acpi: add & use ACPI_DBG2_PORT_SERIAL_16550_GENERIC
by Matt DeVillier (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Cliff Huang, Felix Held, Lance Zhao, Tim Wawrzynczak. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79219?usp=email ) Change subject: [UNTESTED] acpi/acpi: add & use ACPI_DBG2_PORT_SERIAL_16550_GENERIC ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79219?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I816bb22e6f76e661c8b8e39a2a4cb83b0085acb5 Gerrit-Change-Number: 79219 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 27 Nov 2023 14:54:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/taeko: Generate SPD IDs for 2 new memory parts
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79184?usp=email ) Change subject: mb/google/brya/var/taeko: Generate SPD IDs for 2 new memory parts ...................................................................... mb/google/brya/var/taeko: Generate SPD IDs for 2 new memory parts Add taeko new supported memory parts in mem_parts_used.txt, generate spd-3.hex for these parts. 1. Samsung K4UBE3D4AB-MGCL 2. Micron MT53E1G32D2NP-046 WT:B BUG=b:312363368 TEST=Use part_id_gen to generate related settings Signed-off-by: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Change-Id: I221ad3f490f24b43fe1ccd211014787eab5d1038 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79184 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Bob Moragues <moragues(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: YH Lin <yueherngl(a)google.com> --- M src/mainboard/google/brya/variants/taeko/memory/Makefile.inc M src/mainboard/google/brya/variants/taeko/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt 3 files changed, 7 insertions(+), 2 deletions(-) Approvals: Bob Moragues: Looks good to me, but someone else must approve build bot (Jenkins): Verified YH Lin: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/taeko/memory/Makefile.inc b/src/mainboard/google/brya/variants/taeko/memory/Makefile.inc index 2ac3e32..458f555 100644 --- a/src/mainboard/google/brya/variants/taeko/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/taeko/memory/Makefile.inc @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taeko/memory src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taeko/memory/ src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt SPD_SOURCES = SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE, MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL, H54G46CYRBX267 +SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = K4UBE3D4AB-MGCL, MT53E1G32D2NP-046 WT:B diff --git a/src/mainboard/google/brya/variants/taeko/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/taeko/memory/dram_id.generated.txt index fda303c..4787674 100644 --- a/src/mainboard/google/brya/variants/taeko/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/taeko/memory/dram_id.generated.txt @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taeko/memory src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taeko/memory/ src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt DRAM Part Name ID to assign MT53E512M32D2NP-046 WT:E 0 (0000) @@ -10,3 +10,5 @@ MT53E512M32D1NP-046 WT:B 0 (0000) K4U6E3S4AB-MGCL 0 (0000) H54G46CYRBX267 0 (0000) +K4UBE3D4AB-MGCL 1 (0001) +MT53E1G32D2NP-046 WT:B 1 (0001) diff --git a/src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt index dd80fc8..6f7967f 100644 --- a/src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/taeko/memory/mem_parts_used.txt @@ -4,3 +4,5 @@ MT53E512M32D1NP-046 WT:B K4U6E3S4AB-MGCL H54G46CYRBX267 +K4UBE3D4AB-MGCL +MT53E1G32D2NP-046 WT:B -- To view, visit https://review.coreboot.org/c/coreboot/+/79184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I221ad3f490f24b43fe1ccd211014787eab5d1038 Gerrit-Change-Number: 79184 Gerrit-PatchSet: 3 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/asus/p8z77-m_pro: Drop useless early init code
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73693?usp=email ) Change subject: mb/asus/p8z77-m_pro: Drop useless early init code ...................................................................... mb/asus/p8z77-m_pro: Drop useless early init code Drop code that puts Super I/O into config mode, select serial device, then leave config mode right away having done nothing. I'll also take this chance to revise its #includes based on include-what-you-use results. Change-Id: I304fc1610740375b59121b6b8784122440795838 Signed-off-by: Keith Hui <buurin(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73693 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c 1 file changed, 1 insertion(+), 9 deletions(-) Approvals: Nico Huber: Looks good to me, but someone else must approve build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c index c8d5e33..cec5070 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <device/pnp_ops.h> +#include <device/pnp_type.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> @@ -12,7 +12,6 @@ #include <northbridge/intel/sandybridge/raminit.h> #include <northbridge/intel/sandybridge/pei_data.h> -#define GLOBAL_DEV PNP_DEV(0x2e, 0) #define SERIAL_DEV PNP_DEV(0x2e, NCT6779D_SP2) const struct southbridge_usb_port mainboard_usb_ports[] = { @@ -35,13 +34,6 @@ void bootblock_mainboard_early_init(void) { - /* Setup COM/UART */ - nuvoton_pnp_enter_conf_state(GLOBAL_DEV); - - /* TODO / FIXME: Setup Multifuncion/SIO pins for COM */ - - pnp_set_logical_device(SERIAL_DEV); - nuvoton_pnp_exit_conf_state(GLOBAL_DEV); nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } -- To view, visit https://review.coreboot.org/c/coreboot/+/73693?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304fc1610740375b59121b6b8784122440795838 Gerrit-Change-Number: 73693 Gerrit-PatchSet: 11 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Vlado Cibic Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/asus/p8z77-m: Properly configure early serial
by Felix Held (Code Review) 27 Nov '23

27 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79222?usp=email ) Change subject: mb/asus/p8z77-m: Properly configure early serial ...................................................................... mb/asus/p8z77-m: Properly configure early serial Board was not producing serial output until well into ramstage. To fix, select SUPERIO_NUVOTON_COMMON_COM_A Kconfig to tell nuvoton_enable_serial() to route serial port A signals to the outside, not GPIO8x. TEST=Full native raminit debug log received over serial by minicom. Change-Id: I376a79dd76ffa5f4d47e7c0cb53680e173e1ad78 Signed-off-by: Keith Hui <buurin(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79222 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/src/mainboard/asus/p8x7x-series/Kconfig b/src/mainboard/asus/p8x7x-series/Kconfig index 277fe40..e278b56 100644 --- a/src/mainboard/asus/p8x7x-series/Kconfig +++ b/src/mainboard/asus/p8x7x-series/Kconfig @@ -54,6 +54,7 @@ select BOARD_ROMSIZE_KB_8192 select MEMORY_MAPPED_TPM select SUPERIO_NUVOTON_NCT6779D + select SUPERIO_NUVOTON_COMMON_COM_A if BOARD_ASUS_P8X7X_SERIES -- To view, visit https://review.coreboot.org/c/coreboot/+/79222?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I376a79dd76ffa5f4d47e7c0cb53680e173e1ad78 Gerrit-Change-Number: 79222 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Enable CNVi Bluetooth
by Weimin Wu (Code Review) 27 Nov '23

27 Nov '23

Attention is currently required from: Dolan Liu, Eric Lai, Nick Vaccaro, Paul Menzel, Subrata Banik. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79055?usp=email ) Change subject: mb/google/nissa/var/anraggar: Enable CNVi Bluetooth ...................................................................... Patch Set 6: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79055/comment/72350b43_f86126cc : PS5, Line 2: wuweimin > Please fix this (and all other commits) to use Weimin Wu: […] Done https://review.coreboot.org/c/coreboot/+/79055/comment/7bc8098b_3168de88 : PS5, Line 9: Enable Bluetooth USB port for CNVi WLAN. > Please elaborate. Done https://review.coreboot.org/c/coreboot/+/79055/comment/d6c58b6f_884f2ff1 : PS5, Line 12: TEST=Bluetooth function verification passed > What command is run for this? Done https://review.coreboot.org/c/coreboot/+/79055/comment/ed522043_cc2c4bf5 : PS5, Line 15: wuweimin > Ditto. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79055?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcae800836c17307bc133de5a91658f6dda5985c Gerrit-Change-Number: 79055 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 27 Nov 2023 14:38:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2023