coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

1 participants
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[S] Change in coreboot[main]: build system: Exempt `make *config` from strict symbol checks
by Uwe Poeche (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Martin L Roth, Patrick Georgi, uwe taz. Uwe Poeche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79298?usp=email ) Change subject: build system: Exempt `make *config` from strict symbol checks ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: This helps to get working config files with unknown symbols/config switches to prevent error if using menuconfig or olddefconfig which I got with CB:79259. For test I built a mainboard (siemens/mc_apl4) with BUILD_TIMELESS=1 with and without the patch and compared the rom File. The results are binary identically. Anyway two small things I noticed: 1) Before the patch I got some Numbers of unknown config switches but after menuconfig/save or olddefconfig I found many other switches which were deleted from config file. It seems that it helps also for config switches from 3rdparty modules? 2) After build it seems a artefact in coreboot tree: a untracked file include/generated/rustc_cfg. -- To view, visit https://review.coreboot.org/c/coreboot/+/79298?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If427e075766c68d493dd406609f21b6bb27d1d74 Gerrit-Change-Number: 79298 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: uwe taz <uwepoeche(a)arcor.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: uwe taz <uwepoeche(a)arcor.de> Gerrit-Comment-Date: Wed, 29 Nov 2023 10:10:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya: Centralize SOC_INTEL_STORE_ISH_FW_VERSION config
by Subrata Banik (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Dinesh Gehlot, Ivan Chen, Kapil Porwal, Nick Vaccaro, Paul Menzel. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79338?usp=email ) Change subject: mb/google/brya: Centralize SOC_INTEL_STORE_ISH_FW_VERSION config ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79338/comment/4874d322_d3efd32f : PS2, Line 9: This patch enables the SOC_INTEL_STORE_ISH_FW_VERSION config for Brya : and Nissa variants to store the ISH FW version to accessible memory. > Reading the diff, it seems to have been enabled for Nissa variants already? It’d be great, if you co […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/79338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99dab43ae4e13869b7f8797a9c4014f60e38a595 Gerrit-Change-Number: 79338 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 10:06:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya: Centralize SOC_INTEL_STORE_ISH_FW_VERSION config
by Subrata Banik (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Dinesh Gehlot, Ivan Chen, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Ivan Chen, Kapil Porwal, Nick Vaccaro, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79338?usp=email to look at the new patch set (#3). Change subject: mb/google/brya: Centralize SOC_INTEL_STORE_ISH_FW_VERSION config ...................................................................... mb/google/brya: Centralize SOC_INTEL_STORE_ISH_FW_VERSION config This patch moves the SOC_INTEL_STORE_ISH_FW_VERSION config from the Nissa baseboard to BOARD_GOOGLE_BRYA_COMMON. This allows all baseboards to retrieve the ISH version and store it into memory. Ensure SOC_INTEL_STORE_ISH_FW_VERSION is enabled only for platforms with ISH support (DRIVERS_INTEL_ISH). Additionally, the dedicated SOC_INTEL_STORE_ISH_FW_VERSION config selection for the Nissa baseboard is no longer needed. BUG=b:280722061 TEST=Able to build and boot google/marasov. Change-Id: I99dab43ae4e13869b7f8797a9c4014f60e38a595 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/79338/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99dab43ae4e13869b7f8797a9c4014f60e38a595 Gerrit-Change-Number: 79338 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1
by Werner Zeh (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Mario Scheithauer, Paul Menzel. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79334?usp=email ) Change subject: mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1 ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79334/comment/8edcbef9_cf97118a : PS1, Line 12: On mc_ehl1, memory-down configuration is used and there is no SPD EEPROM > I’d add a blank line between paragraphs. OK, will do. https://review.coreboot.org/c/coreboot/+/79334/comment/609e19c2_a6891fa9 : PS1, Line 19: Test=Boot into Linux and make sure a write access into the EEPROM is : possible. > Maybe list the command you used to do that. Not sure if this is helpful here, I have used an own tool which is based on i2c-tools (but is not i2c-tools as it is). And it is, in the end, not the most important information at all, INMO. -- To view, visit https://review.coreboot.org/c/coreboot/+/79334?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b0fcdbeb0dbf971cfdceb70d6f4845765a3bdb6 Gerrit-Change-Number: 79334 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 10:05:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1
by Werner Zeh (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Mario Scheithauer, Paul Menzel, Werner Zeh. Hello Mario Scheithauer, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79334?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Code-Review+2 by Mario Scheithauer, Verified+1 by build bot (Jenkins) Change subject: mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1 ...................................................................... mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1 The address space of possible SPD-EEPROMs 0x50..0x53 on the SMBus interface is per default write-protected in FSP. This avoids that an SPD-EEPROM on a DRAM module gets overwritten by the host. On mc_ehl1, memory-down configuration is used and there is no SPD EEPROM available. Nevertheless, there is a general purpose EEPROM on the same address available which needs to stay writeable. This patch disables the default-enabled write protect feature for the SPD-EEPROM addresses just for mc_ehl1. Test=Boot into Linux and make sure a write access into the EEPROM is possible. Change-Id: I6b0fcdbeb0dbf971cfdceb70d6f4845765a3bdb6 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/romstage_fsp_params.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/79334/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79334?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b0fcdbeb0dbf971cfdceb70d6f4845765a3bdb6 Gerrit-Change-Number: 79334 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/brya: Enable ISH FW store config for supported variants
by Paul Menzel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Dinesh Gehlot, Ivan Chen, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79338?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/brya: Enable ISH FW store config for supported variants ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79338/comment/8e404fd4_2ee4b1a3 : PS2, Line 9: This patch enables the SOC_INTEL_STORE_ISH_FW_VERSION config for Brya : and Nissa variants to store the ISH FW version to accessible memory. Reading the diff, it seems to have been enabled for Nissa variants already? It’d be great, if you could rephrase to make that clear. (Maybe by also mentioning `DRIVERS_INTEL_ISH`.) -- To view, visit https://review.coreboot.org/c/coreboot/+/79338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99dab43ae4e13869b7f8797a9c4014f60e38a595 Gerrit-Change-Number: 79338 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 09:46:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/mtl: Display Sign-of-Life message using FSP-M
by Paul Menzel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Anil Kumar K, Dinesh Gehlot, Eran Mitrani, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Shelley Chen, Subrata Banik, Tarun. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78244?usp=email ) Change subject: soc/intel/mtl: Display Sign-of-Life message using FSP-M ...................................................................... Patch Set 23: (6 comments) File src/soc/intel/meteorlake/Kconfig: https://review.coreboot.org/c/coreboot/+/78244/comment/54714ab9_bec00689 : PS23, Line 463: depends on MAINBOARD_HAS_CHROMEOS Why this dependency? https://review.coreboot.org/c/coreboot/+/78244/comment/4bced432_e343a582 : PS23, Line 464: select VBT_CBFS_COMPRESSION_DEFAULT_LZ4 Why? https://review.coreboot.org/c/coreboot/+/78244/comment/7fd59793_b3223bad : PS23, Line 466: which display 1. which display*s* 2. … to display … https://review.coreboot.org/c/coreboot/+/78244/comment/ab8eb02b_1ca10f03 : PS23, Line 467: Memory memory https://review.coreboot.org/c/coreboot/+/78244/comment/cfa935da_60c29a07 : PS23, Line 467: configurable text message Where can this be configured? https://review.coreboot.org/c/coreboot/+/78244/comment/8641fbd7_8f52f49d : PS23, Line 468: and CSME update. It’d be nice, if you added as much information how the FSP-M graphics init works either here in the help text or the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/78244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8e7772582b1895fa8e38780932346683be998558 Gerrit-Change-Number: 78244 Gerrit-PatchSet: 23 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 09:44:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/glados/var/lars: Add Melfas touchscreen
by Paul Menzel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Felix Singer, Matt DeVillier. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79310?usp=email ) Change subject: mb/google/glados/var/lars: Add Melfas touchscreen ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79310?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idecd572335d7d5d52e4f89e85ebf7f0c90f23751 Gerrit-Change-Number: 79310 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 09:41:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/galdos/var/lars: Implement touchscreen power sequencing
by Paul Menzel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Felix Singer, Matt DeVillier. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79311?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/galdos/var/lars: Implement touchscreen power sequencing ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/glados/variants/lars/overridetree.cb: https://review.coreboot.org/c/coreboot/+/79311/comment/e321c16f_c5e34f06 : PS1, Line 23: register "reset_delay_ms" = "20" What is the source for the timing values? -- To view, visit https://review.coreboot.org/c/coreboot/+/79311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49ccb29ec4589315a4abe3c0ea8fa76f97080bcd Gerrit-Change-Number: 79311 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 09:40:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: libpayload: Fix the stack and data labels
by Paul Menzel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Yi Chou. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79144?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: libpayload: Fix the stack and data labels ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79144/comment/82b944df_311f94c8 : PS7, Line 9: the consistency between _stack/_estack and the other : labels Reads not so fluent to me. Maybe: … _stack/_estack and the other labels are consistent. File payloads/libpayload/arch/arm/libpayload.ldscript: https://review.coreboot.org/c/coreboot/+/79144/comment/a00ca8c3_4cc0b7da : PS7, Line 43: . = ALIGN(16); Excuse my ignorance, but why the alignment? -- To view, visit https://review.coreboot.org/c/coreboot/+/79144?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I589040f4db60b35813ea9f4ba9503244bd7def00 Gerrit-Change-Number: 79144 Gerrit-PatchSet: 7 Gerrit-Owner: Yi Chou <yich(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yi Chou <yich(a)google.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 09:39:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2023