coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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3036 discussions

[S] Change in coreboot[main]: vendorcode/amd/opensil: Implement cbmem_top_chipset
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth. Felix Held has uploaded a new patch set (#8) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76513?usp=email ) Change subject: vendorcode/amd/opensil: Implement cbmem_top_chipset ...................................................................... vendorcode/amd/opensil: Implement cbmem_top_chipset Use an xPRF call to get the top of lower DRAM. Organize Makefile to keep romstage/ramstage components separate. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Martin Roth <gaumless(a)gmail.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 --- M src/vendorcode/amd/opensil/genoa_poc/Makefile.inc A src/vendorcode/amd/opensil/genoa_poc/romstage.c 2 files changed, 28 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/76513/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/76513?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 Gerrit-Change-Number: 76513 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/galdos/var/lars: Implement touchscreen power sequencing
by Matt DeVillier (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Felix Singer, Paul Menzel. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79311?usp=email ) Change subject: mb/google/galdos/var/lars: Implement touchscreen power sequencing ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/glados/variants/lars/overridetree.cb: https://review.coreboot.org/c/coreboot/+/79311/comment/c8149104_a46785d4 : PS1, Line 23: register "reset_delay_ms" = "20" > What is the source for the timing values? pulled from another Melfas entry in coreboot, tested and verified working. -- To view, visit https://review.coreboot.org/c/coreboot/+/79311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49ccb29ec4589315a4abe3c0ea8fa76f97080bcd Gerrit-Change-Number: 79311 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 29 Nov 2023 15:13:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/genoa: Implement romstage
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Martin L Roth, Paul Menzel, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76514?usp=email ) Change subject: soc/amd/genoa: Implement romstage ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/genoa/romstage.c: https://review.coreboot.org/c/coreboot/+/76514/comment/2f0eab49_e6b6889f : PS6, Line 3: #include <cbmem.h> > might be good to sort the include Done -- To view, visit https://review.coreboot.org/c/coreboot/+/76514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139 Gerrit-Change-Number: 76514 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 29 Nov 2023 15:12:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/genoa: Implement romstage
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth, Paul Menzel, Varshit Pandya. Felix Held has uploaded a new patch set (#7) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76514?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Felix Held, Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: soc/amd/genoa: Implement romstage ...................................................................... soc/amd/genoa: Implement romstage The only thing romstage needs to do is find cbmem_top. TESTED: reaches ramstage. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139 --- M src/soc/amd/genoa/romstage.c 1 file changed, 9 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/76514/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/76514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139 Gerrit-Change-Number: 76514 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: vendorcode/amd/opensil: Implement cbmem_top_chipset
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Martin L Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76513?usp=email ) Change subject: vendorcode/amd/opensil: Implement cbmem_top_chipset ...................................................................... Patch Set 6: (1 comment) File src/vendorcode/amd/opensil/genoa_poc/romstage.c: https://review.coreboot.org/c/coreboot/+/76513/comment/342ac756_32ea74e7 : PS6, Line 16: top_mem > i'd replace this with top_mem - CONFIG_SMM_TSEG_SIZE and drop line 14. […] solved this a bit differently by moving top_mem -= CONFIG_SMM_TSEG_SIZE into the if (CONFIG_SMM_TSEG_SIZE) block -- To view, visit https://review.coreboot.org/c/coreboot/+/76513?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 Gerrit-Change-Number: 76513 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 29 Nov 2023 15:09:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: vendorcode/amd/opensil: Implement cbmem_top_chipset
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Martin L Roth. Felix Held has uploaded a new patch set (#7) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76513?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: vendorcode/amd/opensil: Implement cbmem_top_chipset ...................................................................... vendorcode/amd/opensil: Implement cbmem_top_chipset Use an xPRF call to get the top of lower DRAM. Organize Makefile to keep romstage/ramstage components separate. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 --- M src/vendorcode/amd/opensil/genoa_poc/Makefile.inc A src/vendorcode/amd/opensil/genoa_poc/romstage.c 2 files changed, 28 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/76513/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/76513?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 Gerrit-Change-Number: 76513 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: vendorcode/amd/opensil/genoa: Implement console callback
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76512?usp=email ) Change subject: vendorcode/amd/opensil/genoa: Implement console callback ...................................................................... Patch Set 11: (3 comments) File src/vendorcode/amd/opensil/genoa_poc/opensil_console.c: https://review.coreboot.org/c/coreboot/+/76512/comment/d4542e01_7b14d71e : PS10, Line 34: char prefix[60]; : snprintf(prefix, sizeof(prefix), "%s%s:%d:", SilPrefix, (uintptr_t)Function, Line); > this doesn't need to be formatted to a buffer and we can use printk directly here Done https://review.coreboot.org/c/coreboot/+/76512/comment/a467056d_5b336e9d : PS10, Line 35: %d > %zu Done https://review.coreboot.org/c/coreboot/+/76512/comment/ca95bd02_34e96d22 : PS10, Line 35: (uintptr_t) > this cast looks wrong Done -- To view, visit https://review.coreboot.org/c/coreboot/+/76512?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I208eea37ffde64a2311cb9f51e2bcd1ac3dbad4d Gerrit-Change-Number: 76512 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 29 Nov 2023 14:59:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: vendorcode/amd/opensil/genoa: Implement console callback
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Varshit Pandya. Felix Held has uploaded a new patch set (#11) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76512?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: vendorcode/amd/opensil/genoa: Implement console callback ...................................................................... vendorcode/amd/opensil/genoa: Implement console callback OpenSIL has an API to call back into the host firmware to print to the console. These could be moved to a common directory when there are more openSIL implementations to see if it is actually common. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Martin Roth <gaumless(a)gmail.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I208eea37ffde64a2311cb9f51e2bcd1ac3dbad4d --- M src/vendorcode/amd/opensil/Makefile.inc A src/vendorcode/amd/opensil/genoa_poc/Makefile.inc A src/vendorcode/amd/opensil/genoa_poc/filter.h M src/vendorcode/amd/opensil/genoa_poc/meson_cross.template A src/vendorcode/amd/opensil/genoa_poc/opensil_console.c A src/vendorcode/amd/opensil/genoa_poc/opensil_console.h 6 files changed, 89 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/76512/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/76512?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I208eea37ffde64a2311cb9f51e2bcd1ac3dbad4d Gerrit-Change-Number: 76512 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: vendorcode/amd/opensil/genoa: Implement console callback
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76512?usp=email ) Change subject: vendorcode/amd/opensil/genoa: Implement console callback ...................................................................... Patch Set 10: (4 comments) Patchset: PS10: i'll rework this patch File src/vendorcode/amd/opensil/genoa_poc/opensil_console.c: https://review.coreboot.org/c/coreboot/+/76512/comment/13c2306b_440b52f7 : PS10, Line 34: char prefix[60]; : snprintf(prefix, sizeof(prefix), "%s%s:%d:", SilPrefix, (uintptr_t)Function, Line); this doesn't need to be formatted to a buffer and we can use printk directly here https://review.coreboot.org/c/coreboot/+/76512/comment/a1580856_883b625c : PS10, Line 35: (uintptr_t) this cast looks wrong https://review.coreboot.org/c/coreboot/+/76512/comment/5c16cf90_aab8c75c : PS10, Line 35: %d %zu -- To view, visit https://review.coreboot.org/c/coreboot/+/76512?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I208eea37ffde64a2311cb9f51e2bcd1ac3dbad4d Gerrit-Change-Number: 76512 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 29 Nov 2023 14:52:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: vendorcode/amd/opensil: Add initial setup and API calls
by Felix Held (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Martin L Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76515?usp=email ) Change subject: vendorcode/amd/opensil: Add initial setup and API calls ...................................................................... Patch Set 6: (2 comments) File src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/76515/comment/75affd2e_d43e2482 : PS6, Line 7: might be good to do the whitespace changes in a separate patch. same below in lines 59 and 170 File src/vendorcode/amd/opensil/genoa_poc/ramstage.c: https://review.coreboot.org/c/coreboot/+/76515/comment/0964724c_78de042a : PS6, Line 86: BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, opensil_entry, (void *)SIL_TP1); we should probably look into removing the BOOT_STATE_INIT_ENTRY in this file and have the few calls in the soc code or possibly some common amd opensil code to have more control over the timing of those calls. i'd say adding a TODO comment for this should be the way to go here -- To view, visit https://review.coreboot.org/c/coreboot/+/76515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4833a5a86034a13e6be102a6b68c3bb54108bc9a Gerrit-Change-Number: 76515 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 29 Nov 2023 14:37:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2023