coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

1 participants
3037 discussions

[L] Change in coreboot[main]: mb/google/brox: Update storage settings for SSD and UFS
by Shelley Chen (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Ivy Jian, Karthik Ramasubramanian. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79295?usp=email ) Change subject: mb/google/brox: Update storage settings for SSD and UFS ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/79295?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I88922bcfa13652006aa10078c3c444624fd4575e Gerrit-Change-Number: 79295 Gerrit-PatchSet: 3 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yen-hsing Lee <yen-hsing.lee(a)quanta.corp-partner.google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 18:38:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: build system: Exempt `make *config` from strict symbol checks
by Mike Banon (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Patrick Georgi, Uwe Poeche, uwe taz. Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79298?usp=email ) Change subject: build system: Exempt `make *config` from strict symbol checks ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: This patch really helps to use the old configs -- To view, visit https://review.coreboot.org/c/coreboot/+/79298?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If427e075766c68d493dd406609f21b6bb27d1d74 Gerrit-Change-Number: 79298 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: uwe taz <uwepoeche(a)arcor.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: uwe taz <uwepoeche(a)arcor.de> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 17:42:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: vc/intel/fsp/mtl: Export pre-memory graphics FSP-M UPDs
by Jérémy Compostella (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Martin L Roth, Subrata Banik. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78654?usp=email ) Change subject: vc/intel/fsp/mtl: Export pre-memory graphics FSP-M UPDs ...................................................................... Patch Set 13: (1 comment) Patchset: PS12: > I assume this CL is no more required if we are uprev to FSP 3424. […] Correct. We can abandon it when the time comes. -- To view, visit https://review.coreboot.org/c/coreboot/+/78654?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff4467720541efbdedace12431cd1f6f66fca8e7 Gerrit-Change-Number: 78654 Gerrit-PatchSet: 13 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 17:42:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/mtl: Display Sign-of-Life message using FSP-M
by Jérémy Compostella (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Anil Kumar K, Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Martin L Roth, Martin Roth, Paul Menzel, Pratikkumar V Prajapati, Shelley Chen, Subrata Banik, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Martin L Roth, Martin Roth, Pratikkumar V Prajapati, Shelley Chen, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78244?usp=email to look at the new patch set (#26). Change subject: soc/intel/mtl: Display Sign-of-Life message using FSP-M ...................................................................... soc/intel/mtl: Display Sign-of-Life message using FSP-M Meteor Lake Firmware Support Package (FSP-M) for ChromeOS includes an pre-memory graphics driver which can be leverage to display a text message thanks to the following FSP-M UPD (Updateable Product Data): - VgaInitControl (bitfield): Bit 0: Turn on graphics, setup VGA text mode and display `VgaMessage' text centered on the screen. Bit 1: Clear text and tear down VGA text mode and graphics before returning from FSP-M. - VbtPtr (address): Pointer to the VBT (Video BIOS Tables) binary. - VbtSize (unsigned int): Size of the VBT binary. - LidStatus (boolean): Due to limited resources at early boot stages, the text message is displayed on a single monitor. The lid status helps decide which display is the most appropriate. 0: Lid is closed: show the text message on the external display if available, do not display anything otherwise. 1: Lid is open: show the message on the internal display if available, use an external display if available otherwise. - VgaMessage (string): Text message to display. If the `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' flag is set, coreboot configures the UPDs above to display a text message during memory training and CSME update. The text message can be configured via the locale text mechanism using the `memory_training_desc' name. The `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' selects the LZ4 compression algorithm for VBT because LZMA decompression is not available in romstage by default and adding LZMA support increases the romstage binary size more than the VBT binary is reduced. BUG=b:279173035 TEST=Text message is displayed during memory training on a rex board Change-Id: I8e7772582b1895fa8e38780932346683be998558 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/soc/intel/meteorlake/Kconfig M src/soc/intel/meteorlake/romstage/fsp_params.c 2 files changed, 64 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/78244/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/78244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8e7772582b1895fa8e38780932346683be998558 Gerrit-Change-Number: 78244 Gerrit-PatchSet: 26 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/intel/meteorlake: Add entries to eventLog on invocation of early SOL
by Jérémy Compostella (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jérémy Compostella, Kapil Porwal, Paul Menzel, Tarun. Jérémy Compostella has uploaded a new patch set (#11) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/78983?usp=email ) Change subject: soc/intel/meteorlake: Add entries to eventLog on invocation of early SOL ...................................................................... soc/intel/meteorlake: Add entries to eventLog on invocation of early SOL This patch records early signs of user activity during CSE firmware synchronization or MRC (re)training events in the event log (ELOG_TYPE_FW_EARLY_SOL). These can be used to ensure persistence across global reset (e.g. after CSE sync) so that they can be later retrieved in order to build things such as test automation ensuring that we went through the SOL path/display initialized. BUG=b:279173035 TEST=Verified on google/rex, event shows in eventlog after CSE sync and/or MRC. Scenario #1: While performing MRC update 1 | 2023-11-08 | Early Sign of Life | MRC Early SOL Screen Shown 2 | 2023-11-08 | Memory Cache Update | Normal | Success 3 | 2023-11-08 | System boot | 9 4 | 2023-11-08 | ACPI Wake | S5 Scenario #2: While performing CSE update/downgrade 11 | 2023-11-08 | Early Sign of Life | CSE Sync Early SOL Screen Shown 12 | 2023-11-08 | System boot | 13 Scenario #2: While performing both MRC and CSE upgrade 16 | 2023-11-08 | Early Sign of Life | MRC Early SOL Screen Shown 17 | 2023-11-08 | Early Sign of Life | CSE Sync Early SOL Screen Shown 18 | 2023-11-08 | Memory Cache Update | Normal | Success 19 | 2023-11-08 | System boot | 16 20 | 2023-11-08 | ACPI Wake | S5 Change-Id: Idfa6f216194fd311bb1a57dd7c86fe7446a3597c Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/meteorlake/romstage/fsp_params.c 1 file changed, 9 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/78983/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/78983?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idfa6f216194fd311bb1a57dd7c86fe7446a3597c Gerrit-Change-Number: 78983 Gerrit-PatchSet: 11 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/mtl: Display Sign-of-Life message using FSP-M
by Jérémy Compostella (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Anil Kumar K, Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Martin L Roth, Martin Roth, Paul Menzel, Pratikkumar V Prajapati, Shelley Chen, Subrata Banik, Tarun. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78244?usp=email ) Change subject: soc/intel/mtl: Display Sign-of-Life message using FSP-M ...................................................................... Patch Set 23: (6 comments) File src/soc/intel/meteorlake/Kconfig: https://review.coreboot.org/c/coreboot/+/78244/comment/a7d5324c_84fcfe5d : PS23, Line 463: depends on MAINBOARD_HAS_CHROMEOS > Why this dependency? Because on Meteor Lake, the PEIM graphics driver is only available to the chrome OS program. The new commit message reflects this. https://review.coreboot.org/c/coreboot/+/78244/comment/c8ba5cc7_deb00a46 : PS23, Line 464: select VBT_CBFS_COMPRESSION_DEFAULT_LZ4 > Why? Because by default LZMA compression algorithn is not available in romstage. Adding the support of LZMA in romstage undermine the benefit of compressing VBT with LZMA. https://review.coreboot.org/c/coreboot/+/78244/comment/45c410ae_f2ebc85d : PS23, Line 466: which display > 1. which display*s* […] Done https://review.coreboot.org/c/coreboot/+/78244/comment/c132965e_813b0f76 : PS23, Line 467: Memory > memory Done https://review.coreboot.org/c/coreboot/+/78244/comment/451db51d_ea46bd15 : PS23, Line 467: configurable text message > Where can this be configured? I updated the commit message to provide this information. https://review.coreboot.org/c/coreboot/+/78244/comment/3e9d3da0_fe454f6a : PS23, Line 468: and CSME update. > It’d be nice, if you added as much information how the FSP-M graphics init works either here in the […] I added details in the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/78244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8e7772582b1895fa8e38780932346683be998558 Gerrit-Change-Number: 78244 Gerrit-PatchSet: 23 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 29 Nov 2023 17:11:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/mtl: Display Sign-of-Life message using FSP-M
by Jérémy Compostella (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Anil Kumar K, Dinesh Gehlot, Eran Mitrani, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Pratikkumar V Prajapati, Shelley Chen, Subrata Banik, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Martin L Roth, Martin Roth, Pratikkumar V Prajapati, Shelley Chen, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78244?usp=email to look at the new patch set (#24). The following approvals got outdated and were removed: Code-Review+1 by Pratikkumar V Prajapati, Verified+1 by build bot (Jenkins) Change subject: soc/intel/mtl: Display Sign-of-Life message using FSP-M ...................................................................... soc/intel/mtl: Display Sign-of-Life message using FSP-M Meteor Lake Firmware Support Package (FSP-M) for ChromeOS includes an pre-memory graphics driver which can be leverage to display a text message thanks to the following FSP-M UPD (Updateable Product Data): - VgaInitControl (bitfield): Bit 0: Turn on graphics, setup VGA text mode and display `VgaMessage' text centered on the screen. Bit 1: Clear text and tear down VGA text mode and graphics before returning from FSP-M. - VbtPtr (address): Pointer to the VBT (Video BIOS Tables) binary. - VbtSize (unsigned int): Size of the VBT binary. - LidStatus (boolean): Due to limited resources at early boot stages, the text message is displayed on a single monitor. The lid status helps decide which display is the most appropriate. 0: Lid is closed: show the text message on the external display if avaiable, do not display anything otherwise. 1: Lid is open: show the message on the internal display if available, use an external display if available otherwise. - VgaMessage (string): Text message to display. If the `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' flag is set, coreboot configures the UPDs above to display a text message during memory training and CSME update. The text message can be configured via the locale text mechanism using the `memory_training_desc' name. The `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' selects the LZ4 compression algorithm for VBT because LZMA decompression is not available in romstage by default and adding LZMA support increases the romstage binary size more than the VBT binary is reduced. BUG=b:279173035 TEST=Text message is displayed during memory training on a rex board Change-Id: I8e7772582b1895fa8e38780932346683be998558 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/soc/intel/meteorlake/Kconfig M src/soc/intel/meteorlake/romstage/fsp_params.c 2 files changed, 64 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/78244/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/78244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8e7772582b1895fa8e38780932346683be998558 Gerrit-Change-Number: 78244 Gerrit-PatchSet: 24 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/amd: Add DBG2 ACPI table
by Raul Rangel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Bao Zheng, Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Simon Glass, Tim Wawrzynczak, Zheng Bao. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79174?usp=email ) Change subject: soc/amd: Add DBG2 ACPI table ...................................................................... Patch Set 10: (1 comment) File src/soc/amd/common/block/acpi/tables.c: https://review.coreboot.org/c/coreboot/+/79174/comment/d9142772_e5a0b715 : PS10, Line 15: current = acpi_16550_mmio32_write_dbg2_uart(rsdp, current, You need to guard this with `if CONFIG(AMD_SOC_CONSOLE_UART)` -- To view, visit https://review.coreboot.org/c/coreboot/+/79174?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c97a78d1889549421baf0bc1a2e8f959a0f47e2 Gerrit-Change-Number: 79174 Gerrit-PatchSet: 10 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 29 Nov 2023 16:20:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: [UNTESTED] acpi/acpi: add & use ACPI_DBG2_PORT_SERIAL_16550_GENERIC
by Raul Rangel (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Cliff Huang, Felix Held, Lance Zhao, Tim Wawrzynczak. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79219?usp=email ) Change subject: [UNTESTED] acpi/acpi: add & use ACPI_DBG2_PORT_SERIAL_16550_GENERIC ...................................................................... Patch Set 1: (2 comments) File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/79219/comment/9e6d4bd6_7c36be96 : PS1, Line 869: ACPI_DBG2_PORT_SERIAL_16550 Maybe rename this one to `ACPI_DBG2_PORT_SERIAL_16550_IO_ONLY` https://review.coreboot.org/c/coreboot/+/79219/comment/90c9b67e_93f13053 : PS1, Line 875: ACPI_DBG2_PORT_SERIAL_16550_GENERIC If you rename the 0x00 one, maybe we can just call this `ACPI_DBG2_PORT_SERIAL_16550`? -- To view, visit https://review.coreboot.org/c/coreboot/+/79219?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I816bb22e6f76e661c8b8e39a2a4cb83b0085acb5 Gerrit-Change-Number: 79219 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 29 Nov 2023 16:18:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/genoa: Implement romstage
by Varshit Pandya (Code Review) 29 Nov '23

29 Nov '23

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth, Paul Menzel. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76514?usp=email ) Change subject: soc/amd/genoa: Implement romstage ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139 Gerrit-Change-Number: 76514 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 29 Nov 2023 16:15:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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