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Change subject: Kconfig: Move rustccfg file to a more benign place
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/rex/var/deku: Enable LAN0, LAN1
......................................................................
Patch Set 7:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79292/comment/aafe5cd8_b59e7fb1 :
PS4, Line 9: Add overridetree.cb entry to configure the LAN0 LAN1 devices.
> Maybe add an introductory sentence. google/deku is a Chromebox featuring two LAN ports.
Done
File src/mainboard/google/rex/variants/deku/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/79292/comment/0762781d_e66fe160 :
PS4, Line 72: #PCIE7 LAN1 card
> Please add a space after the #.
Done
https://review.coreboot.org/c/coreboot/+/79292/comment/516d66e9_a9804877 :
PS4, Line 87: #PCIE10 LAN0 card
> Please add a space after the #.
Done
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Change subject: superio/smsc: Add support for the SCH555x series
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
> The reason I have pushed a rebase is because somebody else wanted to use the optiplex 7020 port. […]
I've looked at this again, and based on the complexity of the sch5545 code, I think this would take more effort than I'd like to spend on this, and I don't think this is blocking the Optiplex 7020 port from being usable.
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Change subject: mb/dell: Add OptiPlex 7020/9020 port
......................................................................
Patch Set 27:
(8 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55232/comment/c1276ca4_3eaa0ba3 :
PS22, Line 12: Linux
> Please document the version of the Linux kernel used for testing, and the payload you used.
I've tested many kernel versions ranging from 4.4 to present day now, all worked.
https://review.coreboot.org/c/coreboot/+/55232/comment/61ed688a_b36311e0 :
PS22, Line 15: VGA BIOS
> Executed by SeaBIOS or by coreboot?
Been tested with both, but libgfxinit is the focus, and this port has been used by a few people for 2 years.
File src/mainboard/dell/optiplex_7020/Kconfig:
https://review.coreboot.org/c/coreboot/+/55232/comment/b3193ed3_a363333d :
PS5, Line 23: needs flashed
> needs to be
Acknowledged
https://review.coreboot.org/c/coreboot/+/55232/comment/21c2a870_a1429232 :
PS5, Line 23: than
> then
Acknowledged
File src/mainboard/dell/optiplex_7020/bootblock.c:
https://review.coreboot.org/c/coreboot/+/55232/comment/eda90a52_1813f898 :
PS8, Line 108: // Changes LED color among a few other things (extracted from Dell's FW)
> Here's an idea: If you know how to control LEDs, you can implement die_notify() and make some LEDs b […]
Acknowledged
File src/mainboard/dell/optiplex_7020/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/55232/comment/8aa13f9c_e998442d :
PS1, Line 20: Scope (\_SB)
: {
: Device (PCI0)
: {
: #include <northbridge/intel/haswell/acpi/hostbridge.asl>
: #include <southbridge/intel/lynxpoint/acpi/pch.asl>
: }
: }
> I usually write this as follows: […]
Done
File src/mainboard/dell/optiplex_7020/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/55232/comment/e8637c82_bf1511d5 :
PS1, Line 11: -- TODO: Add DP ports to the list
> I added all of them, I don't have many DP displays to test things with.
Acknowledged
File src/mainboard/dell/optiplex_9020/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/55232/comment/6d26d64f_ce62e809 :
PS25, Line 39: device pci 1c.1 off end
:
> The mini tower (MT) variant has two additional slots compared to the UFF variant: […]
I've implemented this now.
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Attention is currently required from: Angel Pons, Michael Büchler, Michał Żygowski, Máté Kukri.
Hello Angel Pons, Martin L Roth, Michael Büchler, Patrick Rudolph, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55232?usp=email
to look at the new patch set (#29).
Change subject: mb/dell: Add OptiPlex 7020/9020 port
......................................................................
mb/dell: Add OptiPlex 7020/9020 port
The OptiPlex 7020 and 9020 use physically identical motherboards.
Each model comes in the following form factors:
- 7020: SFF, MT
- 9020: USFF (not currently supported), SFF, MT
(7020 SFF) Boots Linux and Windows 10:
- Tested with an i3-4160 and i5-4460
- DRAM init works using the MRC (4G, 4G+4G)
- iGPU init works using libgfxinit (VGA, 2x DP)
- PCIe 16x: tested, ok
- PCIe 4x: tested, ok
- All USB2 and USB3 ports work
- SMSC SCH5555 Super I/O: serial works, PS/2 untested
- Audio: back and front output works, internal speaker works,
mic inputs untested
- Ethernet: tested, works
(9020 MT)
- Tested by Michael Büchler (thanks for the overridetree)
Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
Signed-off-by: Mate Kukri <kukri.mate(a)gmail.com>
---
A src/mainboard/dell/optiplex_9020/Kconfig
A src/mainboard/dell/optiplex_9020/Kconfig.name
A src/mainboard/dell/optiplex_9020/Makefile.inc
A src/mainboard/dell/optiplex_9020/acpi/ec.asl
A src/mainboard/dell/optiplex_9020/acpi/platform.asl
A src/mainboard/dell/optiplex_9020/acpi/superio.asl
A src/mainboard/dell/optiplex_9020/board_info.txt
A src/mainboard/dell/optiplex_9020/bootblock.c
A src/mainboard/dell/optiplex_9020/cmos.default
A src/mainboard/dell/optiplex_9020/cmos.layout
A src/mainboard/dell/optiplex_9020/data.vbt
A src/mainboard/dell/optiplex_9020/devicetree.cb
A src/mainboard/dell/optiplex_9020/dsdt.asl
A src/mainboard/dell/optiplex_9020/gma-mainboard.ads
A src/mainboard/dell/optiplex_9020/gpio.c
A src/mainboard/dell/optiplex_9020/hda_verb.c
A src/mainboard/dell/optiplex_9020/mainboard.c
A src/mainboard/dell/optiplex_9020/overridetree_mt.cb
A src/mainboard/dell/optiplex_9020/romstage.c
19 files changed, 697 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/55232/29
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I'd like you to reexamine a change. Please visit
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Verified-1 by build bot (Jenkins)
Change subject: mb/dell: Add OptiPlex 7020/9020 port
......................................................................
mb/dell: Add OptiPlex 7020/9020 port
The OptiPlex 7020 and 9020 use physically identical motherboards.
Each model comes in the following form factors:
- 7020: SFF, MT
- 9020: USFF (not currently supported), SFF, MT
(7020 SFF) Boots Linux and Windows 10:
- Tested with an i3-4160 and i5-4460
- DRAM init works using the MRC (4G, 4G+4G)
- iGPU init works using libgfxinit (VGA, 2x DP)
- PCIe 16x: tested, ok
- PCIe 4x: tested, ok
- All USB2 and USB3 ports work
- SMSC SCH5555 Super I/O: serial works, PS/2 untested
- Audio: back and front output works, internal speaker works,
mic inputs untested
- Ethernet: tested, works
(9020 MT)
- Tested by Michael Büchler (thanks for the overridetree)
Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
Signed-off-by: Mate Kukri <kukri.mate(a)gmail.com>
---
A src/mainboard/dell/optiplex_9020/Kconfig
A src/mainboard/dell/optiplex_9020/Kconfig.name
A src/mainboard/dell/optiplex_9020/Makefile.inc
A src/mainboard/dell/optiplex_9020/acpi/ec.asl
A src/mainboard/dell/optiplex_9020/acpi/platform.asl
A src/mainboard/dell/optiplex_9020/acpi/superio.asl
A src/mainboard/dell/optiplex_9020/board_info.txt
A src/mainboard/dell/optiplex_9020/bootblock.c
A src/mainboard/dell/optiplex_9020/cmos.default
A src/mainboard/dell/optiplex_9020/cmos.layout
A src/mainboard/dell/optiplex_9020/data.vbt
A src/mainboard/dell/optiplex_9020/devicetree.cb
A src/mainboard/dell/optiplex_9020/dsdt.asl
A src/mainboard/dell/optiplex_9020/gma-mainboard.ads
A src/mainboard/dell/optiplex_9020/gpio.c
A src/mainboard/dell/optiplex_9020/hda_verb.c
A src/mainboard/dell/optiplex_9020/mainboard.c
A src/mainboard/dell/optiplex_9020/overridetree_mt.cb
A src/mainboard/dell/optiplex_9020/romstage.c
19 files changed, 700 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/55232/28
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I'd like you to reexamine a change. Please visit
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Change subject: mb/dell: Add OptiPlex 7020/9020 port
......................................................................
mb/dell: Add OptiPlex 7020/9020 port
The OptiPlex 7020 and 9020 use physically identical motherboards.
Each model comes in the following form factors:
- 7020: SFF, MT
- 9020: USFF (not currently supported), SFF, MT
(7020 SFF) Boots Linux and Windows 10:
- Tested with an i3-4160 and i5-4460
- DRAM init works using the MRC (4G, 4G+4G)
- iGPU init works using libgfxinit (VGA, 2x DP)
- PCIe 16x: tested, ok
- PCIe 4x: tested, ok
- All USB2 and USB3 ports work
- SMSC SCH5555 Super I/O: serial works, PS/2 untested
- Audio: back and front output works, internal speaker works,
mic inputs untested
- Ethernet: tested, works
(9020 MT)
- Tested by Michael Büchler (thanks for the overridetree)
Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
Signed-off-by: Mate Kukri <kukri.mate(a)gmail.com>
---
A src/mainboard/dell/optiplex_9020/Kconfig
A src/mainboard/dell/optiplex_9020/Kconfig.name
A src/mainboard/dell/optiplex_9020/Makefile.inc
A src/mainboard/dell/optiplex_9020/acpi/ec.asl
A src/mainboard/dell/optiplex_9020/acpi/platform.asl
A src/mainboard/dell/optiplex_9020/acpi/superio.asl
A src/mainboard/dell/optiplex_9020/board_info.txt
A src/mainboard/dell/optiplex_9020/bootblock.c
A src/mainboard/dell/optiplex_9020/cmos.default
A src/mainboard/dell/optiplex_9020/cmos.layout
A src/mainboard/dell/optiplex_9020/data.vbt
A src/mainboard/dell/optiplex_9020/devicetree.cb
A src/mainboard/dell/optiplex_9020/dsdt.asl
A src/mainboard/dell/optiplex_9020/gma-mainboard.ads
A src/mainboard/dell/optiplex_9020/gpio.c
A src/mainboard/dell/optiplex_9020/hda_verb.c
A src/mainboard/dell/optiplex_9020/mainboard.c
A src/mainboard/dell/optiplex_9020/overridetree_mt.cb
A src/mainboard/dell/optiplex_9020/romstage.c
19 files changed, 698 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/55232/27
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I'd like you to reexamine a change. Please visit
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Change subject: Post-build control of serial
......................................................................
Post-build control of serial
Use the new 'coreboot Control Block' (CCB) to control console output,
including the very first bootblock banner.
Provide a feature in cbfstool to enable and disable the console output.
BUG=none
BRANCH=none
TEST=make (to build coreboot)
$ cbfstool build/coreboot.rom ccb-get -n console
console=loud
First try this to see that the bootblock outputs its banner:
$ qemu-system-i386 -bios build/coreboot.rom -nographic |head -5
[NOTE ] coreboot-4.21 Fri Nov 17 12:09:01 UTC 2023 x86_32
bootblock starting (log level: 7)...
...
Now set it to silent and try again, to see that the bootblock output is
suppressed, so that the first output shown is the romstage:
$ cbfstool build/coreboot.rom ccb-get -n console -V silent
console=silent
$ qemu-system-i386 -bios build/coreboot.rom -nographic
(no output)
Change-Id: I04e946b33035a493e833500351a0483761252613
Signed-off-by: Simon Glass <sjg(a)chromium.org>
---
M Documentation/util/cbfstool/ccb.md
M src/commonlib/include/commonlib/ccb.h
M src/console/console.c
M src/console/init.c
M src/include/console/streams.h
M util/cbfstool/cbfstool.c
6 files changed, 78 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/77712/7
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I04e946b33035a493e833500351a0483761252613
Gerrit-Change-Number: 77712
Gerrit-PatchSet: 7
Gerrit-Owner: Simon Glass <sjg(a)chromium.org>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
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Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
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