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Hello Felix Held, Shelley Chen,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: qualcomm/sc7180: Move QCSDI and increase romstage size
......................................................................
qualcomm/sc7180: Move QCSDI and increase romstage size
We need to increase romstage size a little to make a compiler upgrade
fit. Unfortunately the end of the romstage directly touches the QCSDI
region in the current memlayout, and there is no other way to reshuffle
things to make more space... so we need to move QCSDI out of the way.
This means that anyone who is actually building this platform with
CONFIG_QC_SDI_ENABLE (which requires a proprietary blob that's not
publicly available) will need to recompile their QCSDI binary to match
the new start address.
Change-Id: Iaf13e4001b3c763e3ec59009779931ec75603d5d
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/soc/qualcomm/sc7180/memlayout.ld
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/79074/2
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78958?usp=email )
Change subject: mb/google/geralt: Disable SD card support for Ciri
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/geralt/Kconfig:
https://review.coreboot.org/c/coreboot/+/78958/comment/e094339e_3931dd18 :
PS4, Line 70: bool
Just realized that this could be simplified using `def_bool`. Uploaded CB:79076.
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70771?usp=email )
Change subject: crossgcc: Upgrade GCC from 11.4.0 to 13.2.0
......................................................................
Patch Set 27:
(1 comment)
Patchset:
PS27:
> Julius, can you help on this issue? https://qa.coreboot. […]
Strangely enough, when I check out this patch and rebuild crossgcc, I do see an increase in size compared to the old compiler, but it still fits into 100K for me. Is there a reason I would get different results with the same compiler and same code?
Anyway, I dug into the reason for the size difference a little and identified a number of situations where the new GCC generates larger code (but also some where it's better). One example is that it doesn't seem to be as eager to produce separate jump tables for small-ish switch statements (easy to see in vb2_digest_extend()) — maybe that's some sort of branch predictor optimization so that might be an intended trade-off. I've also found one situation about accessing multiple indices in a global array that just seems to be a clear bug (easy to see in vboot's default vb2ex_hwcrypto_digest_finalize()), I filed that at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112573. There is also a big difference in LzmaDecode() which becomes over 1KB larger (~20% increase), but that code is a horrible mess even in source form so I'm afraid there's probably not much we can understand there.
In general, it would probably be a good idea to just always compare binary sizes during compiler uprevs (at least one board for each architecture) and record the findings in the commit message, so that we're at least aware of big changes and can try to investigate if necessary.
Anyway, this should fix the Trogdor issue: CB:79074
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Julius Werner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79074?usp=email )
Change subject: qualcomm/sc7180: Move QCSDI and increase romstage size
......................................................................
qualcomm/sc7180: Move QCSDI and increase romstage size
We need to increase romstage size a little to make a compiler upgrade
fit. Unfortunately the end of the romstage directly touches the QCSDI
region in the current memlayout, and there is no other way to reshuffle
things to make more space... so we need to move QCSDI out of the way.
This means that anyone who is actually building this platform with
CONFIG_QC_SDI_ENABLE (which requires a proprietary blob that's not
publicly available) will need to recompile their QCSDI binary to match
the new start address.
Change-Id: Iaf13e4001b3c763e3ec59009779931ec75603d5d
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/soc/qualcomm/sc7180/memlayout.ld
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/79074/1
diff --git a/src/soc/qualcomm/sc7180/memlayout.ld b/src/soc/qualcomm/sc7180/memlayout.ld
index e956c64..c6bb267 100644
--- a/src/soc/qualcomm/sc7180/memlayout.ld
+++ b/src/soc/qualcomm/sc7180/memlayout.ld
@@ -23,8 +23,8 @@
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
- OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 100K)
- REGION(qcsdi, 0x14699000, 52K, 4K)
+ OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K)
+ REGION(qcsdi, 0x1469ED00, 52K, 4K)
REGION(modem_id, 0x146ABD00, 4, 4)
SSRAM_END(0x146AE000)
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Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79106?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: arch/arm64: Extend cache helper functions
......................................................................
arch/arm64: Extend cache helper functions
This patch extends the cpu_get_cache_info function, so that
additional information like size of cache lines can be retrieved.
Furthermore, static functions were grouped and moved to the top and
non-static functions to the bottom, in order to provide a better
structure to the file.
Patch was tested against the qemu-sbsa mainboard.
Change-Id: If6fe731dc67ffeaff9344d2bd2627f45185c27de
Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com>
---
M src/arch/arm64/armv8/cache.c
M src/arch/arm64/include/armv8/arch/cache.h
2 files changed, 91 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/79106/2
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78849?usp=email )
Change subject: tests: Allow specifying vboot source directory
......................................................................
Patch Set 4:
(1 comment)
File Makefile:
https://review.coreboot.org/c/coreboot/+/78849/comment/85b0bcef_98971a45 :
PS4, Line 18: abspath
The problem with this patch is, when passing an absolute path to `-I`, `vboot-fixup-includes` in security/vboot/Makefile.inc will incorrectly prepend `$(top)` to the include path. While `vboot-fixup-includes` can definitely be fixed, I think it's better to leave `VBOOT_SOURCE` a relative path here. When running unit tests, we can still pass an absolute `VBOOT_SOURCE` to make.
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Change subject: docker/coreboot-sdk: Add perl modules for gcov
......................................................................
Patch Set 1: Code-Review+2
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