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Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78207?usp=email )
Change subject: mb: Enable VBOOT_LID_SWITCH by default
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/corsola/Kconfig:
https://review.coreboot.org/c/coreboot/+/78207/comment/03ca052b_94b07773 :
PS3, Line 51: config VBOOT_LID_SWITCH
: default n
I think corsola (and many other ARM boards) does have a LID switch - it's just that we usually copy from the previous platform and didn't know there are new options to turn on.
@yupingso is it safe to turn on VBOOT_LID_SWITCH? can you check?
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Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
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Change subject: soc/mediatek/mt8188: devapc: Update permission for master domain setup
......................................................................
soc/mediatek/mt8188: devapc: Update permission for master domain setup
Currently, all the masters controlled by DAPC are in domain 0. With
this setting, there is a potential security problem. For example, if a
certain master is somehow hacked, it may attempt to access registers
that it is not supposed to, with successful results. This is due to the
fact that, in the current setting, all masters are in domain 0 and can
access almost all registers. To prevent this problem, we assign masters
to different domains and restrict access to registers based on each
domain.
This patch modifies the permission settings for domains 2, 3, 4, 5, 7,
8, 9, and 14, as these domains will be assigned masters in the upcoming
patch.
BUG=b:270657858
TEST=build pass
Change-Id: I6e95ddb5d84a09ff865d7615596430e25b69d3fc
Signed-off-by: Nina Wu <nina-cm.wu(a)mediatek.com>
Signed-off-by: Jason Chen <Jason-ch.Chen(a)mediatek.com>
---
M src/soc/mediatek/mt8188/devapc.c
M src/soc/mediatek/mt8188/include/soc/addressmap.h
M src/soc/mediatek/mt8188/include/soc/devapc.h
3 files changed, 284 insertions(+), 119 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/77861/6
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Change subject: drivers/intel/gma: Update port select bit definitions
......................................................................
drivers/intel/gma: Update port select bit definitions
This commit updates the port select bit definitions for the
TRANS_DDI_FUNC_CTL registers in the Intel GMA driver to accommodate
the changes introduced since TGL SoC.
Specifically, the following changes were made:
- Updated the DDI select bit definitions from 3-bits (bit 28-30) to
4-bits (bit 27-30).
- Introduces `INTEL_GMA_VERSION_2` config to accommodate the port and
pipe related differences between previous generation GMA register
(TRANS_DDI_FUNC_CTL) to the current generation GMA register.
This commit backports the change from the following upstream patch:
https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-3-
lucas.demarchi(a)intel.com
BUG=b:299137940
TEST=Able to build and boot google/rex.
Change-Id: I815ffa90c2e235afd70baa7e3837e1f9af89b1b0
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/drivers/intel/gma/Kconfig
M src/drivers/intel/gma/i915.h
M src/drivers/intel/gma/i915_reg.h
3 files changed, 36 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/78078/2
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Change subject: drivers/intel/gma: Update port select bit definitions
......................................................................
Patch Set 1:
(3 comments)
File src/drivers/intel/gma/i915_reg.h:
https://review.coreboot.org/c/coreboot/+/78078/comment/bba24c1a_2e80ce89 :
PS1, Line 4185: #define TRANS_DDI_PORT_SHIFT 27
> Code Style Nits: No need for indentation?
Acknowledged
https://review.coreboot.org/c/coreboot/+/78078/comment/501635a5_d0ce0781 :
PS1, Line 4191: <<
> Nit: Space before and after `<<`
Acknowledged
https://review.coreboot.org/c/coreboot/+/78078/comment/6f0b4f01_2f4b4139 :
PS1, Line 4194: <<
> Same comment as above
Acknowledged
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Change subject: ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
......................................................................
ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
This patch modifies the get_lid_switch() implementation to assume
the LID is open when VBOOT_LID_SWITCH is not enabled. This is
necessary for platforms that do not have a physical LID switch.
Additionally, change the return type of `get_lid_switch()` to
`uint32_t` to keep it aligned with value field in lb_gpio.
BUG=b:299137940
TEST=Able to build and boot google/ovis.
Change-Id: I34bfc21329660a4bfd1ffed939b6dfb7e7109204
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/ec/google/chromeec/switches.c
M src/include/bootmode.h
M src/lib/bootmode.c
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/drallion/chromeos.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/sarien/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/intel/adlrvp/chromeos.c
M src/mainboard/intel/coffeelake_rvp/chromeos.c
M src/mainboard/intel/glkrvp/chromeos.c
M src/mainboard/intel/jasperlake_rvp/chromeos.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/mtlrvp/chromeos.c
M src/mainboard/intel/tglrvp/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
16 files changed, 18 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/78077/3
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Change subject: ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
......................................................................
ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
This patch modifies the get_lid_switch() implementation to assume
the LID is open when VBOOT_LID_SWITCH is not enabled. This is
necessary for platforms that do not have a physical LID switch.
Additionally, change the return type of `get_lid_switch()` to
`uint32_t` to keep it aligned with value field in lb_gpio.
BUG=b:299137940
TEST=Able to build and boot google/ovis.
Change-Id: I34bfc21329660a4bfd1ffed939b6dfb7e7109204
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/ec/google/chromeec/switches.c
M src/include/bootmode.h
M src/lib/bootmode.c
3 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/78077/2
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Change subject: mb: Enable VBOOT_LID_SWITCH by default
......................................................................
mb: Enable VBOOT_LID_SWITCH by default
Remove mainboard-specific overrides to VBOOT_LID_SWITCH config.
VBOOT_LID_SWITCH is now enabled by default.
Platforms that wish to disable VBOOT_LID_SWITCH should override
the config from mainboard Kconfig.
TEST=Ensure VBOOT_LID_SWITCH is enabled for google/rex, but not
applicable for Ovis (aka Chromeosbox).
Change-Id: I922c04e0fa0675090cea7c7b3f4e2275eb70f523
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/mainboard/amd/birman/Kconfig
M src/mainboard/amd/chausie/Kconfig
M src/mainboard/amd/majolica/Kconfig
M src/mainboard/amd/mayan/Kconfig
M src/mainboard/clevo/kbl-u/Kconfig
M src/mainboard/emulation/qemu-i440fx/Kconfig
M src/mainboard/emulation/qemu-q35/Kconfig
M src/mainboard/facebook/fbg1701/Kconfig
M src/mainboard/facebook/monolith/Kconfig
M src/mainboard/google/asurada/Kconfig
M src/mainboard/google/auron/Kconfig
M src/mainboard/google/beltino/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/butterfly/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/cyan/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/drallion/Kconfig
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/foster/Kconfig
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/glados/Kconfig
M src/mainboard/google/gru/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/jecht/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/link/Kconfig
M src/mainboard/google/mistral/Kconfig
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/nyan/Kconfig
M src/mainboard/google/nyan_big/Kconfig
M src/mainboard/google/nyan_blaze/Kconfig
M src/mainboard/google/oak/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/parrot/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/puff/Kconfig
M src/mainboard/google/reef/Kconfig
M src/mainboard/google/rex/Kconfig
M src/mainboard/google/sarien/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/slippy/Kconfig
M src/mainboard/google/smaug/Kconfig
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/stout/Kconfig
M src/mainboard/google/trogdor/Kconfig
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/zork/Kconfig
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/baskingridge/Kconfig
M src/mainboard/intel/coffeelake_rvp/Kconfig
M src/mainboard/intel/glkrvp/Kconfig
M src/mainboard/intel/jasperlake_rvp/Kconfig
M src/mainboard/intel/kblrvp/Kconfig
M src/mainboard/intel/kunimitsu/Kconfig
M src/mainboard/intel/mtlrvp/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
M src/mainboard/intel/strago/Kconfig
M src/mainboard/intel/tglrvp/Kconfig
M src/mainboard/intel/wtm2/Kconfig
M src/mainboard/lenovo/haswell/Kconfig
M src/mainboard/lenovo/t400/Kconfig
M src/mainboard/lenovo/t410/Kconfig
M src/mainboard/lenovo/t420/Kconfig
M src/mainboard/lenovo/t420s/Kconfig
M src/mainboard/lenovo/t430/Kconfig
M src/mainboard/lenovo/t430s/Kconfig
M src/mainboard/lenovo/t520/Kconfig
M src/mainboard/lenovo/t530/Kconfig
M src/mainboard/lenovo/x131e/Kconfig
M src/mainboard/lenovo/x1_carbon_gen1/Kconfig
M src/mainboard/lenovo/x200/Kconfig
M src/mainboard/lenovo/x201/Kconfig
M src/mainboard/lenovo/x220/Kconfig
M src/mainboard/lenovo/x230/Kconfig
M src/mainboard/lenovo/x60/Kconfig
M src/mainboard/msi/ms7d25/Kconfig
M src/mainboard/msi/ms7e06/Kconfig
M src/mainboard/opencellular/elgon/Kconfig
M src/mainboard/protectli/vault_cml/Kconfig
M src/mainboard/protectli/vault_ehl/Kconfig
M src/mainboard/samsung/lumpy/Kconfig
M src/mainboard/samsung/stumpy/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig
M src/mainboard/starlabs/lite/Kconfig
M src/mainboard/starlabs/starbook/Kconfig
M src/mainboard/supermicro/x11-lga1151-series/Kconfig
M src/mainboard/up/squared/Kconfig
M src/security/vboot/Kconfig
102 files changed, 213 insertions(+), 38 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/78207/3
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Change subject: ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
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Patch Set 1:
(1 comment)
File src/ec/google/chromeec/switches.c:
https://review.coreboot.org/c/coreboot/+/78077/comment/94c517c6_45bbdfb2 :
PS1, Line 7: int
> Change the type to uint32_t to keep it aligned with value field in lb_gpio?
i have attempted here to address ur comment but logic has updated a bit now after addressing review comment from Julius at https://review.coreboot.org/c/coreboot/+/78076/comment/9b4928e6_d3ef0c2b/.
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Change subject: ec/google: Assume LID open for platforms without VBOOT_LID_SWITCH
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https://review.coreboot.org/c/coreboot/+/78077/comment/3469ca9b_9a598f37 :
PS1, Line 7: Assume LID open for platforms without VBOOT_LID_SWITCH
> > How about detachables?
>
> I saw all the chromeos devices are selecting VBOOT_LID_SWITCH config. the only exception (which i have landed) is for Ovis (a chromebox hence, doesn't req to select VBOOT_LID_SWITCH config)
in summary, most of the chromeos devices have enabled VBOOT_LID_SWITCH it includes detachables ones as well, for example: pixel slate (nocturne) select VBOOT_LID_SWITCH config.
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