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Change subject: mb/google/geralt: Update voltage mapping tables for RAM ID and LCMD ID
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78209/comment/3a96de20_662e6a80 :
PS1, Line 9: The tolerance of ADC voltage table is too small
> … causing ….
Done
https://review.coreboot.org/c/coreboot/+/78209/comment/9e0644a1_1fbe4436 :
PS1, Line 10: accordring
> according
Done
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Hello Hung-Te Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/geralt: Update voltage mapping tables for RAM ID and LCMD ID
......................................................................
mb/google/geralt: Update voltage mapping tables for RAM ID and LCMD ID
The voltage values are adjusted according to the suggestion from the
hardware team to ensure that ADC voltage has enough tolerance. This is
the follow-up patch of CB:78063. There is no actual issue.
BRANCH=none
BUG=b:301908091
TEST=check firmware screen
Change-Id: I3bde30b6bbe79c81e276f23f4110715c3278d42c
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/mainboard/google/geralt/boardid.c
1 file changed, 15 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/78209/2
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Hello Alexander Couzens, Christian Walter, Eran Mitrani, Erik van den Bogaert, Felix Held, Frans Hendriks, Fred Reitberger, Hung-Te Lin, Jakub Czapiga, Jason Glenesk, Jason Nien, Julius Werner, Kapil Porwal, Martin Roth, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Patrick Rudolph, Piotr Król, Sean Rhodes, Stefan Ott, Tarun, Werner Zeh, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
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Change subject: mb: Enable VBOOT_LID_SWITCH by default for ChromeOS
......................................................................
mb: Enable VBOOT_LID_SWITCH by default for ChromeOS
Remove mainboard-specific overrides to VBOOT_LID_SWITCH config.
VBOOT_LID_SWITCH is now enabled by default for all ChromeOS
devices (except the Chromebox and Chromebase).
Platforms that wish to disable VBOOT_LID_SWITCH should override
the config from mainboard Kconfig.
TEST=Ensure VBOOT_LID_SWITCH is enabled for google/rex, but not
applicable for Ovis (aka Chromebox).
Change-Id: I922c04e0fa0675090cea7c7b3f4e2275eb70f523
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/mainboard/google/asurada/Kconfig
M src/mainboard/google/auron/Kconfig
M src/mainboard/google/beltino/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/butterfly/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/cyan/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/drallion/Kconfig
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/foster/Kconfig
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/glados/Kconfig
M src/mainboard/google/gru/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/jecht/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/link/Kconfig
M src/mainboard/google/mistral/Kconfig
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/nyan/Kconfig
M src/mainboard/google/nyan_big/Kconfig
M src/mainboard/google/nyan_blaze/Kconfig
M src/mainboard/google/oak/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/parrot/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/puff/Kconfig
M src/mainboard/google/reef/Kconfig
M src/mainboard/google/rex/Kconfig
M src/mainboard/google/sarien/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/slippy/Kconfig
M src/mainboard/google/smaug/Kconfig
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/stout/Kconfig
M src/mainboard/google/trogdor/Kconfig
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/zork/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/glkrvp/Kconfig
M src/mainboard/intel/jasperlake_rvp/Kconfig
M src/mainboard/intel/mtlrvp/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
M src/mainboard/intel/strago/Kconfig
M src/mainboard/intel/tglrvp/Kconfig
M src/security/vboot/Kconfig
56 files changed, 81 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/78207/7
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Change subject: mb/google/starmie: Add 3 ms delay to AW37503 Power IC panel timing
......................................................................
Patch Set 6: Code-Review+1
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Change subject: mb/google/geralt: Update voltage mapping tables for RAM ID and LCMD ID
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78209/comment/211b7a4d_b507f96c :
PS1, Line 9: The tolerance of ADC voltage table is too small
… causing ….
https://review.coreboot.org/c/coreboot/+/78209/comment/92e34f03_5ff04ea6 :
PS1, Line 10: accordring
according
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Change subject: mb/google/geralt: Remove SAMSUNG_ATANA33XC20 panel support
......................................................................
Patch Set 1: Code-Review+1
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Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78189?usp=email )
Change subject: Update fsp submodule to upstream master branch
......................................................................
Update fsp submodule to upstream master branch
Updating from commit id a72794810884 (2023-09-07):
IoT ADL-N MR1 (4172_00)
to commit id 481ea7cf0bae (2023-09-19):
Move to RaptorLakeFspBinPkg.dec
This brings in 9 new commits:
481ea7cf0b Move to RaptorLakeFspBinPkg.dec
55e25b819e Raptor Lake FSP C.1.BD.40
2b0aac4f64 Raptor Lake FSP C.0.BD.40
3fa75657aa Add Client Raptor Lake FSP
8d24189361 Add Alder Lake and Raptor Lake to README.md
98f4a1fe2f Rename to AlderlakeSiliconPkg
c78a6784cb Add FvLateSilicon for Alder Lake
849ce8261b Tiger Lake FSP A.0.7E.70
4b0b1eb4e3 Update SplitFspBin.py to latest from edk2
Change-Id: I8a724bf0a03cba5a9689894e1aec0a81a5bf2c94
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78189
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Reviewed-by: Sean Rhodes <sean(a)starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M 3rdparty/fsp
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Sean Rhodes: Looks good to me, approved
Felix Singer: Looks good to me, approved
Michał Żygowski: Looks good to me, approved
diff --git a/3rdparty/fsp b/3rdparty/fsp
index a727948..481ea7c 160000
--- a/3rdparty/fsp
+++ b/3rdparty/fsp
@@ -1 +1 @@
-Subproject commit a72794810884966001c927a5f202a46eb5161488
+Subproject commit 481ea7cf0bae0107c3e14aa746e52657647142f3
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Change subject: Update fsp submodule to upstream master branch
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/alderlake: Hook up FSP repo for RPL-P/S
......................................................................
Patch Set 1: Code-Review+1
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