coreboot-gerrit October 2023

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[XS] Change in coreboot[main]: Revert "mb/google/rex/var/screebo: Enable GL9750 invert WP function"
by Subrata Banik (Code Review) 11 Oct '23

11 Oct '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78295?usp=email ) Change subject: Revert "mb/google/rex/var/screebo: Enable GL9750 invert WP function" ...................................................................... Revert "mb/google/rex/var/screebo: Enable GL9750 invert WP function" This reverts commit ee4191852abf9b24f822468250c24edb993497c6. Reason for revert: In schematic a sdcard write protection pull-down resistor was added, so need to disable GL9750 invert WP function Change-Id: I00a8f43094d8b3674a4bbaeed24b96aab64b9b75 Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78295 Reviewed-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/mainboard/google/rex/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Kapil Porwal: Looks good to me, approved Rui Zhou: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index e2c730e..fc4bec6 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -71,7 +71,6 @@ select CHROMEOS_WIFI_SAR if CHROMEOS select DRIVERS_GENERIC_ALC1015 select DRIVERS_GENESYSLOGIC_GL9750 - select DRIVERS_GENESYSLOGIC_GL9750_INVERT_WP config BOARD_GOOGLE_MODEL_KARIS def_bool n -- To view, visit https://review.coreboot.org/c/coreboot/+/78295?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I00a8f43094d8b3674a4bbaeed24b96aab64b9b75 Gerrit-Change-Number: 78295 Gerrit-PatchSet: 5 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/rex/var/screebo: Remove `SAGV_POINTS_0_1_2` workaround
by Subrata Banik (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Eran Mitrani, Haikun Zhou, Kane Chen, Tarun, Wentao Qin. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78316?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/rex/var/screebo: Remove `SAGV_POINTS_0_1_2` workaround ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: can you please try to revert the CB:77520 directly for better tracking ? -- To view, visit https://review.coreboot.org/c/coreboot/+/78316?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3fad845d8c9ace30eb1719f6ff35bc63a4e25404 Gerrit-Change-Number: 78316 Gerrit-PatchSet: 1 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Haikun Zhou <zhouhaikun5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mike Lee <mike5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Haikun Zhou <zhouhaikun5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 11 Oct 2023 19:01:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/variant/rex0: HID over SPI - change frequency to 30MHZ
by Eran Mitrani (Code Review) 11 Oct '23

11 Oct '23

Eran Mitrani has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78318?usp=email ) Change subject: mb/google/rex/variant/rex0: HID over SPI - change frequency to 30MHZ ...................................................................... mb/google/rex/variant/rex0: HID over SPI - change frequency to 30MHZ BUG=NONE TEST=Tested on Rex, touch over SPI works properly. Signed-off-by: Eran Mitrani <mitrani(a)google.com> Change-Id: If339f7a010fa51bf73b8898a55643b5e921d93b1 --- M src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/78318/1 diff --git a/src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl b/src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl index 5421a0a..6db87ac 100644 --- a/src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl +++ b/src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl @@ -32,7 +32,7 @@ FourWireMode, /* WireMode */ 8, /* DataBitLength */ ControllerInitiated, /* SlaveMode */ - 0x0B71B00, /* ConnectionSpeed (12MHz) */ + 0x1C9C380, /* ConnectionSpeed (30MHz) */ ClockPolarityLow, /* ClockPolarity */ ClockPhaseFirst, /* ClockPhase */ "\\_SB.PCI0.SPI0", /* ResourceSource */ -- To view, visit https://review.coreboot.org/c/coreboot/+/78318?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If339f7a010fa51bf73b8898a55643b5e921d93b1 Gerrit-Change-Number: 78318 Gerrit-PatchSet: 1 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-MessageType: newchange

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[XL] Change in coreboot[main]: mb/google/brox: Create new Brox baseboard
by Shelley Chen (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Nick Vaccaro, Paul Menzel. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78009?usp=email ) Change subject: mb/google/brox: Create new Brox baseboard ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/brox/Makefile.inc: https://review.coreboot.org/c/coreboot/+/78009/comment/f6c03a24_ddcffbbe : PS5, Line 18: subdirs-y += variants/$(VARIANT_DIR)/memory > Memory directory is still there... I just deleted the contents of the files. […] seems to be a misunderstanding -- To view, visit https://review.coreboot.org/c/coreboot/+/78009?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I929b465646ac4c69d4bab33ce23848c7b1fa0f98 Gerrit-Change-Number: 78009 Gerrit-PatchSet: 8 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 11 Oct 2023 18:39:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: SNB+MRC boards: Do not redo PEI data struct in hook
by Keith Hui (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Alexander Couzens, Angel Pons, Martin L Roth, Patrick Rudolph. Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76962?usp=email ) Change subject: SNB+MRC boards: Do not redo PEI data struct in hook ...................................................................... Patch Set 5: (2 comments) File src/mainboard/roda/rv11/variants/rw11/early_init.c: https://review.coreboot.org/c/coreboot/+/76962/comment/591b02b0_697af504 : PS5, Line 64: pcie_init > set by northbridge_fill_pei_data? From what I understand reading northbridge_fill_pei_data(), it sets this value to 1 if the system has Ivy Bridge CPU and PCI device 1:0 aka peg10 is enabled in devicetree. Vendor info on this system indicates it has a IVB i7 but peg10 isn't enabled, thus it would become 0. Since I have no hardware to verify, I lean towards maintaining status quo. https://review.coreboot.org/c/coreboot/+/76962/comment/a3e7a5d1_5fb219e1 : PS5, Line 65: usb3 > Use devicetree setting register "usb3.mode"= ... […] Fully migrate this and USB config to devicetree? (This also needs to be addressed but that setting can assume the native init data format instead, like being done for SPD addresses by later patches in this train.) (I'll go ahead and migrate these settings to devicetree, if they aren't controlled by nvram options.) -- To view, visit https://review.coreboot.org/c/coreboot/+/76962?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie349a8f400eecca3cdbc196ea0790aebe0549e39 Gerrit-Change-Number: 76962 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Wed, 11 Oct 2023 18:34:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/amd/*/Kconfig: rework SPL options
by Matt DeVillier (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78309?usp=email ) Change subject: soc/amd/*/Kconfig: rework SPL options ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/78309?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 Gerrit-Change-Number: 78309 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 11 Oct 2023 18:29:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/amd/*/Kconfig: rework SPL options
by Felix Held (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier. Hello Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78309?usp=email to look at the new patch set (#7). Change subject: soc/amd/*/Kconfig: rework SPL options ...................................................................... soc/amd/*/Kconfig: rework SPL options Move all security patch level (SPL) related Kconfig options to the common AMD PSP Kconfig file. Commit 4ab1db82bb30 ("soc/amd: rework SPL file override and SPL fusing handling") already reworked the SPL handling, but missed that another Kconfig option SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL controlled if the PSP mailbox command to update the SPL fuses was sent by the code that got added to the build when PERFORM_SPL_FUSING was selected. To make things less unexpected, rename PERFORM_SPL_FUSING to SOC_AMD_COMMON_BLOCK_PSP_SPL since it actually controls if the SPL support code is added to the build and also rename SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL to PERFORM_SPL_FUSING. This changes what PERFORM_SPL_FUSING will do from including the code that could do the fusing if another option is set to being the option that controls if the fusing mailbox command will be set. All SoCs that support SPL now select SOC_AMD_COMMON_BLOCK_PSP_SPL in their Kconfig, which won't burn any SPL fuses. The logic in the Skyrim mainboard Kconfig file is reworked to select PERFORM_SPL_FUSING for all boards on which the SPL fuses should be updated; on Guybrush PERFORM_SPL_FUSING default is changed to y for all variants. The option to include the code that checks the SPL fusing conditions and allows sending the command to update the SPL fuses if the corresponding Kconfig is set doesn't need to be added on the mainboard level, since it's already selected at the SoC level. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 --- M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/skyrim/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/psp/spl_fuse.c M src/soc/amd/genoa/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig 10 files changed, 50 insertions(+), 156 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/78309/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/78309?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 Gerrit-Change-Number: 78309 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/amd/*/Kconfig: rework SPL options
by Felix Held (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier. Hello Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78309?usp=email to look at the new patch set (#6). Change subject: soc/amd/*/Kconfig: rework SPL options ...................................................................... soc/amd/*/Kconfig: rework SPL options Move all security patch level (SPL) related Kconfig options to the common AMD PSP Kconfig file. Commit 4ab1db82bb30 ("soc/amd: rework SPL file override and SPL fusing handling") already reworked the SPL handling, but missed that another Kconfig option SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL controlled if the PSP mailbox command to update the SPL fuses was sent by the code that got added to the build when PERFORM_SPL_FUSING was selected. To make things less unexpected, rename PERFORM_SPL_FUSING to SOC_AMD_COMMON_BLOCK_PSP_SPL since it actually controls if the SPL support code is added to the build and also rename SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL to PERFORM_SPL_FUSING. This changes what PERFORM_SPL_FUSING will do from including the code that could do the fusing if another option is set to being the option that controls if the fusing mailbox command will be set. All SoCs that support SPL now select SOC_AMD_COMMON_BLOCK_PSP_SPL in their Kconfig, which won't burn any SPL fuses. The logic in the Skyrim mainboard Kconfig file is reworked to select PERFORM_SPL_FUSING for all boards on which the SPL fuses should be updated; on Guybrush PERFORM_SPL_FUSING default is changed to y for all variants. The option to include the code that checks the SPL fusing conditions and allows sending the command to update the SPL fuses if the corresponding Kconfig is set doesn't need to be added on the mainboard level, since it's already selected at the SoC level. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 --- M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/skyrim/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/psp/spl_fuse.c M src/soc/amd/genoa/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig 10 files changed, 50 insertions(+), 156 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/78309/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/78309?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 Gerrit-Change-Number: 78309 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/amd/*/Kconfig: rework SPL options
by Felix Held (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78309?usp=email ) Change subject: soc/amd/*/Kconfig: rework SPL options ...................................................................... Patch Set 5: (1 comment) File src/soc/amd/common/block/psp/Kconfig: https://review.coreboot.org/c/coreboot/+/78309/comment/f50c2e5f_9ba8e4a7 : PS4, Line 36: actutal > actual Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78309?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 Gerrit-Change-Number: 78309 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Wed, 11 Oct 2023 18:09:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/amd/*/Kconfig: rework SPL options
by Felix Held (Code Review) 11 Oct '23

11 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier. Hello Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78309?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: soc/amd/*/Kconfig: rework SPL options ...................................................................... soc/amd/*/Kconfig: rework SPL options Move all security patch level (SPL) related Kconfig options to the common AMD PSP Kconfig file. Commit 4ab1db82bb30 ("soc/amd: rework SPL file override and SPL fusing handling") already reworked the SPL handling, but missed that another Kconfig option SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL controlled if the PSP mailbox command to update the SPL fuses was sent by the code that got added to the build when PERFORM_SPL_FUSING was selected. To make things less unexpected, rename PERFORM_SPL_FUSING to SOC_AMD_COMMON_BLOCK_PSP_SPL since it actually controls if the SPL support code is added to the build and also rename SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL to PERFORM_SPL_FUSING. This changes what PERFORM_SPL_FUSING will do from including the code that could do the fusing if another option is set to being the option that controls if the fusing mailbox command will be set. All SoCs that support SPL now select SOC_AMD_COMMON_BLOCK_PSP_SPL in their Kconfig, which won't burn any SPL fuses. The logic in the Skyrim mainboard Kconfig file is reworked to select PERFORM_SPL_FUSING for all boards on which the SPL fuses should be updated; on Guybrush PERFORM_SPL_FUSING default is changed to y for all variants. The option to include the code that checks the SPL fusing conditions and allows sending the command to update the SPL fuses if the corresponding Kconfig is set doesn't need to be added on the mainboard level, since it's already selected at the SoC level. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 --- M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/skyrim/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/psp/spl_fuse.c M src/soc/amd/genoa/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig 10 files changed, 50 insertions(+), 156 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/78309/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/78309?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd8775db66f16fe632674cd67c6af483e8d4e2 Gerrit-Change-Number: 78309 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2023