coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: drivers/generic/bayhub: Add ACPI for BH720
by Matt DeVillier (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: CoolStar. Hello CoolStar, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/78403?usp=email to review the following change. Change subject: drivers/generic/bayhub: Add ACPI for BH720 ...................................................................... drivers/generic/bayhub: Add ACPI for BH720 The Bayhub BH720 eMMC bridge is a fixed internal device, and needs to me marked as non-removable in order for Windows to properly recognize/ utilize the device. Add the necessary ACPI to be generated at runtime. TEST=build/boot/install Win11 on google/kahlee (liara) Change-Id: I0815abf1d2dc5cfe785dc04670ab91f2a6a1af23 Signed-off-by: CoolStar <coolstarorganization(a)gmail.com> Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/drivers/generic/bayhub/bh720.c 1 file changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/78403/1 diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c index 03c3b46..28c6725 100644 --- a/src/drivers/generic/bayhub/bh720.c +++ b/src/drivers/generic/bayhub/bh720.c @@ -9,9 +9,13 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include <acpi/acpigen.h> +#include <acpi/acpigen_pci.h> #include "chip.h" #include "bh720.h" +#define BH720_ACPI_NAME "BHUB" + static u32 bh720_read_pcr(u32 sdbar, u32 addr) { write32p(sdbar + BH720_MEM_RW_ADR, BH720_MEM_RW_READ | addr); @@ -99,12 +103,53 @@ } } +static void bh720_fill_ssdt(const struct device *dev){ + if (dev->path.type != DEVICE_PATH_PCI){ + return; + } + + const char *scope = acpi_device_scope(dev); + const char *name = acpi_device_name(dev); + if (!scope || !name) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(name); + + acpigen_write_ADR_pci_device(dev); + acpigen_write_STA(acpi_device_status(dev)); + + /* Card */ + acpigen_write_device("CARD"); + acpigen_write_ADR(0x08); //eMMC is always on address 0x8 + + /* + * Method (_RMV, 0, NotSerialized) { Return (0) } + */ + acpigen_write_method("_RMV", 0); /* Method */ + acpigen_emit_byte(RETURN_OP); + acpigen_write_byte(0); + acpigen_pop_len(); /* Method */ + + acpigen_pop_len(); /* Card */ + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ +} + +static const char *bh720_acpi_name(const struct device *dev){ + return BH720_ACPI_NAME; +} + static struct device_operations bh720_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .ops_pci = &pci_dev_ops_pci, .init = bh720_init, + .acpi_name = bh720_acpi_name, + .acpi_fill_ssdt = bh720_fill_ssdt }; static const unsigned short pci_device_ids[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/78403?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0815abf1d2dc5cfe785dc04670ab91f2a6a1af23 Gerrit-Change-Number: 78403 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: WIP:amdfwtool: Add psp header backup copy
by Bao Zheng (Code Review) 15 Oct '23

15 Oct '23

Bao Zheng has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75682?usp=email ) Change subject: WIP:amdfwtool: Add psp header backup copy ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75682?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5a745c86595554c83cd13a35c312c17987b716b Gerrit-Change-Number: 75682 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[main]: mb/google/nissa/var/craaskov: Use runtime detection for touchscreens
by Eric Lai (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Chen-Tsung Hsieh, Derek Huang, Ian Feng, Kenny Pan, Nick Vaccaro, Rex Chou, Shou-Chieh Hsu, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78338?usp=email ) Change subject: mb/google/nissa/var/craaskov: Use runtime detection for touchscreens ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia43ada8b3b6dbee95dbadacc353106e0f8f37549 Gerrit-Change-Number: 78338 Gerrit-PatchSet: 1 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Sun, 15 Oct 2023 14:24:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/amd/common/data_fabric_helper: add pre-processor guards for ACPI
by Eric Lai (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78341?usp=email ) Change subject: soc/amd/common/data_fabric_helper: add pre-processor guards for ACPI ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78341?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iec6e05bbe9fad7d78002560b78169dc293294af6 Gerrit-Change-Number: 78341 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 15 Oct 2023 14:22:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/amd/common/data_fabric/extended_mmio: fix compile errors
by Eric Lai (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78340?usp=email ) Change subject: soc/amd/common/data_fabric/extended_mmio: fix compile errors ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78340?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5495ebf0f157fd0c456ce44acaf1ab222a188dd Gerrit-Change-Number: 78340 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 15 Oct 2023 14:21:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brya: Create anraggar variant
by Eric Lai (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik, Weimin Wu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78363?usp=email ) Change subject: mb/google/brya: Create anraggar variant ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78363?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I95e72188679fc825c94c4043ed02b0aad310c6a3 Gerrit-Change-Number: 78363 Gerrit-PatchSet: 2 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Sun, 15 Oct 2023 14:14:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/cmn/gfx: Detect dual display (eDP + HDMI)
by Eric Lai (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78383?usp=email ) Change subject: soc/intel/cmn/gfx: Detect dual display (eDP + HDMI) ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78383?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie39d48da75a21e3508a1fbcf09da31caedaa1c0a Gerrit-Change-Number: 78383 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Sun, 15 Oct 2023 14:14:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/cmn/gfx: Detect dual display (eDP + HDMI)
by Subrata Banik (Code Review) 15 Oct '23

15 Oct '23

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78383?usp=email ) Change subject: soc/intel/cmn/gfx: Detect dual display (eDP + HDMI) ...................................................................... soc/intel/cmn/gfx: Detect dual display (eDP + HDMI) This patch adds support for detecting dual displays (eDP and HDMI) on Intel platforms. This information is useful for setting the `lb_framebuffer.has_external_display` variable, which is used to determine whether depthchage should avoid shutting down when an extended display is present. TEST= Able to build and boot google/rex, where depthchage now successfully avoids shutting down when both eDP and HDMI displays are attached. w/o this patch: with eDP and HDMI attached: .has_external_display=0 with eDP attached: .has_external_display=0 with HDMI attached: .has_external_display=1 w/ this patch: with eDP and HDMI attached: .has_external_display = 1 with eDP attached: .has_external_display=0 with HDMI attached: .has_external_display=1 Change-Id: Ie39d48da75a21e3508a1fbcf09da31caedaa1c0a Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/graphics/graphics.c 1 file changed, 25 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/78383/1 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 5b2484a..9d541d0 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -31,6 +31,14 @@ return NULL; } +static uint32_t graphics_get_ddi_func_ctrl(unsigned long reg) +{ + uint32_t ddi_func_ctrl = graphics_gtt_read(reg); + ddi_func_ctrl &= TRANS_DDI_PORT_MASK; + + return ddi_func_ctrl; +} + /* * Transcoders contain the timing generators for eDP, DP, and HDMI interfaces. * Intel transcoders are based on Quick Sync Video, which offloads video @@ -58,20 +66,31 @@ */ static int get_external_display_status(void) { - uint32_t ddi_func_ctrl = graphics_gtt_read(TRANS_DDI_FUNC_CTL_A); - ddi_func_ctrl &= TRANS_DDI_PORT_MASK; + /* Read the transcoder register for DDI-A (eDP) */ + uint32_t ddi_a_func_ctrl = graphics_get_ddi_func_ctrl(TRANS_DDI_FUNC_CTL_A); + /* Read the transcoder register for DDI-B (HDMI) */ + uint32_t ddi_b_func_ctrl = graphics_get_ddi_func_ctrl(TRANS_DDI_FUNC_CTL_B); /* * Check if transcoder is none or connected to DDI-A port (aka eDP). * Report no external display in both cases. */ - if (ddi_func_ctrl == TRANS_DDI_PORT_NONE) { + if (ddi_a_func_ctrl == TRANS_DDI_PORT_NONE) { return 0; } else { - if (ddi_func_ctrl == TRANS_DDI_SELECT_PORT(PORT_A)) - return 0; - else + if ((ddi_a_func_ctrl == TRANS_DDI_SELECT_PORT(PORT_A)) && + (ddi_b_func_ctrl == TRANS_DDI_SELECT_PORT(PORT_B))) { + /* + * Dual display detected: both DDI-A(eDP) and + * DDI-B(HDMI) pipes are active + */ return 1; + } else { + if (ddi_a_func_ctrl == TRANS_DDI_SELECT_PORT(PORT_A)) + return 0; + else + return 1; + } } } -- To view, visit https://review.coreboot.org/c/coreboot/+/78383?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie39d48da75a21e3508a1fbcf09da31caedaa1c0a Gerrit-Change-Number: 78383 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/rex/var/rex0: Toggle NVMe PWR pin to reset SSD
by Jamie Ryu (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Eran Mitrani, Ivy Jian, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun, Tarun Tuli, Wonkyu Kim. Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71221?usp=email ) Change subject: mb/google/rex/var/rex0: Toggle NVMe PWR pin to reset SSD ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/71221/comment/0eb9986e_808356b0 : PS3, Line 7: mb/google/rex: toggling NVMe PWR pin to reset SSD > Please use imperative mood: Toggle … Thanks for comments. The commit message is updated. https://review.coreboot.org/c/coreboot/+/71221/comment/91eaac26_a9b5c8be : PS3, Line 11: as early stage > as in early stage Thanks for comments. The commit message is updated. https://review.coreboot.org/c/coreboot/+/71221/comment/7d10dabb_ca209797 : PS3, Line 15: TEST= Try reboot from OS console and check boot to OS again > What variant and what NVMe disk? Thanks for comments. The commit message is updated. Please let us know if you see any issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/71221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e Gerrit-Change-Number: 71221 Gerrit-PatchSet: 4 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sun, 15 Oct 2023 09:03:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/rex/var/rex0: Toggle NVMe PWR pin to reset SSD
by Jamie Ryu (Code Review) 15 Oct '23

15 Oct '23

Attention is currently required from: Eran Mitrani, Ivy Jian, Jamie Ryu, Kapil Porwal, Subrata Banik, Tarun, Tarun Tuli, Wonkyu Kim. Jamie Ryu has uploaded a new patch set (#4) to the change originally created by Wonkyu Kim. ( https://review.coreboot.org/c/coreboot/+/71221?usp=email ) Change subject: mb/google/rex/var/rex0: Toggle NVMe PWR pin to reset SSD ...................................................................... mb/google/rex/var/rex0: Toggle NVMe PWR pin to reset SSD During warm reboot, NVMe is not detected with non-serial image sometimes while there is no issue with serial image. This change toggles NVMe PWR pin as soon as in early stage to make NVMe ready sooner. BUG=b:260547988 BRANCH=None TEST= Build rex0 and try warm reboot from OS console. Check if the platform with Micron SSD boots to OS again without an issue. Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 8 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/71221/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/71221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e Gerrit-Change-Number: 71221 Gerrit-PatchSet: 4 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2023