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Change subject: Documentation: add Nitrokey to distributions
......................................................................
Documentation: add Nitrokey to distributions
Nitrokey offers various products, which have coreboot pre-installed.
Change-Id: I3ef25e0e1cb97eda5fd457bdb650f3ee3f00210a
Signed-off-by: Markus Meissner <coder(a)safemailbox.de>
---
M Documentation/distributions.md
1 file changed, 26 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/78299/4
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Change subject: Documentation: add Nitrokey to distributions
......................................................................
Patch Set 3:
(1 comment)
File Documentation/distributions.md:
https://review.coreboot.org/c/coreboot/+/78299/comment/7a4c3eaf_e13fa687 :
PS3, Line 23: offers a range of laptops, PCs, HSM, and networking devices with coreboot and
: [Dasharo](https://dasharo.com/).
> Apologies for my ignorance, I guess I haven't checked your device offer deep enough. […]
no need for apologies ;) happily updating it to `HSMs`, new patchset incoming...
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Change subject: soc/amd/common/data_fabric_helper: add pre-processor guards for ACPI
......................................................................
Patch Set 2: Code-Review+2
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Change subject: soc/amd/common/data_fabric/extended_mmio: fix compile errors
......................................................................
Patch Set 1: Code-Review+2
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Attention is currently required from: Arthur Heymans, Krystian Hebel, Maciej Pijanowski, Martin L Roth, Michał Żygowski, ron minnich.
Hello Krystian Hebel, Maciej Pijanowski, Martin L Roth, Michał Żygowski, build bot (Jenkins), ron minnich,
I'd like you to reexamine a change. Please visit
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Change subject: ppc64: Kconfig switch for bootblock in SEEPROM, zero HRMOR
......................................................................
ppc64: Kconfig switch for bootblock in SEEPROM, zero HRMOR
On PPC64 each address is logically OR'ed with HRMOR (Hypervisor Real
Mode Offset Register) before it is dispatched to the underlying memory,
meaning that memory space overlaps at the least significant bit set in
HRMOR. coreboot is entered with HRMOR = 4GB-128MB both on hardware
(when started by hostboot bootloader) and in Qemu in hb-mode. This means
that memory overlaps every 128MB in this particular case. HRMOR can be
explicitly ignored when MSB of an address is set, but this would require
using different memory model for linking.
If we zero HRMOR in bootblock, linking can be done against real address.
This greatly simplifies memory layout and allows to forget about HRMOR
from that point on.
Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com>
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Change-Id: I0170463968c91b943c4b0dc15fe73fa616a164da
---
M src/arch/ppc64/Makefile.inc
M src/arch/ppc64/bootblock_crt0.S
M src/mainboard/emulation/qemu-power8/memlayout.ld
M src/mainboard/emulation/qemu-power9/memlayout.ld
M src/mainboard/raptor-cs/talos-2/Kconfig
A src/mainboard/raptor-cs/talos-2/board-bootblock-in-seeprom.fmd
A src/mainboard/raptor-cs/talos-2/board.fmd
M src/mainboard/raptor-cs/talos-2/memlayout.ld
M src/soc/ibm/power9/Makefile.inc
9 files changed, 344 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/67067/21
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Change subject: security/tpm/: turn tis_{init,open} into tis_probe
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS1:
> This is a copy of previously reverted CB:68991, see https://review.coreboot. […]
Acknowledged
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Hello Jason Nien, Martin Roth,
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Change subject: mb/google/zork/morphius: Drop touchscreen detection
......................................................................
mb/google/zork/morphius: Drop touchscreen detection
Some morphius boards seem to have trouble with the runtime detection,
and since it only has one touchscreen option, and no SKUs lack a
touchscreen, just assume it is present in all cases.
TEST=build/boot morphius w/4k screen, verify touchscreen detected in
cbmem and functional in Linux and Windows.
Change-Id: I13e07e14b5a18fa1dd3b18950cf46e9d7821eedc
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/google/zork/variants/morphius/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/78404/2
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Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78404?usp=email )
Change subject: mb/google/zork/morphius: Drop touchscreen detection
......................................................................
mb/google/zork/morphius: Drop touchscreen detection
Some morphius boards seem to have trouble with the runtime detection,
and since it only has one touchscreen options, and no SKUs lack a
touchscreen, just assume it is present in all cases.
TEST=build/boot morphius w/4k screen, verify touchscreen detected in
cbmem and functional in Linux and Windows.
Change-Id: I13e07e14b5a18fa1dd3b18950cf46e9d7821eedc
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/google/zork/variants/morphius/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/78404/1
diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb
index 9c07a40..c01d0f9 100644
--- a/src/mainboard/google/zork/variants/morphius/overridetree.cb
+++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb
@@ -120,7 +120,7 @@
register "generic.hid" = ""GDIX0000""
register "generic.desc" = ""Goodix Touchscreen""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)"
- register "generic.detect" = "1"
+ #register "generic.detect" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)"
register "generic.enable_delay_ms" = "10"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"
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Hello CoolStar, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: drivers/generic/bayhub: Add ACPI for BH720
......................................................................
drivers/generic/bayhub: Add ACPI for BH720
The Bayhub BH720 eMMC bridge is a fixed internal device, and needs to
me marked as non-removable in order for Windows to properly recognize/
utilize the device. Add the necessary ACPI to be generated at runtime.
TEST=build/boot/install Win11 on google/kahlee (liara)
Change-Id: I0815abf1d2dc5cfe785dc04670ab91f2a6a1af23
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/drivers/generic/bayhub/bh720.c
1 file changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/78403/3
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Hello CoolStar,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: drivers/generic/bayhub: Add ACPI for BH720
......................................................................
drivers/generic/bayhub: Add ACPI for BH720
The Bayhub BH720 eMMC bridge is a fixed internal device, and needs to
me marked as non-removable in order for Windows to properly recognize/
utilize the device. Add the necessary ACPI to be generated at runtime.
TEST=build/boot/install Win11 on google/kahlee (liara)
Change-Id: I0815abf1d2dc5cfe785dc04670ab91f2a6a1af23
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/drivers/generic/bayhub/bh720.c
1 file changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/78403/2
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