coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

1 participants
3354 discussions

[L] Change in coreboot[main]: soc/intel/xeon_sp: Redesign resource allocation
by Felix Held (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78327?usp=email ) Change subject: soc/intel/xeon_sp: Redesign resource allocation ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78327/comment/4572596b_5070e013 : PS1, Line 14: FPS FSP -- To view, visit https://review.coreboot.org/c/coreboot/+/78327?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb29c24b71a18e2e092f9d4953d106e6ca0a5fe1 Gerrit-Change-Number: 78327 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 14 Oct 2023 10:43:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[main]: device/device.h: Rename pci_domain_scan_bus
by Felix Held (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Angel Pons, Arthur Heymans, Eran Mitrani, Fred Reitberger, Hung-Te Lin, Jason Glenesk, Jeff Daly, Kapil Porwal, Lean Sheng Tan, Matt DeVillier, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tarun, Vanessa Eusebio, Werner Zeh, Yidi Lin, Yu-Ping Wu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78326?usp=email ) Change subject: device/device.h: Rename pci_domain_scan_bus ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78326?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e65fdbaf0b42c5f4f62297a60d818d299d76f73 Gerrit-Change-Number: 78326 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 14 Oct 2023 10:40:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/rex/var/rex: Configure cpu power limits by battery status
by Subrata Banik (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Brandon Breitenstein, Caveh Jalali, Eran Mitrani, Hannah Williams, Jamie Ryu, Kapil Porwal, Sukumar Ghorai, Tarun, Tim Van Patten. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78322?usp=email ) Change subject: mb/google/rex/var/rex: Configure cpu power limits by battery status ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd40abda76c8e7522b06a5aee72665f32ddec8 Gerrit-Change-Number: 78322 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Oct 2023 10:16:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/rex: toggling NVMe PWR pin to reset SSD
by Jamie Ryu (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Eran Mitrani, Ivy Jian, Jamie Ryu, Kapil Porwal, Subrata Banik, Tarun, Tarun Tuli. Jamie Ryu has uploaded a new patch set (#3) to the change originally created by Wonkyu Kim. ( https://review.coreboot.org/c/coreboot/+/71221?usp=email ) Change subject: mb/google/rex: toggling NVMe PWR pin to reset SSD ...................................................................... mb/google/rex: toggling NVMe PWR pin to reset SSD During warm reboot, NVMe is not detected in non-serial image while serial image is ok. For preparing NVMe is fast, toggle NVMe PWR pin as soon as early stage. BUG=b:260547988 BRANCH=None TEST= Try reboot from OS console and check boot to OS again Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 8 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/71221/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/71221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e Gerrit-Change-Number: 71221 Gerrit-PatchSet: 3 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: mb/google/rex: toggling NVMe PWR pin to reset SSD
by Jamie Ryu (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Ivy Jian, Jamie Ryu, Kapil Porwal, Subrata Banik, Tarun Tuli, Wonkyu Kim. Jamie Ryu has uploaded a new patch set (#2) to the change originally created by Wonkyu Kim. ( https://review.coreboot.org/c/coreboot/+/71221?usp=email ) Change subject: mb/google/rex: toggling NVMe PWR pin to reset SSD ...................................................................... mb/google/rex: toggling NVMe PWR pin to reset SSD During warm reboot, NVMe is not detected in non-serial image while serial image is ok. For preparing NVMe is fast, toggle NVMe PWR pin as soon as early stage. BUG=b:260547988 BRANCH=None TEST= Try reboot from OS console and check boot to OS again Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 10 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/71221/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f34e3f49e7fc388198ff85c8e119cb3f242a60e Gerrit-Change-Number: 71221 Gerrit-PatchSet: 2 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: mb/google/rex/var/rex: Configure cpu power limits by battery status
by Jamie Ryu (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Brandon Breitenstein, Caveh Jalali, Eran Mitrani, Hannah Williams, Kapil Porwal, Subrata Banik, Sukumar Ghorai, Tarun, Tim Van Patten. Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78322?usp=email ) Change subject: mb/google/rex/var/rex: Configure cpu power limits by battery status ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/rex/variants/baseboard/rex/ramstage.c: https://review.coreboot.org/c/coreboot/+/78322/comment/0a93206e_f62fb225 : PS6, Line 46: if (CONFIG(EC_GOOGLE_CHROMEEC)) > nit: a brace around line 46 to 51? Thanks! This is updated to patchset#7. -- To view, visit https://review.coreboot.org/c/coreboot/+/78322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd40abda76c8e7522b06a5aee72665f32ddec8 Gerrit-Change-Number: 78322 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Oct 2023 10:00:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/rex/var/rex: Configure cpu power limits by battery status
by Jamie Ryu (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Brandon Breitenstein, Caveh Jalali, Eran Mitrani, Hannah Williams, Jamie Ryu, Kapil Porwal, Subrata Banik, Sukumar Ghorai, Tarun, Tim Van Patten. Hello Brandon Breitenstein, Caveh Jalali, Eran Mitrani, Hannah Williams, Kapil Porwal, Subrata Banik, Sukumar Ghorai, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78322?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Subrata Banik, Code-Review+1 by Sukumar Ghorai, Verified+1 by build bot (Jenkins) Change subject: mb/google/rex/var/rex: Configure cpu power limits by battery status ...................................................................... mb/google/rex/var/rex: Configure cpu power limits by battery status When battery level is below critical level or battery is not present, cpus need to run with a power optimized configuration to avoid platform instabilities. This will check the current battery status and configure cpu power limits properly. BUG=b:296952944 TEST=Build rex0 and check cpu power limits are configured with a performance efficient configuration and the platform boots to OS if battery level is above the critical level. And check cpu power limits are configured with a power optimized configuration and boots to OS without an issue if battery is not present or battery level is at or below critical level. Change-Id: I12fd40abda76c8e7522b06a5aee72665f32ddec8 Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/google/rex/variants/baseboard/rex/ramstage.c 1 file changed, 29 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/78322/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/78322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I12fd40abda76c8e7522b06a5aee72665f32ddec8 Gerrit-Change-Number: 78322 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: amdfwtool: Detect the file name with non-default path in fw.cfg
by Bao Zheng (Code Review) 14 Oct '23

14 Oct '23

Bao Zheng has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61971?usp=email ) Change subject: amdfwtool: Detect the file name with non-default path in fw.cfg ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/61971?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8e40e445556b972f3b00a0dfcc07b1512308177 Gerrit-Change-Number: 61971 Gerrit-PatchSet: 27 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

1 0

[S] Change in coreboot[main]: mb/google/brya: Create anraggar variant
by Weimin Wu (Code Review) 14 Oct '23

14 Oct '23

Attention is currently required from: Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78363?usp=email ) Change subject: mb/google/brya: Create anraggar variant ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/78363?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I95e72188679fc825c94c4043ed02b0aad310c6a3 Gerrit-Change-Number: 78363 Gerrit-PatchSet: 1 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Sat, 14 Oct 2023 07:38:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/brya: Create anraggar variant
by Weimin Wu (Code Review) 14 Oct '23

14 Oct '23

Weimin Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78363?usp=email ) Change subject: mb/google/brya: Create anraggar variant ...................................................................... mb/google/brya: Create anraggar variant Create the anraggar variant of the nissa reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:304920262 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_ANRAGGAR Change-Id: I95e72188679fc825c94c4043ed02b0aad310c6a3 Signed-off-by: wuweimin <wuweimin(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/anraggar/include/variant/ec.h A src/mainboard/google/brya/variants/anraggar/include/variant/gpio.h A src/mainboard/google/brya/variants/anraggar/memory/Makefile.inc A src/mainboard/google/brya/variants/anraggar/memory/dram_id.generated.txt A src/mainboard/google/brya/variants/anraggar/memory/mem_parts_used.txt A src/mainboard/google/brya/variants/anraggar/overridetree.cb 8 files changed, 45 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/78363/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 40d2866..8c5e707 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -656,6 +656,7 @@ default "Quandiso" if BOARD_GOOGLE_QUANDISO default "Nokris" if BOARD_GOOGLE_NOKRIS default "Dochi" if BOARD_GOOGLE_DOCHI + default "Anraggar" if BOARD_GOOGLE_ANRAGGAR config VARIANT_DIR default "brya0" if BOARD_GOOGLE_BRYA0 @@ -709,6 +710,7 @@ default "quandiso" if BOARD_GOOGLE_QUANDISO default "nokris" if BOARD_GOOGLE_NOKRIS default "dochi" if BOARD_GOOGLE_DOCHI + default "anraggar" if BOARD_GOOGLE_ANRAGGAR config VBOOT select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 86f7f8e..3dee7e0 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -152,3 +152,7 @@ config BOARD_GOOGLE_DOCHI bool "-> Dochi" + +config BOARD_GOOGLE_ANRAGGAR + bool "-> Anraggar" + select BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/variants/anraggar/include/variant/ec.h b/src/mainboard/google/brya/variants/anraggar/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/anraggar/include/variant/gpio.h b/src/mainboard/google/brya/variants/anraggar/include/variant/gpio.h new file mode 100644 index 0000000..c4fe342 --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/anraggar/memory/Makefile.inc b/src/mainboard/google/brya/variants/anraggar/memory/Makefile.inc new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/brya/variants/anraggar/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/anraggar/memory/dram_id.generated.txt new file mode 100644 index 0000000..fa24790 --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brya/variants/anraggar/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/anraggar/memory/mem_parts_used.txt new file mode 100644 index 0000000..9621137 --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb new file mode 100644 index 0000000..4f2c04a --- /dev/null +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/78363?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I95e72188679fc825c94c4043ed02b0aad310c6a3 Gerrit-Change-Number: 78363 Gerrit-PatchSet: 1 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit October 2023