coreboot-gerrit September 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes
by Yidi Lin (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67355 ) Change subject: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/67355/comment/760c830d_7c144d7b PS4, Line 7: enable Enable File src/soc/mediatek/mt8188/pll.c: https://review.coreboot.org/c/coreboot/+/67355/comment/944afe19_ef7e100e PS4, Line 524: /* disable mfg_ck_en[20], enable mfg_opp_ck_en[2] */ : clrbits32(&mtk_apmixed->mfgpll_con0, 0x1 << 20); : clrsetbits32(&mtk_apmixed->mfgpll_con0, 0x1 << 2, 0x1 << 2); clrsetbits32(&mtk_apmixed->mfgpll_con0, BIT(20), BIT(2)); -- To view, visit https://review.coreboot.org/c/coreboot/+/67355 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I971109a5f72e3307899daaf5a5f26022124b559b Gerrit-Change-Number: 67355 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 07:22:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/spd_tools: Update LP5X support for ADL/RPL/MTL
by Caveh Jalali (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Robert Zieba, Martin L Roth, Selma Bensaid. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67265 ) Change subject: util/spd_tools: Update LP5X support for ADL/RPL/MTL ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Marking as 'unresolved' so it doesn't accidentally get merged while we check on the AMD side. SPDs in set-0 are effectively for intel and set-1 are AMD. coreboot:66839 took care of AMD but did not investigate the intel case. this patch just "fixes" the intel case. -- To view, visit https://review.coreboot.org/c/coreboot/+/67265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iadb4688f1cb4265dab1dc7c242f0c301d5498b83 Gerrit-Change-Number: 67265 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 07:08:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/docker/coreboot-sdk: Install GNAT 12
by Elyes Haouas (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Felix Singer. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66924 ) Change subject: util/docker/coreboot-sdk: Install GNAT 12 ...................................................................... Patch Set 2: (1 comment) File util/docker/coreboot-sdk/Dockerfile: https://review.coreboot.org/c/coreboot/+/66924/comment/d953eb3b_fa661b38 PS2, Line 38: gnat-12 shouldn't we use same version as gcc in util/crossgcc/buildgcc ? some thing as "gnat-${GCC_VERSION}" -- To view, visit https://review.coreboot.org/c/coreboot/+/66924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If00a05a0c8564e624809268a12fae28261e380a2 Gerrit-Change-Number: 66924 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 06 Sep 2022 07:07:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes
by Rex-BC Chen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67355 to look at the new patch set (#3). Change subject: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes ...................................................................... soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes Some of the pll settings are incorrect, which cause problems in GPU after booting into kernel. - MFGPLL opp_ck_en bit isn't located at MFGPLL_CON1, so we need to fix it to enable MFGPLL properly. - Switch SPMI clock muxes to 260M to avoid kernel hang while probing SPMI kernel driver. TEST=GPU bringup correctly. BUG=b:233720142 Signed-off-by: Johnson Wang <johnson.wang(a)mediatek.com> Change-Id: I971109a5f72e3307899daaf5a5f26022124b559b --- M src/soc/mediatek/mt8188/pll.c 1 file changed, 24 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/67355/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/67355 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I971109a5f72e3307899daaf5a5f26022124b559b Gerrit-Change-Number: 67355 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/mediatek/mt8188: Enable ARM Trusted Firmware integration
by Rex-BC Chen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yidi Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67356 to look at the new patch set (#3). Change subject: soc/mediatek/mt8188: Enable ARM Trusted Firmware integration ...................................................................... soc/mediatek/mt8188: Enable ARM Trusted Firmware integration Enable configuration to build with MT8186 arm-trusted-firmware drivers. TEST=build pass BUG=b:236331724 Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com> Change-Id: Id16405c84f6e0a2e21f95cc45babf85bd980b43e --- M src/soc/mediatek/mt8188/Kconfig M src/soc/mediatek/mt8188/Makefile.inc 2 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/67356/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/67356 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id16405c84f6e0a2e21f95cc45babf85bd980b43e Gerrit-Change-Number: 67356 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/geralt: Pass reset gpio parameter to BL31
by Rex-BC Chen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Yu-Ping Wu, Yidi Lin. Hello Hung-Te Lin, Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67357 to look at the new patch set (#3). Change subject: mb/google/geralt: Pass reset gpio parameter to BL31 ...................................................................... mb/google/geralt: Pass reset gpio parameter to BL31 Pass the reset gpio parameter to BL31 to support SoC reset. TEST=build pass. BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ifdfbd6bd82f64b084f6349cb617443053c89a3f1 --- M src/mainboard/google/geralt/mainboard.c M src/soc/mediatek/mt8188/Makefile.inc 2 files changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/67357/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/67357 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdfbd6bd82f64b084f6349cb617443053c89a3f1 Gerrit-Change-Number: 67357 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/mediatek: a common implementation to register BL31 reset
by Rex-BC Chen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Xi Chen, Yidi Lin, Yu-Ping Wu. Rex-BC Chen has uploaded a new patch set (#3) to the change originally created by Hung-Te Lin. ( https://review.coreboot.org/c/coreboot/+/67359 ) Change subject: soc/mediatek: a common implementation to register BL31 reset ...................................................................... soc/mediatek: a common implementation to register BL31 reset The implementations of register_reset_to_bl31() are the same for MedaiTek platform, so we abstract them to soc/common/bl31.c. BUG=None TEST=build pass Change-Id: I297ea2e18a6d7e92236cf415844b166523616bdf Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com> --- M src/mainboard/google/asurada/mainboard.c M src/mainboard/google/cherry/mainboard.c M src/mainboard/google/corsola/mainboard.c M src/mainboard/google/kukui/mainboard.c A src/soc/mediatek/common/bl31.c A src/soc/mediatek/common/include/soc/bl31.h M src/soc/mediatek/mt8183/Makefile.inc M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8195/Makefile.inc 10 files changed, 71 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/67359/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/67359 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I297ea2e18a6d7e92236cf415844b166523616bdf Gerrit-Change-Number: 67359 Gerrit-PatchSet: 3 Gerrit-Owner: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: crossgcc: Upgrade cmake and llvm
by Elyes Haouas (Code Review) 06 Sep '22

06 Sep '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67367 ) Change subject: crossgcc: Upgrade cmake and llvm ...................................................................... crossgcc: Upgrade cmake and llvm Upgrade cmake to version 3.24.1 and llvm to version 15.0.0 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I81a8371190513ca34d3c5efb0e3770ac3d873b03 --- M util/crossgcc/buildgcc D util/crossgcc/sum/clang-14.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-15.0.0.src.tar.xz.cksum D util/crossgcc/sum/clang-tools-extra-14.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-tools-extra-15.0.0.src.tar.xz.cksum D util/crossgcc/sum/cmake-3.23.2.tar.gz.cksum A util/crossgcc/sum/cmake-3.24.1.tar.gz.cksum D util/crossgcc/sum/compiler-rt-14.0.6.src.tar.xz.cksum D util/crossgcc/sum/llvm-14.0.6.src.tar.xz.cksum A util/crossgcc/sum/llvm-15.0.0.src.tar.xz.cksum 10 files changed, 18 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/67367/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 03c24da..0336911 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -39,8 +39,8 @@ BINUTILS_VERSION=2.37 IASL_VERSION=20220331 # CLANG version number -CLANG_VERSION=14.0.6 -CMAKE_VERSION=3.23.2 +CLANG_VERSION=15.0.0 +CMAKE_VERSION=3.24.1 NASM_VERSION=2.15.05 # GCC toolchain archive locations diff --git a/util/crossgcc/sum/clang-14.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-14.0.6.src.tar.xz.cksum deleted file mode 100644 index fbef3e1..0000000 --- a/util/crossgcc/sum/clang-14.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -88442d295bc0b96df7cf3d526ed9eabd7a214ac2 tarballs/clang-14.0.6.src.tar.xz diff --git a/util/crossgcc/sum/clang-15.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-15.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..b83f55c --- /dev/null +++ b/util/crossgcc/sum/clang-15.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +7b47dbb51bd2de28174d8425f4fe9523880bc7b8 tarballs/clang-15.0.0.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-14.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-14.0.6.src.tar.xz.cksum deleted file mode 100644 index e816ec2..0000000 --- a/util/crossgcc/sum/clang-tools-extra-14.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -dac5046f0eb81e6c47432cf80229599befbf273e tarballs/clang-tools-extra-14.0.6.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-15.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-15.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..58fa9d8 --- /dev/null +++ b/util/crossgcc/sum/clang-tools-extra-15.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +65c804e2539753ab350a0960b378ce66bc57b0e9 tarballs/clang-tools-extra-15.0.0.src.tar.xz diff --git a/util/crossgcc/sum/cmake-3.23.2.tar.gz.cksum b/util/crossgcc/sum/cmake-3.23.2.tar.gz.cksum deleted file mode 100644 index d13558b..0000000 --- a/util/crossgcc/sum/cmake-3.23.2.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -766ac6c7f94529ae097e3c0fa15a38abad58cf18 tarballs/cmake-3.23.2.tar.gz diff --git a/util/crossgcc/sum/cmake-3.24.1.tar.gz.cksum b/util/crossgcc/sum/cmake-3.24.1.tar.gz.cksum new file mode 100644 index 0000000..d20f336 --- /dev/null +++ b/util/crossgcc/sum/cmake-3.24.1.tar.gz.cksum @@ -0,0 +1 @@ +39192c137f4d07175cb1d5d064ca38acc77982f6 tarballs/cmake-3.24.1.tar.gz diff --git a/util/crossgcc/sum/compiler-rt-14.0.6.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-14.0.6.src.tar.xz.cksum deleted file mode 100644 index 5b4f25b..0000000 --- a/util/crossgcc/sum/compiler-rt-14.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -91f03b578aff0fda6b9d3e2185e6ea5e588c6d47 tarballs/compiler-rt-14.0.6.src.tar.xz diff --git a/util/crossgcc/sum/llvm-14.0.6.src.tar.xz.cksum b/util/crossgcc/sum/llvm-14.0.6.src.tar.xz.cksum deleted file mode 100644 index 4e1de3e..0000000 --- a/util/crossgcc/sum/llvm-14.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -975020d4f7164d84a89f0f9b2153dd870d06e02d tarballs/llvm-14.0.6.src.tar.xz diff --git a/util/crossgcc/sum/llvm-15.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-15.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..0e033aa --- /dev/null +++ b/util/crossgcc/sum/llvm-15.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +6f7f53d45ae8d207a6d72fd8ac380160f240d37e tarballs/llvm-15.0.0.src.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/67367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81a8371190513ca34d3c5efb0e3770ac3d873b03 Gerrit-Change-Number: 67367 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: [TEST] Shotzo cut off USB LAN power
by Tony Huang (Code Review) 06 Sep '22

06 Sep '22

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67366 ) Change subject: [TEST] Shotzo cut off USB LAN power ...................................................................... [TEST] Shotzo cut off USB LAN power Change-Id: I252a4e285e65530cfde5bd07d6e1c5971c4f971b Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/dedede/dsdt.asl A src/mainboard/google/dedede/mainboard.asl 2 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/67366/1 diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl index 56812d5..85e6b6b 100644 --- a/src/mainboard/google/dedede/dsdt.asl +++ b/src/mainboard/google/dedede/dsdt.asl @@ -19,6 +19,7 @@ #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { + #include "mainboard.asl" Device (PCI0) { #include <soc/intel/common/block/acpi/acpi/northbridge.asl> diff --git a/src/mainboard/google/dedede/mainboard.asl b/src/mainboard/google/dedede/mainboard.asl new file mode 100644 index 0000000..6c0345d --- /dev/null +++ b/src/mainboard/google/dedede/mainboard.asl @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <baseboard/gpio.h> +#if CONFIG(BOARD_GOOGLE_SHOTZO) +/* + * S0ix Entry/Exit Notifications + * Called from \_SB.PEPD._DSM + */ +Method (MS0X, 1, Serialized) +{ + If (Arg0 == 1) { + /* + * On S0ix entry, clear the SLP_S0_GATE pin, so that the rest of + * the platform can transition to its low power state as well. + */ + \_SB.PCI0.CTXS(GPP_A10); + } Else { + /* + * On S0ix exit, set the SLP_S0_GATE pin, so that the rest of + * the platform will resume from its low power state. + */ + \_SB.PCI0.STXS(GPP_A10); + } +} +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/67366 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I252a4e285e65530cfde5bd07d6e1c5971c4f971b Gerrit-Change-Number: 67366 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes
by Rex-BC Chen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67355 ) Change subject: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/67355/comment/de6aeffc_4e809faa PS1, Line 9: We failed to bringup GPU in kernel due to the wrong pll setting. > Some of the pll settings are incorrect, which cause problems in GPU after booting into kernel. Done File src/soc/mediatek/mt8188/pll.c: https://review.coreboot.org/c/coreboot/+/67355/comment/2157228c_88513fc4 PS1, Line 526: setbits32 > Use `clrsetbits32`. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/67355 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I971109a5f72e3307899daaf5a5f26022124b559b Gerrit-Change-Number: 67355 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 06:50:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit September 2022