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Change subject: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
......................................................................
Patch Set 6: Verified-1
(8 comments)
File src/soc/intel/alderlake/hsphy.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/b2ffb86b_27ef9e27
PS6, Line 28: #define HSPHY_PAYLOAD_SIZE 32*KiB
Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/9ff45982_56b11579
PS6, Line 40: #define HSPHY_MEM_VERIFIER_ERROR_STATUS (HSPHY_VERIFIER_BASE + 0x30)
please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/4c598327_dbca2f0f
PS6, Line 67: }__packed;
space required after that close brace '}'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/37f14033_837d93c3
PS6, Line 159: printk (BIOS_ERR, "Hash alg %d not supported, try SHA384\n", hash_alg);
space prohibited between function name and open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/708b78fb_0dd5abd1
PS6, Line 187: i += sizeof (*push_model);
space prohibited between function name and open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/e1889575_b85c2d42
PS6, Line 195: i += sizeof (uint32_t);
space prohibited between function name and open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/ecd86075_8181d329
PS6, Line 312: hsphy_ver = REGBAR32(CPU_PID_PCIE_PHYx16_0, HSPHY_FW_VERSION);;
Statements terminations use 1 semicolon
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150370):
https://review.coreboot.org/c/coreboot/+/64074/comment/b22aa475_8342346c
PS6, Line 317: hsphy_ver = REGBAR32(CPU_PID_PCIE_PHYx16_1, HSPHY_FW_VERSION);;
Statements terminations use 1 semicolon
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Change subject: soc/intel/alderlake/chip.c: Add missing ADL-S USB ports ACPI names
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Patch Set 9: Verified-1
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Change subject: include/smbios.h: Add PCIe Gen5 slot type definitions
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Patch Set 9: Verified-1
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Change subject: soc/intel/alderlake/Kconfig: Unselect IPU for ADL-S
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Patch Set 14: Verified+1
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Change subject: mb/msi/ms7d25: add basic FSP configuration in devicetree
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Patch Set 17: Verified+1
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Change subject: soc/intel/alderlake: add chipset devicetree for ADL-S
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Patch Set 16: Verified+1
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Change subject: soc/intel/alderlake: add GPIO definitions for PCH-S
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Patch Set 15: Verified+1
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