coreboot-gerrit April 2022

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: correcting the samsung part number vau...
by Rob Barnes (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Chris Wang, Felix Held. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63354 ) Change subject: mb/google/guybrush/var/dewatt: correcting the samsung part number vaule in SPD data ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35dc5f036a29cdf4763389b6425df99ff63bbfa0 Gerrit-Change-Number: 63354 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 04 Apr 2022 19:23:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Accept Google Ti50 TPM DID:VID
by Jett Rink (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Jes Klinke, Tim Wawrzynczak, Christian Walter, Julius Werner. Jett Rink has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63158 ) Change subject: tpm: Accept Google Ti50 TPM DID:VID ...................................................................... Patch Set 12: Code-Review+1 (1 comment) File src/drivers/tpm/cr50.c: https://review.coreboot.org/c/coreboot/+/63158/comment/53acde51_10f631a1 PS12, Line 112: 0; nit: return `CB_SUCCESS` here instead of `0` -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 12 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 04 Apr 2022 19:16:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/mb/facebook/monolith: Remove IGNORE_IASL_MISSING_DEPENDENCY
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63245 ) Change subject: src/mb/facebook/monolith: Remove IGNORE_IASL_MISSING_DEPENDENCY ...................................................................... src/mb/facebook/monolith: Remove IGNORE_IASL_MISSING_DEPENDENCY CB:63244 solved the missing dependency on _PRS The config IGNORE_IASL_MISSING_DEPENDENCY can be removed. BUG=N/A TEST=build facebook monolith and verify no IASL warning is reported. Change-Id: I0d7c99e69d56aa8ebe08b52c91ef800390263185 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63245 Reviewed-by: Erik van den Bogaert <ebogaert(a)eltan.com> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/facebook/monolith/Kconfig 1 file changed, 0 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Erik van den Bogaert: Looks good to me, but someone else must approve diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index 33e4526..0fb05a1 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -1,8 +1,5 @@ if BOARD_FACEBOOK_MONOLITH -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 -- To view, visit https://review.coreboot.org/c/coreboot/+/63245 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d7c99e69d56aa8ebe08b52c91ef800390263185 Gerrit-Change-Number: 63245 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: src/mb/facebook/monolith/acpi/superio.asl: Remove _PRS
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63244 ) Change subject: src/mb/facebook/monolith/acpi/superio.asl: Remove _PRS ...................................................................... src/mb/facebook/monolith/acpi/superio.asl: Remove _PRS IASL reports warning on missing _SRS. Devices have fixed configuration which is always enabled. Remove _PRS for this fixed configuration. BUG=N/A TEST=built facebook monolith and verify no IASL warning is reported. Change-Id: I554d3497255c1e50cdbe74b1cffc9f2c59fbae77 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63244 Reviewed-by: Erik van den Bogaert <ebogaert(a)eltan.com> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/facebook/monolith/acpi/superio.asl 1 file changed, 0 insertions(+), 19 deletions(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Erik van den Bogaert: Looks good to me, but someone else must approve diff --git a/src/mainboard/facebook/monolith/acpi/superio.asl b/src/mainboard/facebook/monolith/acpi/superio.asl index 4ffd557..ce5595f 100644 --- a/src/mainboard/facebook/monolith/acpi/superio.asl +++ b/src/mainboard/facebook/monolith/acpi/superio.asl @@ -17,16 +17,6 @@ FixedIO (0x6E, 0x02) IRQNoFlags () {4} }) - - Name (_PRS, ResourceTemplate () - { - StartDependentFn (0, 0) { - FixedIO (0x03F8, 0x08) - FixedIO (0x6E, 0x02) - IRQNoFlags () {4} - } - EndDependentFn () - }) } Device (COM2) { @@ -43,13 +33,4 @@ FixedIO (0x03E8, 0x08) IRQNoFlags () {3} }) - - Name (_PRS, ResourceTemplate () - { - StartDependentFn (0, 0) { - FixedIO (0x03E8, 0x08) - IRQNoFlags () {3} - } - EndDependentFn () - }) } -- To view, visit https://review.coreboot.org/c/coreboot/+/63244 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I554d3497255c1e50cdbe74b1cffc9f2c59fbae77 Gerrit-Change-Number: 63244 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/{brya, brask}: Disable PCH USB2 phy power gating
by Sridhar Siricilla (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak. Hello build bot (Jenkins), Subrata Banik, Paul Menzel, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63294 to look at the new patch set (#5). Change subject: mb/google/{brya, brask}: Disable PCH USB2 phy power gating ...................................................................... mb/google/{brya, brask}: Disable PCH USB2 phy power gating The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue. Please refer Intel doc#723158 for more information. BUG=b:221461379 TEST=Build and boot Gimble board Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I25033ea218fa3154eb99af6be43c4198f4db3bcb --- M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 2 files changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/63294/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25033ea218fa3154eb99af6be43c4198f4db3bcb Gerrit-Change-Number: 63294 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating
by Sridhar Siricilla (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Subrata Banik, Paul Menzel, Angel Pons, Sridhar Siricilla, Kane Chen. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Angel Pons, Kane Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63293 to look at the new patch set (#5). Change subject: soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating ...................................................................... soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gating The patch adds mechanism in the Alder Lake SoC code to control PCH USB2 Phy power gating from devicetree. Please refer Intel doc#723158 for more information. BUG=b:221461379 TEST=Build and boot Gimble board Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I3d80a3e36c6f8a3c0f174f955b11457752809f4d --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c 2 files changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/63293/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d80a3e36c6f8a3c0f174f955b11457752809f4d Gerrit-Change-Number: 63293 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/hp/z220_series: Convert z220_sff_workstation into variant
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62808 ) Change subject: mb/hp/z220_series: Convert z220_sff_workstation into variant ...................................................................... mb/hp/z220_series: Convert z220_sff_workstation into variant No functional change, just refactoring to make room for CMT variant. Built with BUILD_TIMELESS=1 and no config included before and after. $ diff master.rom build/coreboot.rom $ TESTED: boots to SeaBIOS on HP Z220 SFF Flashed bios region internally, mainboard also has FDO (flash descriptor override) jumper that allows r/w to whole flash. Change-Id: I6aaac75216b2d7c8bb48801454ce616ace3b1422 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62808 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- R src/mainboard/hp/z220_series/Kconfig R src/mainboard/hp/z220_series/Kconfig.name A src/mainboard/hp/z220_series/Makefile.inc R src/mainboard/hp/z220_series/acpi/ec.asl R src/mainboard/hp/z220_series/acpi/platform.asl R src/mainboard/hp/z220_series/acpi/superio.asl R src/mainboard/hp/z220_series/board_info.txt R src/mainboard/hp/z220_series/cmos.default R src/mainboard/hp/z220_series/cmos.layout R src/mainboard/hp/z220_series/data.vbt R src/mainboard/hp/z220_series/devicetree.cb R src/mainboard/hp/z220_series/dsdt.asl R src/mainboard/hp/z220_series/early_init.c R src/mainboard/hp/z220_series/gma-mainboard.ads R src/mainboard/hp/z220_series/hda_verb.c R src/mainboard/hp/z220_series/mainboard.c R src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c A src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb D src/mainboard/hp/z220_sff_workstation/Makefile.inc 19 files changed, 35 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/hp/z220_sff_workstation/Kconfig b/src/mainboard/hp/z220_series/Kconfig similarity index 65% rename from src/mainboard/hp/z220_sff_workstation/Kconfig rename to src/mainboard/hp/z220_series/Kconfig index d706665..ee5b5b4 100644 --- a/src/mainboard/hp/z220_sff_workstation/Kconfig +++ b/src/mainboard/hp/z220_series/Kconfig @@ -1,7 +1,5 @@ -if BOARD_HP_Z220_SFF_WORKSTATION - -config BOARD_SPECIFIC_OPTIONS - def_bool y +config BOARD_HP_Z220_SERIES_COMMON + def_bool n select BOARD_ROMSIZE_KB_16384 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES @@ -20,6 +18,11 @@ select GFX_GMA_ANALOG_I2C_HDMI_B select MAINBOARD_USES_IFD_GBE_REGION +config BOARD_HP_Z220_SFF_WORKSTATION + select BOARD_HP_Z220_SERIES_COMMON + +if BOARD_HP_Z220_SERIES_COMMON + config VBOOT select VBOOT_VBNV_CMOS select VBOOT_NO_BOARD_SUPPORT @@ -36,10 +39,19 @@ default 0x570000 config MAINBOARD_DIR - default "hp/z220_sff_workstation" + default "hp/z220_series" + +config VARIANT_DIR + default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION config MAINBOARD_PART_NUMBER - default "HP Z220 SFF Workstation" + default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION + +config OVERRIDE_DEVICETREE + default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" + +config INTEL_GMA_VBT_FILE + default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" config DRAM_RESET_GATE_GPIO int diff --git a/src/mainboard/hp/z220_sff_workstation/Kconfig.name b/src/mainboard/hp/z220_series/Kconfig.name similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/Kconfig.name rename to src/mainboard/hp/z220_series/Kconfig.name diff --git a/src/mainboard/hp/z220_series/Makefile.inc b/src/mainboard/hp/z220_series/Makefile.inc new file mode 100644 index 0000000..00426a8 --- /dev/null +++ b/src/mainboard/hp/z220_series/Makefile.inc @@ -0,0 +1,5 @@ +bootblock-y += variants/$(VARIANT_DIR)/gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/z220_sff_workstation/acpi/ec.asl b/src/mainboard/hp/z220_series/acpi/ec.asl similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/acpi/ec.asl rename to src/mainboard/hp/z220_series/acpi/ec.asl diff --git a/src/mainboard/hp/z220_sff_workstation/acpi/platform.asl b/src/mainboard/hp/z220_series/acpi/platform.asl similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/acpi/platform.asl rename to src/mainboard/hp/z220_series/acpi/platform.asl diff --git a/src/mainboard/hp/z220_sff_workstation/acpi/superio.asl b/src/mainboard/hp/z220_series/acpi/superio.asl similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/acpi/superio.asl rename to src/mainboard/hp/z220_series/acpi/superio.asl diff --git a/src/mainboard/hp/z220_sff_workstation/board_info.txt b/src/mainboard/hp/z220_series/board_info.txt similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/board_info.txt rename to src/mainboard/hp/z220_series/board_info.txt diff --git a/src/mainboard/hp/z220_sff_workstation/cmos.default b/src/mainboard/hp/z220_series/cmos.default similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/cmos.default rename to src/mainboard/hp/z220_series/cmos.default diff --git a/src/mainboard/hp/z220_sff_workstation/cmos.layout b/src/mainboard/hp/z220_series/cmos.layout similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/cmos.layout rename to src/mainboard/hp/z220_series/cmos.layout diff --git a/src/mainboard/hp/z220_sff_workstation/data.vbt b/src/mainboard/hp/z220_series/data.vbt similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/data.vbt rename to src/mainboard/hp/z220_series/data.vbt Binary files differ diff --git a/src/mainboard/hp/z220_sff_workstation/devicetree.cb b/src/mainboard/hp/z220_series/devicetree.cb similarity index 98% rename from src/mainboard/hp/z220_sff_workstation/devicetree.cb rename to src/mainboard/hp/z220_series/devicetree.cb index 0de9cfa..4611bec 100644 --- a/src/mainboard/hp/z220_sff_workstation/devicetree.cb +++ b/src/mainboard/hp/z220_series/devicetree.cb @@ -30,7 +30,6 @@ register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" register "pcie_port_coalesce" = "true" register "sata_interface_speed_support" = "0x3" - register "sata_port_map" = "0xf" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005" diff --git a/src/mainboard/hp/z220_sff_workstation/dsdt.asl b/src/mainboard/hp/z220_series/dsdt.asl similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/dsdt.asl rename to src/mainboard/hp/z220_series/dsdt.asl diff --git a/src/mainboard/hp/z220_sff_workstation/early_init.c b/src/mainboard/hp/z220_series/early_init.c similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/early_init.c rename to src/mainboard/hp/z220_series/early_init.c diff --git a/src/mainboard/hp/z220_sff_workstation/gma-mainboard.ads b/src/mainboard/hp/z220_series/gma-mainboard.ads similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/gma-mainboard.ads rename to src/mainboard/hp/z220_series/gma-mainboard.ads diff --git a/src/mainboard/hp/z220_sff_workstation/hda_verb.c b/src/mainboard/hp/z220_series/hda_verb.c similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/hda_verb.c rename to src/mainboard/hp/z220_series/hda_verb.c diff --git a/src/mainboard/hp/z220_sff_workstation/mainboard.c b/src/mainboard/hp/z220_series/mainboard.c similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/mainboard.c rename to src/mainboard/hp/z220_series/mainboard.c diff --git a/src/mainboard/hp/z220_sff_workstation/gpio.c b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c similarity index 100% rename from src/mainboard/hp/z220_sff_workstation/gpio.c rename to src/mainboard/hp/z220_series/variants/z220_sff_workstation/gpio.c diff --git a/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb new file mode 100644 index 0000000..c31bf33 --- /dev/null +++ b/src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb @@ -0,0 +1,12 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0 on + subsystemid 0x103c 0x1791 inherit + + chip southbridge/intel/bd82x6x + register "sata_port_map" = "0xf" + device pci 1c.4 on end # dummy setting + end + end +end diff --git a/src/mainboard/hp/z220_sff_workstation/Makefile.inc b/src/mainboard/hp/z220_sff_workstation/Makefile.inc deleted file mode 100644 index f0b34f9..0000000 --- a/src/mainboard/hp/z220_sff_workstation/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -bootblock-y += gpio.c -romstage-y += gpio.c -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -bootblock-y += early_init.c -romstage-y += early_init.c -- To view, visit https://review.coreboot.org/c/coreboot/+/62808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6aaac75216b2d7c8bb48801454ce616ace3b1422 Gerrit-Change-Number: 62808 Gerrit-PatchSet: 4 Gerrit-Owner: Damien Zammit Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: libpayload/defconfig: enable vboot Lib Build
by Selma Bensaid (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Tim Wawrzynczak. Hello Bora Guvendik, Anil Kumar K, build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63240 to look at the new patch set (#3). Change subject: libpayload/defconfig: enable vboot Lib Build ...................................................................... libpayload/defconfig: enable vboot Lib Build After depthcharge patch #3461454 merge, vboot build need to be built by libpayload. BUG=chrome-os-partner:226438207 TEST=Compiled brya and redrix in standalone mode. Signed-off-by: Selma Bensaid <selma.bensaid(a)intel.com> Change-Id: Ib2bb2ce42a314e05ef22ea7b8abc067d6361d511 --- M payloads/libpayload/configs/defconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/63240/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2bb2ce42a314e05ef22ea7b8abc067d6361d511 Gerrit-Change-Number: 63240 Gerrit-PatchSet: 3 Gerrit-Owner: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/adlrvp: Update the FIVR configurations
by V Sowmya (Code Review) 04 Apr '22

04 Apr '22

V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63356 ) Change subject: mb/intel/adlrvp: Update the FIVR configurations ...................................................................... mb/intel/adlrvp: Update the FIVR configurations This patch sets the optimized FIVR configuration for adlrvp-n cutomized based on the pnp measurements to achieve the better power savings in sleep states. * Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3, S4, S5 states. * Update the supported voltage states. * Set the ICC max to 500mA for v1p05 and vnn. Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Change-Id: I06298eb1aec07eae34420c5736e912c707fefbc4 --- M src/mainboard/intel/adlrvp/devicetree_n.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/63356/1 diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index 2b7eca6..96b9e44 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -150,6 +150,21 @@ }, }" + # FIVR configurations + register "ext_fivr_settings" = "{ + .configure_ext_fivr = 1, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, + .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, + .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, + .v1p05_voltage_mv = 1050, + .vnn_voltage_mv = 1050, + .vnn_sx_voltage_mv = 1050, + .v1p05_icc_max_ma = 500, + .vnn_icc_max_ma = 500, + }" + device domain 0 on device ref igpu on end device ref ipu on -- To view, visit https://review.coreboot.org/c/coreboot/+/63356 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06298eb1aec07eae34420c5736e912c707fefbc4 Gerrit-Change-Number: 63356 Gerrit-PatchSet: 1 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya: Update the FIVR configurations for Nivviks
by V Sowmya (Code Review) 04 Apr '22

04 Apr '22

V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63355 ) Change subject: mb/google/brya: Update the FIVR configurations for Nivviks ...................................................................... mb/google/brya: Update the FIVR configurations for Nivviks This patch sets the optimized FIVR configuration for nivviks cutomized based on the pnp measurements to achieve the better power savings in sleep states. * Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3, S4, S5 states. * Update the supported voltage states. * Set the ICC max to 500mA for v1p05 and vnn. Signed-off-by: V Sowmya <v.sowmya(a)intel.com> Change-Id: If8da0dfe3059087526f74042be3c8b7e4a7ece82 --- M src/mainboard/google/brya/variants/nivviks/overridetree.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/63355/1 diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index 610e990..03146b5 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -23,6 +23,21 @@ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN + # FIVR configurations + register "ext_fivr_settings" = "{ + .configure_ext_fivr = 1, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, + .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, + .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, + .v1p05_voltage_mv = 1050, + .vnn_voltage_mv = 1050, + .vnn_sx_voltage_mv = 1050, + .v1p05_icc_max_ma = 500, + .vnn_icc_max_ma = 500, + }" + device domain 0 on device ref ipu on chip drivers/intel/mipi_camera -- To view, visit https://review.coreboot.org/c/coreboot/+/63355 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If8da0dfe3059087526f74042be3c8b7e4a7ece82 Gerrit-Change-Number: 63355 Gerrit-PatchSet: 1 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-MessageType: newchange

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