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Change subject: mb/hp/z220_series: Add Z220 CMT Workstation variant
......................................................................
Patch Set 6:
(3 comments)
Patchset:
PS5:
> Jenkins isn't happy for some reason
Jenkins can't count to +1 😄
Patchset:
PS6:
C'mon Jenkins!
File src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62809/comment/8f580199_9dc1713d
PS3, Line 5: subsystemid 0x103c 0x1791 inherit
> Hmmm, interesting. […]
No, I think without this line, the whole southbridge has the wrong subsystemid because the missing line overrides the line in the devicetree.
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Change subject: bsd/cb_err: Add error code for UEFI variable store
......................................................................
Patch Set 3:
(1 comment)
File src/commonlib/bsd/include/commonlib/bsd/cb_err.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145506):
https://review.coreboot.org/c/coreboot/+/61960/comment/3b18f97f_d0a7fe3d
PS3, Line 45: CB_EFI_FVH_INVALID = -500, /**< UEFI FVH is corrupted */
please, no space before tabs
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Hello Patrick Georgi, Michał Żygowski, Igor Bagnucki, Paul Menzel, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63396
to look at the new patch set (#2).
Change subject: Documentation: Add Dasharo to after-market firmware list
......................................................................
Documentation: Add Dasharo to after-market firmware list
Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com>
Change-Id: I19dbf70bc9ceec1408944c4029db6eabd5e2254d
---
M Documentation/distributions.md
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/63396/2
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62014 )
Change subject: drivers/smmstore: Expose region device
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/smmstore/store.c:
https://review.coreboot.org/c/coreboot/+/62014/comment/1fc13cfb_7cda89bb
PS4, Line 67: lookup_store
> No, as the name incoherent_rdev_init implies it's not cache coherent. Writes might not be seen as the old region content is still in cache.
yes reads are done mmapped and writes via SPI controller. Should we always use rw to simplify things? In SMM the SPI flash is not cached anyways so I don't think there really performance concerns (was the reason why we use incoherent rdev iirc).
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Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63290 )
Change subject: ChromeOS: Drop filling ECFW_RW/RO state in CNVS
......................................................................
ChromeOS: Drop filling ECFW_RW/RO state in CNVS
This field was never meant to be filled out by coreboot, because it
can't know what the right value for this will be by the time the OS
is running, so anything coreboot could fill in here is premature.
This field is only read by the chromeos-specific `crossystem` utility,
not by kernel code, so if one does not run through depthcharge there'll
be many more broken assumptions in CNVS anyway.
Change-Id: Ia56b3a3fc82f1b8247a6ee512fe960e9d3d87585
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63290
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
---
M src/include/bootmode.h
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/vendorcode/google/chromeos/gnvs.c
6 files changed, 0 insertions(+), 38 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, but someone else must approve
Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/include/bootmode.h b/src/include/bootmode.h
index e2d1cb9..12c9f58 100644
--- a/src/include/bootmode.h
+++ b/src/include/bootmode.h
@@ -14,7 +14,6 @@
int get_wipeout_mode_switch(void);
int get_lid_switch(void);
int get_ec_is_trusted(void);
-bool mainboard_ec_running_ro(void);
/* Return 1 if display initialization is required. 0 if not. */
int display_init_required(void);
diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c
index fb249d4..b4bd5fe 100644
--- a/src/mainboard/google/butterfly/chromeos.c
+++ b/src/mainboard/google/butterfly/chromeos.c
@@ -48,15 +48,6 @@
return 0;
}
-bool mainboard_ec_running_ro(void)
-{
- // TODO: MLR
- // The firmware read/write status is a "virtual" switch and
- // will be handled elsewhere. Until then hard-code to
- // read/write instead of read-only for developer mode.
- return false;
-}
-
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME),
diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c
index e0bc0b0..4efcb4c 100644
--- a/src/mainboard/google/parrot/chromeos.c
+++ b/src/mainboard/google/parrot/chromeos.c
@@ -46,11 +46,6 @@
return !get_gpio(GPIO_REC_MODE);
}
-bool mainboard_ec_running_ro(void)
-{
- return get_recovery_mode_switch();
-}
-
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index fcbbc8a..2fbddc2 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -74,11 +74,6 @@
return ec_in_rec_mode;
}
-bool mainboard_ec_running_ro(void)
-{
- return !!get_recovery_mode_switch();
-}
-
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index 1b9c7c4..f8b0afc 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -85,11 +85,6 @@
pci_s_write_config32(dev, SATA_SP, flags);
}
-bool mainboard_ec_running_ro(void)
-{
- return !ec_read(0xcb);
-}
-
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c
index b1090a4..33389b4e 100644
--- a/src/vendorcode/google/chromeos/gnvs.c
+++ b/src/vendorcode/google/chromeos/gnvs.c
@@ -32,8 +32,6 @@
return region_device_sz(&vpd);
}
-__weak bool mainboard_ec_running_ro(void) { return true; }
-
void chromeos_init_chromeos_acpi(void)
{
size_t vpd_size;
@@ -58,17 +56,6 @@
chromeos_acpi->vpd_rw_base = vpd_base;
chromeos_acpi->vpd_rw_size = vpd_size;
}
-
- /* EC can override to ECFW_RW. */
- chromeos_acpi->vbt2 = ACTIVE_ECFW_RO;
-
- if (CONFIG(EC_GOOGLE_CHROMEEC)) {
- if (!google_ec_running_ro())
- chromeos_acpi->vbt2 = ACTIVE_ECFW_RW;
- } else {
- if (!mainboard_ec_running_ro())
- chromeos_acpi->vbt2 = ACTIVE_ECFW_RW;
- }
}
void chromeos_set_me_hash(u32 *hash, int len)
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Change subject: drivers/smmstore: Expose region device
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/smmstore/store.c:
https://review.coreboot.org/c/coreboot/+/62014/comment/5d63d857_55bc9c1e
PS4, Line 67: lookup_store
> Can this be reused?
No, as the name incoherent_rdev_init implies it's not cache coherent. Writes might not be seen as the old region content is still in cache.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63375 )
Change subject: [RFC] CBMEM: Have INIT_HOOKS in every stage
......................................................................
Patch Set 2:
(6 comments)
File src/include/cbmem.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/dc22b4e7_76663ab3
PS2, Line 110: #define _CBMEM_INIT_HOOK_UNUSED(init_fn_) __attribute__((unused)) \
macros should not use a trailing semicolon
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/bdf1b578_5c50fb13
PS2, Line 113: #define _CBMEM_INIT_HOOK(init_fn_) \
macros should not use a trailing semicolon
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/1984002a_c1a6e7fe
PS2, Line 119: #define _CBMEM_INIT_HOOK_EARLY(init_fn_) \
macros should not use a trailing semicolon
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/1cfd9c9b_0c8061f6
PS2, Line 124: #define CBMEM_CREATION_HOOK(x) _CBMEM_INIT_HOOK(x)
please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/ab0eb13c_fb08517a
PS2, Line 126: #define CBMEM_CREATION_HOOK(x) _CBMEM_INIT_HOOK_UNUSED(x)
please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145499):
https://review.coreboot.org/c/coreboot/+/63375/comment/c71a18c0_9bdf4e95
PS2, Line 130: #define CBMEM_INIT_HOOK(x) _CBMEM_INIT_HOOK(x)
please, no space before tabs
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Change subject: drivers/smmstore: Expose region device
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/smmstore/store.c:
https://review.coreboot.org/c/coreboot/+/62014/comment/b7dee6f0_1dd402d3
PS4, Line 67: lookup_store
Can this be reused?
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