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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55067 )
Change subject: arch/x86: Add a common romstage entry
......................................................................
Patch Set 9:
(5 comments)
File src/include/romstage_common.h:
https://review.coreboot.org/c/coreboot/+/55067/comment/6ba79124_8159bc57
PS5, Line 8: __
> nit: remove the leading underscores
Done
File src/include/romstage_common.h:
https://review.coreboot.org/c/coreboot/+/55067/comment/59331aed_0b8debde
PS3, Line 6: romstage_main
> Since this is only for x86 for now, can you add this prottype to arch/romstage.h?
Used by other platforms in the next CL.
File src/soc/amd/picasso/romstage.c:
https://review.coreboot.org/c/coreboot/+/55067/comment/60746af9_33bedeaf
PS5, Line 3: #include <acpi/acpi.h>
: #include <amdblocks/memmap.h>
: #include <amdblocks/pmlib.h>
: #include <arch/cpu.h>
: #include <commonlib/helpers.h>
: #include <console/console.h>
: #include <fsp/api.h>
: #include <program_loading.h>
: #include <timestamp.h>
: #include <types.h>
> Looks like these includes are sorted alphabetically. […]
Done
https://review.coreboot.org/c/coreboot/+/55067/comment/f4c736cf_dcfecc1d
PS5, Line 17: timestamp_add_now(TS_START_ROMSTAGE);
> This needs to be removed
Done
File src/soc/example/min86/romstage.c:
https://review.coreboot.org/c/coreboot/+/55067/comment/1157b938_33d0a6a7
PS5, Line 4: #include <arch/cpu.h>
> No longer needed
Done
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I'd like you to reexamine a change. Please visit
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Change subject: arch/x86: Add a common romstage entry
......................................................................
arch/x86: Add a common romstage entry
It might be possible to have this used for more than x86, but that
will be for a later commit.
Change-Id: I4968364a95b5c69c21d3915d302d23e6f1ca182f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/Makefile.inc
A src/arch/x86/romstage.c
M src/cpu/intel/car/romstage.c
M src/drivers/amd/agesa/romstage.c
A src/include/romstage_common.h
M src/soc/amd/cezanne/romstage.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/example/min86/romstage.c
9 files changed, 42 insertions(+), 46 deletions(-)
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Hello build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
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Change subject: Kconfig: Set better defaults for building romstage
......................................................................
Kconfig: Set better defaults for building romstage
On x86 there is generally no reason to have a separate romstage unless
VBOOT is used.
Change-Id: I4c53b6fa7a3e66415c5b1c539918a6c1cd8defa1
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/Kconfig
M src/soc/intel/apollolake/Kconfig
2 files changed, 6 insertions(+), 1 deletion(-)
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I'd like you to reexamine a change. Please visit
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Change subject: soc/amd/non_car/memlayout_x86.ld: Top align the bootblock
......................................................................
soc/amd/non_car/memlayout_x86.ld: Top align the bootblock
This removes the need for a fixed size bootblock.
Change-Id: I22116bd4b5be86e21cd5a16d6663166a10add17e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
1 file changed, 14 insertions(+), 1 deletion(-)
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: link Agesa into bootblock
......................................................................
link Agesa into bootblock
For AGESA targets the APs are started by the BSP in romstage and need
to jump past the bootblock into the romstage. When there is a separate
romstage this is complicated as the APs in boot need to know where
to jump in romstage. This is done by setting a pointer in BIOSRAM.
When the romstage is linked inside the bootblock there is no need for
such tricks as the symbol for the AP jump address can directly be
referenced.
Change-Id: Ic4c71b9c9a245e07d713839fb3628cbfc0dc3457
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/Kconfig
M src/arch/x86/bootblock.ld
M src/arch/x86/car.ld
M src/cpu/amd/agesa/Kconfig
M src/drivers/amd/agesa/bootblock.c
M src/drivers/amd/agesa/romstage.c
M src/northbridge/amd/agesa/agesa_helper.h
M src/vendorcode/amd/agesa/Makefile.inc
8 files changed, 28 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/55070/10
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Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Philipp Hug, ron minnich, Stefan Reinauer, Subrata Banik, Julius Werner, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Piotr Król, Jason Glenesk, Michał Żygowski, Martin Roth, Marshall Dawson, ron minnich, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: Allow to build romstage sources inside the bootblock
......................................................................
Allow to build romstage sources inside the bootblock
Having a separate romstage is only desirable:
- with advanced setups like vboot or normal/fallback
- boot medium is slow at startup (some ARM SOCs)
- bootblock is limited in size (Intel APL 32K)
When this is not the case there is no need for the extra complexity
that romstage brings. Including the romstage sources inside the
bootblock substantially reduces the total code footprint. Often the
resulting code is 10-20k smaller.
TESTED: works on qemu x86, arm and aarch64.
Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
M src/Kconfig
M src/arch/arm64/romstage.c
M src/arch/x86/Makefile.inc
M src/include/rules.h
M src/lib/prog_loaders.c
M src/mainboard/emulation/qemu-armv7/romstage.c
7 files changed, 26 insertions(+), 5 deletions(-)
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Hello Hung-Te Lin, Raul Rangel, Philipp Hug, Julius Werner, Andrey Petrov, Piotr Król, Jason Glenesk, Michał Żygowski, Marshall Dawson, Christian Walter, Fred Reitberger, ron minnich, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: Replace some ENV_ROMSTAGE with ENV_FIRST_CBMEM_STAGE
......................................................................
Replace some ENV_ROMSTAGE with ENV_FIRST_CBMEM_STAGE
Most of the time we care about the first stage that sets up CBMEM and
not explicitly romstage. When linking romstage code in the bootblock
it's good to make that assumption flexible so introcude a new symbol
'ENV_FIRST_CBMEM_STAGE'.
Change-Id: I84a126f391b9dd1243c25dedb3d330c99f3fbc19
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---
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/state_machine.c
M src/drivers/intel/fsp2_0/hand_off_block.c
M src/drivers/intel/fsp2_0/util.c
M src/drivers/usb/ehci_debug.c
M src/include/cbmem.h
M src/include/rules.h
M src/lib/cbfs.c
M src/lib/imd_cbmem.c
M src/lib/prog_loaders.c
M src/lib/program.ld
M src/lib/timestamp.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/google/cyan/chromeos.c
M src/mainboard/google/gale/mmu.c
M src/mainboard/google/poppy/variants/nautilus/sku.c
M src/mainboard/google/rambi/chromeos.c
M src/mainboard/google/storm/mmu.c
M src/mainboard/lippert/frontrunner-af/sema.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/security/tpm/tspi/log.c
M src/soc/amd/common/pi/agesawrapper.c
M src/soc/amd/common/pi/def_callouts.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/cavium/cn81xx/sdram.c
M src/soc/intel/quark/storage_test.c
M src/soc/mediatek/mt8186/emi.c
M src/soc/sifive/fu540/clock.c
M src/southbridge/intel/bd82x6x/early_pch.c
M src/southbridge/intel/i82801gx/early_init.c
M src/southbridge/intel/i82801ix/early_init.c
M src/southbridge/intel/i82801jx/early_init.c
M src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
34 files changed, 52 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/63418/4
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Hello Julius Werner,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE
......................................................................
arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE
Prepare platforms for linking romstage code in the bootblock.
Change-Id: Ic20799b4d6e3f62cd05791a2bd275000a12cc83c
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/arm64/romstage.c
M src/mainboard/emulation/qemu-armv7/romstage.c
M src/mainboard/ti/beaglebone/romstage.c
3 files changed, 19 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/63420/2
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Fred Reitberger, Patrick Rudolph, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55067
to look at the new patch set (#9).
Change subject: arch/x86: Add a common romstage entry
......................................................................
arch/x86: Add a common romstage entry
It might be possible to have this used for more than x86, but that
will be for a later commit.
Change-Id: I4968364a95b5c69c21d3915d302d23e6f1ca182f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/Makefile.inc
A src/arch/x86/romstage.c
M src/cpu/intel/car/romstage.c
M src/drivers/amd/agesa/romstage.c
A src/include/romstage_common.h
M src/soc/amd/cezanne/romstage.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/example/min86/romstage.c
9 files changed, 42 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/55067/9
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Gerrit-MessageType: newpatchset
Attention is currently required from: Paul Menzel, Angel Pons, Kyösti Mälkki, Felix Held.
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Kyösti Mälkki,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55066
to look at the new patch set (#6).
Change subject: drivers/amd/agesa/romstage.c: Move timestamp and console init up
......................................................................
drivers/amd/agesa/romstage.c: Move timestamp and console init up
Follow-up commits move this to a common place.
Change-Id: I26a37f9384a581a8a750efccc2100a5c6a6f0f85
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/drivers/amd/agesa/romstage.c
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/55066/6
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