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Change subject: link Agesa into bootblock
......................................................................
Patch Set 9:
(1 comment)
File src/drivers/amd/agesa/bootblock.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145588):
https://review.coreboot.org/c/coreboot/+/55070/comment/333ecf38_b7cab63f
PS9, Line 47: void (*ap_romstage_entry)(void) = get_ap_entry_ptr();
function definition argument 'void' should also have an identifier name
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Hello build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: Kconfig: Set better defaults for building romstage
......................................................................
Kconfig: Set better defaults for building romstage
On x86 there is generally no reason to have a separate romstage unless
VBOOT is used.
Change-Id: I4c53b6fa7a3e66415c5b1c539918a6c1cd8defa1
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/Kconfig
M src/soc/intel/apollolake/Kconfig
2 files changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/63419/5
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Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Philipp Hug, ron minnich, Stefan Reinauer, Subrata Banik, Julius Werner, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Piotr Król, Jason Glenesk, Michał Żygowski, Martin Roth, Marshall Dawson, ron minnich, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: Allow to build romstage sources inside the bootblock
......................................................................
Allow to build romstage sources inside the bootblock
Having a separate romstage is only desirable:
- with advanced setups like vboot or normal/fallback
- boot medium is slow at startup (some ARM SOCs)
- bootblock is limited in size (Intel APL 32K)
When this is not the case there is no need for the extra complexity
that romstage brings. Including the romstage sources inside the
bootblock substantially reduces the total code footprint. Often the
resulting code is 10-20k smaller.
This is controlled via a Kconfig option.
TESTED: works on qemu x86, arm and aarch64.
Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
M src/Kconfig
M src/arch/arm64/romstage.c
M src/arch/x86/Makefile.inc
M src/include/rules.h
M src/lib/prog_loaders.c
M src/mainboard/emulation/qemu-armv7/romstage.c
7 files changed, 30 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/55068/12
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Change subject: arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE
......................................................................
arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE
Prepare platforms for linking romstage code in the bootblock.
Change-Id: Ic20799b4d6e3f62cd05791a2bd275000a12cc83c
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/arm64/romstage.c
M src/mainboard/emulation/qemu-armv7/romstage.c
M src/mainboard/ti/beaglebone/romstage.c
3 files changed, 18 insertions(+), 1 deletion(-)
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55068 )
Change subject: Allow to build romstage sources inside the bootblock
......................................................................
Patch Set 11:
(13 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55068/comment/5843e7b2_69cb697a
PS1, Line 9: H
> > or when the romstage is too large because it doesn't call into an external blob ;-) […]
Done
https://review.coreboot.org/c/coreboot/+/55068/comment/af9e8c04_6f471b48
PS1, Line 22: TODO make this option only visible when it makes sense
> Please mention, this is controlled by a Kconfig option.
Done
Patchset:
PS4:
> > Why are we architecturally going back to 2004 in order to save 10-20kb? With all due respect but that seems like a very questionable micro-optimization at best to put it mildly. Are you really suggesting creating another code path for a platform that only runs on at least 2mb worth of blobs is worth it for 10kb on a 32MB flash chip?
>
> I wasn't around then but 2004 coreboot looks very different from 2021 coreboot. There were romcc compiled stages and a bootblock/romstage separation just made more sense then. Also the x86 bootblock as limited to 64K which is not the case anymore. Now coreboot already supports tons of different bootpaths: just take a look at the rules.h file! Coreboot supports statically linked code, XIP code, relocatable code, separate or not verstage either linked in bootblock or in romstage, decompressor stages in bootblock to make things smaller and faster, ... This just adds one extra bootpath. I don't get why it's so scary.
> Keeping the complexity increase limited for different use cases is a price to pay and however often it leads to better abstractions and APIs, therefore increasing the general quality of the codebase. See the previous patch that makes for a common romstage entry. Besides this patch barely changes 20 lines and could probably be even less! I think this is a solid argument that this bootpath won't be hard to maintain.
>
> I don't get why the size of some big blobs required on some platform is a good argument for anything. It's just being pessimistic about any optimization one can make in coreboot.
>
> Implementing this on x86 is just a POC. The concept is not x86 specific though and requires only small changes for other platforms. On x86 often makes more sense for a 'big' bootblock than on other platforms since there is a lot of care and complexity needed to keep CAR symbols in sync between stages. On AMD systems it's even worse as APs need to communicate across stages stages without having common CAR. FWIW I could just as easily turn your argument around and ask why bootblock/romstage separation is needed or good. For a lot of use cases bootblock/romstage is architecturally over engineered and a historical artifact. That solution had a lot of merits at the time for sure, but things are different now as there is no romcc anymore. It's currently useful for VBOOT and some other edge cases and that's it. Why should 'one' usecase determine how all other images should look and function?
>
> > If you want to save space, drop all the bloat that made it into the bootblock that shouldn't be in there in the first place (like console drivers)
> Or the bloat that came with our so called generic drivers.
>
> The code pulled in bootblock is very often the same code as the one in romstage and not just more bloated things like console drivers but 'essential' things required to continue booting, like fmap, cbfs, decompression. That code is present in all stages so less stages is often a good idea. https://review.coreboot.org/c/coreboot/+/52788/4 for instance links verstage inside the bootblock.
I want to also include ramstage inside the bootblock on AMD platforms so that those only have one stage which makes sense as the x86 boots into RAM.
PS4:
> > I still have to build it with seabios with a ps/2 init patch for boot testing - I do have issues w […]
Done
Patchset:
PS7:
> Building for asus/p2b-ls breaks when selecting the option to build separate romstage with this patch series applied:
>
> src/arch/x86/romstage.c:18:17: error: no previous prototype for 'car_stage_entry'
>
> It could be because of cb:55067 in the train - Then again I have to edit that patch for it to apply, so please reproduce.
>
> Otherwise, I got these results of free flash space testing for LTO and this:
> (No payload, build config included in cbfs per default)
>
> With LTO, combined romstage: 148516 bytes free
> With LTO, without this train: 140004 bytes free
> Without LTO, combined romstage: 137316 bytes free
> Without LTO nor this train: 127652 bytes free
Seems to build.
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/55068/comment/3749fbc4_de4475e3
PS4, Line 171: default y
> Please add a help text explaining what it does and what trade-offs should be considered in setting i […]
Done
File src/drivers/amd/agesa/def_callouts.c:
https://review.coreboot.org/c/coreboot/+/55068/comment/bd5d5aa5_7abe35f4
PS1, Line 132: if (!(ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
> > Would defining both `ENV_BOOTBLOCK` and `ENV_ROMSTAGE` for the combined stage work? Or does existi […]
Done
File src/include/rules.h:
https://review.coreboot.org/c/coreboot/+/55068/comment/51592eb4_4f0a5efb
PS4, Line 37: #define ENV_ROMSTAGE !CONFIG(SEPARATE_ROMSTAGE)
> > Also incompatible setups like separate verstage and !separate romstage should be guarded against.
>
> Good point, you should just add a Kconfig dependency for that.
Done in later CL
File src/lib/prog_loaders.c:
https://review.coreboot.org/c/coreboot/+/55068/comment/a19cb373_6b6299ee
PS1, Line 4: #include "commonlib/timestamp_serialized.h"
> Shouldn't this #include use `<>` instead of double quotes?
Done
https://review.coreboot.org/c/coreboot/+/55068/comment/3f8687c2_b41f36d0
PS1, Line 19: #include <romstage_common.h>
> > x86-specific, apparently. […]
Done
File src/lib/prog_loaders.c:
https://review.coreboot.org/c/coreboot/+/55068/comment/b48ca65d_9a71daa0
PS4, Line 24: romstage_main();
> This isn't marked __noreturn__ so you'll want to add a return after this to avoid linking all the re […]
Done
File src/southbridge/intel/bd82x6x/early_pch.c:
https://review.coreboot.org/c/coreboot/+/55068/comment/b3add2be_c885f901
PS1, Line 313: if (ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
> > This guard exists because this function is called twice: once in bootblock, once in romstage. I had some patches to clean it up, but they're probably stale by now...
> >
> > src/southbridge/intel/bd82x6x/bootblock.c: early_pch_init();
> > src/northbridge/intel/sandybridge/romstage.c: early_pch_init();
>
> Yeah that needs to be fixed. That was done for some weird compatibility reasons but there is no need for that anymore.
Not sure if cleaned up, but it should not block this.
File src/southbridge/intel/i82801ix/early_init.c:
https://review.coreboot.org/c/coreboot/+/55068/comment/ec408413_4859fe45
PS1, Line 50: if (ENV_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
> Same as bd82x6x, this function is called twice: once in bootblock, once in romstage. This is the case for both users of this southbridge (gm45 and qemu-q35).
>
> src/southbridge/intel/i82801ix/bootblock.c: i82801ix_early_init();
> src/northbridge/intel/gm45/romstage.c: i82801ix_early_init();
> src/mainboard/emulation/qemu-q35/romstage.c: i82801ix_early_init();
Needs a cleanup.
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Change subject: Allow to build romstage sources inside the bootblock
......................................................................
Patch Set 10:
(1 comment)
File src/include/rules.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145587):
https://review.coreboot.org/c/coreboot/+/55068/comment/d79517fd_10dc9263
PS10, Line 313: #define ENV_FIRST_CBMEM_STAGE (CONFIG(SEPARATE_ROMSTAGE) ? ENV_ROMSTAGE : ENV_BOOTBLOCK)
line over 96 characters
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Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63170 )
Change subject: intel/common/block: move gpmr api to gpmr driver
......................................................................
Patch Set 9:
(2 comments)
Patchset:
PS9:
> At high-level, what you have done here is renaming the CB:47988 (soc/intel/common/dmi: Add DMI drive […]
Will update as GPMR driver and use GPMR api.
File src/soc/intel/common/block/gpmr/Kconfig:
https://review.coreboot.org/c/coreboot/+/63170/comment/3f94ad44_22e49bcd
PS9, Line 3: depends on SOC_INTEL_COMMON_BLOCK_DMI
> The commit message says that the "gpmr api is not DMI specific". […]
It's better use SOC_INTEL_COMMON_BLOCK_PCR rather than SOC_INTEL_COMMON_BLOCK_DMI
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55070 )
Change subject: link Agesa into bootblock
......................................................................
Patch Set 8:
(1 comment)
File src/drivers/amd/agesa/bootblock.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145582):
https://review.coreboot.org/c/coreboot/+/55070/comment/261e4748_472cd3c3
PS8, Line 47: void (*ap_romstage_entry)(void) = get_ap_entry_ptr();
function definition argument 'void' should also have an identifier name
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