9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63559 )
Change subject: mb/google/guybrush: Set BT USB to use GPIO for status
......................................................................
Patch Set 8:
Automatic boot test returned (PASS/FAIL/TOTAL): 7 / 1 / 8
PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500
and payload SeaBIOS : https://lava.9esec.io/r/101105
PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION
and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/101104
PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64
and payload SeaBIOS : https://lava.9esec.io/r/101103
PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC
and payload SeaBIOS : https://lava.9esec.io/r/101102
PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64
and payload SeaBIOS : https://lava.9esec.io/r/101101
PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN
and payload SeaBIOS : https://lava.9esec.io/r/101100
PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_
and payload SeaBIOS : https://lava.9esec.io/r/101099
FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX
and payload SeaBIOS : https://lava.9esec.io/r/101098
Please note: This test is under development and might not be accurate at all!
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Change subject: mb/google/nissa: Add gpio lock pins
......................................................................
Patch Set 3: Code-Review+2
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: mb/google/brya/var/crota: Kconfig: Select TPM I2C bus driver
......................................................................
mb/google/brya/var/crota: Kconfig: Select TPM I2C bus driver
Add TPM I2C for crota to avoid TPM I2C fail.
BUG=b:226315394
TEST=USE="project_crota emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: I7eb3ce6c2faf857c8f5d789af395e315caea4102
---
M src/mainboard/google/brya/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/63617/6
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Change subject: lib: Check for non-existent DIMMs in check_if_dimm_changed
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63628/comment/6113890d_e1273cc4
PS7, Line 7: Treat dimm addr_map 0 as non-existent
> suggestion: […]
Done
File tests/lib/spd_cache-test.c:
PS7:
> What about adding a test case for non-existent DIMMs?
Will do in the follow up CL.
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Hello Frank Wu, build bot (Jenkins), Jakub Czapiga, Subrata Banik, Tim Wawrzynczak, Ivy Jian, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
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Change subject: lib: Check for non-existent DIMMs in check_if_dimm_changed
......................................................................
lib: Check for non-existent DIMMs in check_if_dimm_changed
Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set
it if Hw is not present. Also change the test case default to avoid 0.
SODIMM SMbus address 0x50 to 0x53 is common used.
BUG=b:213964936
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
The MRC training does not be performed again after rebooting.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac
---
M src/lib/spd_cache.c
M tests/lib/spd_cache-test.c
2 files changed, 14 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/63628/8
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Change subject: mb/hp/z220_series: Add Z220 CMT Workstation variant
......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
Sorry, I made a bad rebase earlier when I refactored it. This patchset 8 should be good to go.
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Change subject: mb/hp/z220_series: Add Z220 CMT Workstation variant
......................................................................
mb/hp/z220_series: Add Z220 CMT Workstation variant
This is based on previous work done by a good friend of mine.
The notable differences between this board and the SFF variant is that:
- CMT has 4 more PCI/PCIe ports than SFF.
- CMT has 2 more SATA ports than SFF.
TESTED on Z220 CMT Workstation (boots to payload)
Change-Id: I2b298921e6f509440ec7b049e086c0878f708bd3
Signed-off-by: Damien Zammit <damien(a)zamaudio.com>
---
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/hp/z220_series/Kconfig.name
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/gpio.c
A src/mainboard/hp/z220_series/variants/z220_cmt_workstation/overridetree.cb
4 files changed, 200 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/62809/8
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