coreboot-gerrit April 2022

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Change in coreboot[master]: mb/msi/ms7d25: Configure HD Audio
by Michał Żygowski (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Michał Żygowski. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63723 to look at the new patch set (#2). Change subject: mb/msi/ms7d25: Configure HD Audio ...................................................................... mb/msi/ms7d25: Configure HD Audio Apply correct configuration of HD Audio. TEST=Launch ubuntu 20.04 and launch a YouTube video, check if microphone detects an input in the system sound settings. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I6acc22aa58f6cc99df1d48d651122e74fe08ec02 --- M src/mainboard/msi/ms7d25/devicetree.cb 1 file changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/63723/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6acc22aa58f6cc99df1d48d651122e74fe08ec02 Gerrit-Change-Number: 63723 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/msi/ms7d25: Add correct memory init configuration
by Michał Żygowski (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63503 to look at the new patch set (#9). Change subject: mb/msi/ms7d25: Add correct memory init configuration ...................................................................... mb/msi/ms7d25: Add correct memory init configuration Tested with 4x KINGSTON KF3600C17D4/8GX DIMMs. TEST=Include the microcode from vendor firmware and FSP blob from Intel R&DC. Boot the platform and see it executing ramstage. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I98b9c77d791d18640cb05c133cb0bf14ad22dcdb --- M src/mainboard/msi/ms7d25/romstage_fsp_params.c 1 file changed, 15 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/63503/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/63503 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98b9c77d791d18640cb05c133cb0bf14ad22dcdb Gerrit-Change-Number: 63503 Gerrit-PatchSet: 9 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/msi/ms7d25: add basic FSP configuration in devicetree
by Michał Żygowski (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Michał Żygowski has uploaded a new patch set (#11) to the change originally created by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/63499 ) Change subject: mb/msi/ms7d25: add basic FSP configuration in devicetree ...................................................................... mb/msi/ms7d25: add basic FSP configuration in devicetree Configure some basic FSP parameters in devicetree for to allow for booting an OS. Change-Id: Iff227c70d0155ac27d6ffa50a069d154bb7fce3c Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/mainboard/msi/ms7d25/devicetree.cb 1 file changed, 72 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/63499/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/63499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff227c70d0155ac27d6ffa50a069d154bb7fce3c Gerrit-Change-Number: 63499 Gerrit-PatchSet: 11 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/msi/ms7d25: add GPIO configuration
by Michał Żygowski (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Michał Żygowski has uploaded a new patch set (#14) to the change originally created by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/63490 ) Change subject: mb/msi/ms7d25: add GPIO configuration ...................................................................... mb/msi/ms7d25: add GPIO configuration Based on the output of: - inteltool from https://review.coreboot.org/c/coreboot/+/63374 - intelp2m from https://review.coreboot.org/c/coreboot/+/63403 TEST=Build coreboot binary for msi/ms7d5 and boot the board. Change-Id: If37eaf875f8fcfc64299227744a8c40d304a0214 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- A src/mainboard/msi/ms7d25/gpio.h M src/mainboard/msi/ms7d25/mainboard.c 2 files changed, 620 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63490/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/63490 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If37eaf875f8fcfc64299227744a8c40d304a0214 Gerrit-Change-Number: 63490 Gerrit-PatchSet: 14 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: add GPIO definitions for PCH-S
by Michał Żygowski (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak. Michał Żygowski has uploaded a new patch set (#12) to the change originally created by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/63467 ) Change subject: soc/intel/alderlake: add GPIO definitions for PCH-S ...................................................................... soc/intel/alderlake: add GPIO definitions for PCH-S Add GPIO definitions for ADL-S, similarly to how TGL/TGL-H handles the split. Based on: - Intel PCH-S EDS Vol2 (#621483) - Alderlake-S FSP - slimbootloader sources - Linux alderlake-pinctrl driver Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/acpi/gpio.asl M src/soc/intel/alderlake/fsp_params.c A src/soc/intel/alderlake/gpio_pch_s.c M src/soc/intel/alderlake/include/soc/gpio.h A src/soc/intel/alderlake/include/soc/gpio_defs_pch_s.h A src/soc/intel/alderlake/include/soc/gpio_soc_defs_pch_s.h M src/soc/intel/alderlake/include/soc/pmc.h M src/soc/intel/alderlake/romstage/fsp_params.c 9 files changed, 1,160 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/63467/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/63467 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fd1dc645c19c33bf14424703f966271e884ed3d Gerrit-Change-Number: 63467 Gerrit-PatchSet: 12 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/taniks: Configure Acoustic noise mitigation
by Felix Held (Code Review) 22 Apr '22

22 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63442 ) Change subject: mb/google/brya/var/taniks: Configure Acoustic noise mitigation ...................................................................... mb/google/brya/var/taniks: Configure Acoustic noise mitigation - Enable Acoustic noise mitigation - Set slow slew rate VCCIA and VCCGT to 8 - Set FastPkgCRampDisable VCCIA and VCCGT to 1 BUG=b:227165770 TEST=build FW and system power on. Signed-off-by: leo.chou <leo.chou(a)lcfc.corp-partner.google.com> Change-Id: I262ef14032e0e412c63403dbb8c8fbc6a8b03dd5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63442 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/taniks/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index 7b23d6e..6a10884 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -36,6 +36,12 @@ end end chip soc/intel/alderlake + # Acoustic settings + register "acoustic_noise_mitigation" = "1" + register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1" register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, -- To view, visit https://review.coreboot.org/c/coreboot/+/63442 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I262ef14032e0e412c63403dbb8c8fbc6a8b03dd5 Gerrit-Change-Number: 63442 Gerrit-PatchSet: 3 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/taniks: Add WiFi SAR table for taniks
by Felix Held (Code Review) 22 Apr '22

22 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63684 ) Change subject: mb/google/brya/var/taniks: Add WiFi SAR table for taniks ...................................................................... mb/google/brya/var/taniks: Add WiFi SAR table for taniks Add WiFi SAR table for taniks. BUG=b:226690925 TEST=build FW and checked SAR table can load by WiFi driver. Signed-off-by: leo.chou <leo.chou(a)lcfc.corp-partner.google.com> Change-Id: I7b52f71b1fe49c02beaa48410495b81661b58fac Reviewed-on: https://review.coreboot.org/c/coreboot/+/63684 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/taniks/Makefile.inc A src/mainboard/google/brya/variants/taniks/variant.c 3 files changed, 11 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 66b2120..216803f 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -159,6 +159,7 @@ select DRIVERS_GENESYSLOGIC_GL9750 select DRIVERS_GENESYSLOGIC_GL9763E select DRIVERS_GENESYSLOGIC_GL9763E_L1_MAX + select CHROMEOS_WIFI_SAR if CHROMEOS config BOARD_GOOGLE_VELL bool "-> Vell" diff --git a/src/mainboard/google/brya/variants/taniks/Makefile.inc b/src/mainboard/google/brya/variants/taniks/Makefile.inc index 6947beb..3ee0dc9 100644 --- a/src/mainboard/google/brya/variants/taniks/Makefile.inc +++ b/src/mainboard/google/brya/variants/taniks/Makefile.inc @@ -5,3 +5,5 @@ ramstage-y += gpio.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c + +ramstage-$(CONFIG_FW_CONFIG) += variant.c diff --git a/src/mainboard/google/brya/variants/taniks/variant.c b/src/mainboard/google/brya/variants/taniks/variant.c new file mode 100644 index 0000000..6a79780 --- /dev/null +++ b/src/mainboard/google/brya/variants/taniks/variant.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <sar.h> + +const char *get_wifi_sar_cbfs_filename(void) +{ + return "wifi_sar_0.hex"; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/63684 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b52f71b1fe49c02beaa48410495b81661b58fac Gerrit-Change-Number: 63684 Gerrit-PatchSet: 3 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/craask: Generate SPD ID for supported memory part
by Tyler Wang (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Nick Vaccaro. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63738 ) Change subject: mb/google/brya/var/craask: Generate SPD ID for supported memory part ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/63738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I183b74e66786c378cc227ee1e53ea422986b672a Gerrit-Change-Number: 63738 Gerrit-PatchSet: 3 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cathy Chen <cathy_chen(a)quanta.corp-partner.google.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 10:56:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/noncar: Move amdfwtool args setting to a common place
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63784 ) Change subject: soc/amd/noncar: Move amdfwtool args setting to a common place ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/common/block/cpu/noncar/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63784/comment/2ce49236_3780270d PS1, Line 188: info reason is that Sabrina is not in 3rdparty yet it seems. -- To view, visit https://review.coreboot.org/c/coreboot/+/63784 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic69e6e987d6db76cd782dc6f053a6a480dbb6237 Gerrit-Change-Number: 63784 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 22 Apr 2022 10:53:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/ehl: Remove PSE init 'magic code'
by Werner Zeh (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Praveen HP, Mario Scheithauer, Lean Sheng Tan. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63775 ) Change subject: soc/intel/ehl: Remove PSE init 'magic code' ...................................................................... Patch Set 1: Code-Review-1 (1 comment) Patchset: PS1: I wouldn't be too fast here. There are chances that the blob released by Intel does rely on this settings and that the released code simply does not. This would break the blob use-case then. I would wait a bit until we have gathered more experience with the open source code for the PSE. -- To view, visit https://review.coreboot.org/c/coreboot/+/63775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5cfacac62cae0a234e4c4927454311454ab01bdd Gerrit-Change-Number: 63775 Gerrit-PatchSet: 1 Gerrit-Owner: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Praveen HP <praveen.hodagatta.pranesh(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Praveen HP <praveen.hodagatta.pranesh(a)intel.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 10:52:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2022