coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: cpu/intel/*: Set SMM SMRR code access check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Arthur Heymans. Hello Paul Menzel, Tim Wawrzynczak, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63788 to look at the new patch set (#4). Change subject: cpu/intel/*: Set SMM SMRR code access check bit ...................................................................... cpu/intel/*: Set SMM SMRR code access check bit This makes sure that only code in TSEG gets executed. See section 34.17.1 "SMM Handler Code Access Control" in the 'Intel 64 and IA-32 Architectures Software Developer’s Manual' Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/haswell/finalize.c M src/include/cpu/intel/smm_reloc.h M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/denverton_ns/smihandler.c 4 files changed, 45 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/63788/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/intel/haswell/smm: Set code check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Arthur Heymans. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 ) Change subject: cpu/intel/haswell/smm: Set code check bit ...................................................................... Patch Set 3: Code-Review-1 (1 comment) Patchset: PS3: Put it in common code and do it for all platforms needing it. -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 22 Apr 2022 13:34:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63691 ) Change subject: soc/intel/alderlake: Implement PMC feature lock ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63691/comment/9dcd9fa1_fd0fdadc PS4, Line 10: read access to PMC XRAM. > > > Why should that be locked? Should it be build-time configurable? > > > > it's firmware security guideline for alderlake > > Alder Lake FAS Security Chapter 12 > > OS/payload shouldn't have access to PMC XRAM registers @Paul, any further thoughts ? -- To view, visit https://review.coreboot.org/c/coreboot/+/63691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c Gerrit-Change-Number: 63691 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 13:34:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/haswell/smm: Set code check bit
by Lean Sheng Tan (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Arthur Heymans. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 ) Change subject: cpu/intel/haswell/smm: Set code check bit ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 22 Apr 2022 13:34:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/haswell/smm: Set code check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Lean Sheng Tan. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 ) Change subject: cpu/intel/haswell/smm: Set code check bit ...................................................................... Patch Set 2: (1 comment) File src/cpu/intel/haswell/haswell.h: https://review.coreboot.org/c/coreboot/+/63788/comment/7abef193_53ebb4fc PS1, Line 63: defien > spelling Done Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 13:32:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/haswell/smm: Set code check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Arthur Heymans. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63788 to look at the new patch set (#3). Change subject: cpu/intel/haswell/smm: Set code check bit ...................................................................... cpu/intel/haswell/smm: Set code check bit This makes sure that only code in TSEG gets executed. See section 34.17.1 "SMM Handler Code Access Control" in the 'Intel 64 and IA-32 Architectures Software Developer’s Manual' Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/haswell/finalize.c M src/cpu/intel/haswell/haswell.h 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/63788/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Refactor `pmc_lockdown_cfg` function
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63737 ) Change subject: soc/intel/alderlake: Refactor `pmc_lockdown_cfg` function ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63737/comment/92501917_bb5dc68d PS2, Line 18: pmc_mmio_regs() > nit: you could store the address in a local variable, like the individual functions did (but this time there's just one variable). WDYT? valid point, taken care. Thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/63737 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic96da4638aa689b5fa47a3356986ca5a0343fe36 Gerrit-Change-Number: 63737 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 13:32:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/haswell/smm: Set code check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Arthur Heymans. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63788 to look at the new patch set (#2). Change subject: cpu/intel/haswell/smm: Set code check bit ...................................................................... cpu/intel/haswell/smm: Set code check bit This makes sure that only code in TSEG gets executed. See section 34.17.1 "SMM Handler Code Access Control" in the 'Intel 64 and IA-32 Architectures Software Developer’s Manual' Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/haswell/finalize.c M src/cpu/intel/haswell/haswell.h 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/63788/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Werner Zeh. Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Eric Lai, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63691 to look at the new patch set (#6). Change subject: soc/intel/alderlake: Implement PMC feature lock ...................................................................... soc/intel/alderlake: Implement PMC feature lock This patch locks PMC features like: debug mode configuration and host read access to PMC XRAM. BUG=b:211954778 TEST=Able to build and boot google/redrix to OS. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c --- M src/soc/intel/alderlake/include/soc/pmc.h M src/soc/intel/alderlake/lockdown.c 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/63691/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c Gerrit-Change-Number: 63691 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC soft strap interface lock
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Arthur Heymans, Lean Sheng Tan, Werner Zeh. Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Arthur Heymans, Eric Lai, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63690 to look at the new patch set (#6). Change subject: soc/intel/alderlake: Implement PMC soft strap interface lock ...................................................................... soc/intel/alderlake: Implement PMC soft strap interface lock This patch performs locking of the PMC soft strap message interface. BUG=b:211954778 TEST=Able to build and boot google/redrix to OS. Verified Bit 0 of PMC MMIO register 0x104c is set as below. > localhost ~ # iotools mmio_read32 0xfe00104c 0x00000001 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I1ae972a203affa54c03de71f0f702356334cbf7d --- M src/soc/intel/alderlake/lockdown.c 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63690/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ae972a203affa54c03de71f0f702356334cbf7d Gerrit-Change-Number: 63690 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2022