coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
by Casper Chang (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Paul Menzel. Casper Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62703 ) Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62703/comment/7e6c2fb7_28a01e75 PS6, Line 9: Program the BayHub eMMC enable pin in ramstage to prevent baseboard : override the setting leads RTD3 not able to control when enter and : exit suspend state. > suggestion: […] Done Thanks for the suggestion. -- To view, visit https://review.coreboot.org/c/coreboot/+/62703 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d Gerrit-Change-Number: 62703 Gerrit-PatchSet: 7 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 11 Mar 2022 05:25:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
by Casper Chang (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Paul Menzel, Casper Chang. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62703 to look at the new patch set (#7). Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage ...................................................................... mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage Currently the BayHub eMMC enable pin is using the default configuration from the baseboard, which leads to RTD3 not being able to control the GPIO when exiting and entering suspend. To fix this, program the GPIO in the ramstage GPIO table. BUG=b:222436260 TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage scope enable pin while performing suspend stress and enable pin works as expected. test suspend stress 1000 cycles passed on primus. Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d --- M src/mainboard/google/brya/variants/primus/gpio.c M src/mainboard/google/brya/variants/primus4es/gpio.c 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/62703/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/62703 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d Gerrit-Change-Number: 62703 Gerrit-PatchSet: 7 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
by Tim Wawrzynczak (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Paul Menzel, Casper Chang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62703 ) Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage ...................................................................... Patch Set 6: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/62703/comment/47d5ccb2_4cbee47d PS6, Line 9: Program the BayHub eMMC enable pin in ramstage to prevent baseboard : override the setting leads RTD3 not able to control when enter and : exit suspend state. suggestion: ``` Currently the BayHub eMMC enable pin is using the default configuration from the baseboard, which leads to RTD3 not being able to control the GPIO when exiting and entering suspend. To fix this, program the GPIO in the ramstage GPIO table. ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/62703 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d Gerrit-Change-Number: 62703 Gerrit-PatchSet: 6 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 11 Mar 2022 04:57:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS
by Robert Chen (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Rob Barnes, Yu-hsuan Hsu. Hello build bot (Jenkins), Raul Rangel, Tim Wawrzynczak, Rob Barnes, Yu-hsuan Hsu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61782 to look at the new patch set (#5). Change subject: mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS ...................................................................... mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name and machine_dev depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 36 - 37 (SSFC bits 4 - 5) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BUG=b:215292608 BRANCH=firmware-zork-13434.B TEST=ALC5682I-VS audio codec can work Change-Id: I0b0231a3ee9c0dad289ffd50607b3ae6201f56a0 Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/zork/variants/gumboz/overridetree.cb 1 file changed, 87 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/61782/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/61782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b0231a3ee9c0dad289ffd50607b3ae6201f56a0 Gerrit-Change-Number: 61782 Gerrit-PatchSet: 5 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/zork/var/dirinboz: Add fw_config probe for ALC5682-VD & VS
by Robert Chen (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Rob Barnes, Yu-hsuan Hsu. Hello build bot (Jenkins), Raul Rangel, Tim Wawrzynczak, Rob Barnes, Yu-hsuan Hsu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61781 to look at the new patch set (#8). Change subject: mb/google/zork/var/dirinboz: Add fw_config probe for ALC5682-VD & VS ...................................................................... mb/google/zork/var/dirinboz: Add fw_config probe for ALC5682-VD & VS ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name and machine_dev depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 36 - 37 (SSFC bits 4 - 5) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BUG=b:211672259 BRANCH=firmware-zork-13434.B TEST=ALC5682I-VS audio codec can work Change-Id: Icd4321ec0a284e35511dd4b860a16506f54cf663 Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/zork/variants/dirinboz/overridetree.cb 1 file changed, 87 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/61781/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/61781 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd4321ec0a284e35511dd4b860a16506f54cf663 Gerrit-Change-Number: 61781 Gerrit-PatchSet: 8 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Yu-hsuan Hsu <yuhsuan(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/trogdor: Add variant Gelarshie
by Mars Chen (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Douglas Anderson, Paul Menzel, Bob Moragues, Julius Werner. Mars Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62642 ) Change subject: mb/google/trogdor: Add variant Gelarshie ...................................................................... Patch Set 5: (2 comments) File src/mainboard/google/trogdor/Kconfig: https://review.coreboot.org/c/coreboot/+/62642/comment/de1623ae_ffcebadf PS5, Line 77: ault "Gelarshie" i > ... […] Resolved File src/mainboard/google/trogdor/Kconfig.name: https://review.coreboot.org/c/coreboot/+/62642/comment/726800dc_801fc1ff PS5, Line 17: config BOARD_GOOGLE_GELARSHIE : bool "-> Gelarshie" : select BOARD_GOOGLE_TROGDOR_COMMON : : > Oh, actually. Here G comes before H too. Resolved -- To view, visit https://review.coreboot.org/c/coreboot/+/62642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie83df3c753d0863841430fe62805250ef8efeae9 Gerrit-Change-Number: 62642 Gerrit-PatchSet: 5 Gerrit-Owner: Mars Chen <chenxiangrui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Douglas Anderson <dianders(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 11 Mar 2022 03:54:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Douglas Anderson <dianders(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add companion device name to WWAN PCIe generic device
by Tim Wawrzynczak (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Bora Guvendik, Cliff Huang, Selma Bensaid. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62330 ) Change subject: mb/google/brya: Add companion device name to WWAN PCIe generic device ...................................................................... Patch Set 10: (1 comment) File src/mainboard/google/brya/variants/brya0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/62330/comment/1b4ecdda_9e54f914 PS10, Line 213: rp6_wwan > do you mean that PCI generic is no need at all in the device tree since wwan provides _DSD? we can r […] We are supposed to have the DmaProperty in 3 places total: 1) CNVi device - https://review.coreboot.org/c/coreboot/+/61385 2) WWAN device (PXSX) - https://review.coreboot.org/c/coreboot/+/62436/4 3) PCIe RP of the WWAN device (\_SB.PCI0.RP06) - what this is one is supposed to be doing actually is the companion device even necessary? did I just get myself all tangled up in ACPI devices? -- To view, visit https://review.coreboot.org/c/coreboot/+/62330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia343c7545cf30bdbcd1de19e5eb84049dbb2977f Gerrit-Change-Number: 62330 Gerrit-PatchSet: 10 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Comment-Date: Fri, 11 Mar 2022 03:40:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pcie/generic: Add support to generate code under companion de...
by Tim Wawrzynczak (Code Review) 11 Mar '22

11 Mar '22

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62301 ) Change subject: drivers/pcie/generic: Add support to generate code under companion device instead ...................................................................... Patch Set 9: (1 comment) Patchset: PS5: > can't say that i like this too much, but now i at least understand the problem this solves and don't […] I'm all ears, but that's what we have at the moment 😐 -- To view, visit https://review.coreboot.org/c/coreboot/+/62301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80634bbfc2927f26f2a55a9c244eca517c437079 Gerrit-Change-Number: 62301 Gerrit-PatchSet: 9 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 11 Mar 2022 03:33:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
by Robert Chen (Code Review) 11 Mar '22

11 Mar '22

Attention is currently required from: Tim Wawrzynczak, Shon Wang. Hello build bot (Jenkins), Tim Wawrzynczak, Shon Wang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61847 to look at the new patch set (#22). Change subject: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell ...................................................................... mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell Add FM350GL 5G WWAN support using drivers/wwan/fm and addtional PM features from RTD3. BUG=b:220084872 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot Change-Id: If6d3f965b8f6b6753446f55a8bd47d3b0c1ae7be Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/vell/gpio.c M src/mainboard/google/brya/variants/vell/include/variant/gpio.h M src/mainboard/google/brya/variants/vell/overridetree.cb 4 files changed, 33 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/61847/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/61847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6d3f965b8f6b6753446f55a8bd47d3b0c1ae7be Gerrit-Change-Number: 61847 Gerrit-PatchSet: 22 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: Fix null pointer dereference error when PCIe link down
by Jianjun Wang (Code Review) 11 Mar '22

11 Mar '22

Jianjun Wang has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62673 ) Change subject: soc/mediatek: Fix null pointer dereference error when PCIe link down ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/62673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ba1a47b58fc8fe6dd5cd22682cbc8de22ed2387 Gerrit-Change-Number: 62673 Gerrit-PatchSet: 1 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: abandon

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coreboot-gerrit March 2022