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Change subject: hp/z220_cmt_workstation: Add variant of z220_sff_workstation
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62759/comment/e677061d_d43e8092
PS2, Line 11: The code in this commit is untested as I reworked his port into a variant.
> Felix: The code that works on CMT from my friend is not in the tree yet, there's no point committing […]
OK that makes more sense, however, the board is so similar, you realise you're making me do a lot more work for quite a trivial set of differences. There's only one setting common to both boards that needs tweaking, the sata_port_map, and a couple of GPIOs. It could be easily renamed in a followup commit. Anyway, I will make the requested changes.
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Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brask/variants/moli: update GPIO for moli
......................................................................
mb/google/brask/variants/moli: update GPIO for moli
Update the GPIO configuration of moli by the new GPIO table
1.Set A15 as the default value.
2.Set A14, A19 NC.
3.Set C3, C4 as the default value.
4.Set D9 as the default value.
5.Set E5, E13 as the default value.
6.Set R4, R5 as the default value.
7.Update E14.
BUG=b:220821454
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Ia54256244111a99cb130b74f78c37815099a021a
---
M src/mainboard/google/brya/variants/moli/gpio.c
1 file changed, 8 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/62802/5
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Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62802
to look at the new patch set (#4).
Change subject: mb/google/brask/variants/moli: update GPIO for moli
......................................................................
mb/google/brask/variants/moli: update GPIO for moli
Update the GPIO configuration of moli by the new GPIO table
1.Set A15 as the default value.
2.Set A14, A19 NC.
3.Set C3, C4 as the default value.
4.Set D9 as the default value.
5.Set E5, E13 as the default value.
6.Set R4, R5 as the default value.
7.Update E14.
BUG=b:220821454
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Ia54256244111a99cb130b74f78c37815099a021a
---
M src/mainboard/google/brya/variants/moli/gpio.c
1 file changed, 8 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/62802/4
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Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62801 )
Change subject: mb/google/dedede/var/beadrix: Enable LTE function by FW_CONFIG option
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Patch Set 1: Code-Review+1
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Change subject: hp/z220_cmt_workstation: Add variant of z220_sff_workstation
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62759/comment/c726feda_80095948
PS2, Line 11: The code in this commit is untested as I reworked his port into a variant.
> Felix: The code that works on CMT from my friend is not in the tree yet, there's no point committing […]
That's not what I meant. I requested that you turn the SFF port (the existing port) into a variant first, so that the variant structure exists later, and then you add your variant (CMT) to it. It's easier to see the differences this way. Also, more things need to be reworked. For example the name for the mainboard directory is not applicable anymore and needs to be renamed. This is too much for one commit, which only claims to add another variant.
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Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage
......................................................................
Patch Set 17:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62359/comment/1a006f38_06118461
PS9, Line 14: 100ms
> > I meant to say that the `timestamp_get()` function has a __weak definition, which might have to be […]
Can we use a SRAM to store the timestamp?
In 8195, we have lots of SRAM to use.
From this code, we have free space from 0x00104004 to 0x00107c00.
https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
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Change subject: hp/z220_cmt_workstation: Add variant of z220_sff_workstation
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62759/comment/8bef782e_70e8d42a
PS2, Line 11: The code in this commit is untested as I reworked his port into a variant.
> Please do a separate commit to turn it into a variant.
Felix: The code that works on CMT from my friend is not in the tree yet, there's no point committing an almost identical clone of the SFF board and then a new commit that removes the CMT port and converts it to a variant. Let's just test the new variant on a CMT and verify that the SFF is still identical (?)
Patchset:
PS2:
Thanks
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Change subject: soc/mediatek: Set soc_ops.set_resources as no-op
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Patch Set 1: Code-Review+1
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Change subject: mb/google: Remove unused cpu device
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Patch Set 1: Code-Review+1
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