coreboot-gerrit March 2022

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Change in coreboot[master]: hp/z220_series: Convert z220_sff_workstation into variant
by Felix Singer (Code Review) 15 Mar '22

15 Mar '22

Attention is currently required from: Damien Zammit, Edward O'Callaghan. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62808 ) Change subject: hp/z220_series: Convert z220_sff_workstation into variant ...................................................................... Patch Set 1: (2 comments) File src/mainboard/hp/z220_series/Kconfig: https://review.coreboot.org/c/coreboot/+/62808/comment/e81b4915_3cc021e1 PS1, Line 1: BOARD_HP_Z220_SERIES > Subjective and not strictly required. It's not strictly required, but the _COMMON suffix is an indication for the reader that it serves as base for other options. So this is important. File src/mainboard/hp/z220_series/Kconfig.name: https://review.coreboot.org/c/coreboot/+/62808/comment/ca820ec4_c07fcb9e PS1, Line 3: select BOARD_HP_Z220_SERIES > This only makes sense if there is a "base" board and variants on the base board. […] Thanks for pointing me to mb/hp/snb_ivb_laptops. I have just reworked it in CB:62816. My reasoning there also applies to this case. -- To view, visit https://review.coreboot.org/c/coreboot/+/62808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6aaac75216b2d7c8bb48801454ce616ace3b1422 Gerrit-Change-Number: 62808 Gerrit-PatchSet: 1 Gerrit-Owner: Damien Zammit Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Damien Zammit Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:54:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Damien Zammit Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/tutorial/part1.md: Add Fedora package `patch`
by Eloy (Code Review) 15 Mar '22

15 Mar '22

Attention is currently required from: Eloy. Hello Felix Singer, build bot (Jenkins), Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62765 to look at the new patch set (#3). Change subject: Documentation/tutorial/part1.md: Add Fedora package `patch` ...................................................................... Documentation/tutorial/part1.md: Add Fedora package `patch` It is necessary to build crossgcc. Change-Id: I32f6507b4d8346bf94aaccd3eef4f22697c33965 Signed-off-by: Eloy Degen <degeneloy(a)gmail.com> --- M Documentation/tutorial/part1.md 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/62765/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32f6507b4d8346bf94aaccd3eef4f22697c33965 Gerrit-Change-Number: 62765 Gerrit-PatchSet: 3 Gerrit-Owner: Eloy Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eloy Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP]src/*: Fix void pointer aritmetics
by build bot (Jenkins) (Code Review) 15 Mar '22

15 Mar '22

Attention is currently required from: Lance Zhao, Martin Roth, Tim Wawrzynczak, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62817 ) Change subject: [WIP]src/*: Fix void pointer aritmetics ...................................................................... Patch Set 1: (6 comments) File src/commonlib/bsd/cbfs_mcache.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/e81c14b3_2f6f9858 PS1, Line 129: uintptr_t current = (uintptr_t)mcache; code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/4060e0ae_d4af75b2 PS1, Line 129: uintptr_t current = (uintptr_t)mcache; please, no spaces at the start of a line File src/commonlib/bsd/cbfs_private.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/ac96cdd7_bdc23bde PS1, Line 177: const struct cbfs_file_attribute *attr = (const void *)((uintptr_t)mdata->raw + offset); line over 96 characters File src/commonlib/bsd/lz4_wrapper.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/321f4e28_4337fe18 PS1, Line 153: (uintptr_t)dst + dstn - (uintptr_t)out, endOnInputSize, line over 96 characters File src/lib/cbfs.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/5fd98a2d_324040d7 PS1, Line 569: void *compr_start = (void *)((uintptr_t)prog_start(pstage) + prog_size(pstage) - in_size); line over 96 characters File src/lib/rmodule.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143980): https://review.coreboot.org/c/coreboot/+/62817/comment/de1e7f5a_42fb4263 PS1, Line 267: if (rmodule_load((void *)((uintptr_t)rmod_loc + sizeof(struct rmodule_header)), &rmod_stage)) line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62817 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6dfb30c426867c3176a9426c2909702b40cc577 Gerrit-Change-Number: 62817 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:47:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/hp/snb_ivb_laptops: Move selects from Kconfig.name to Kconfig
by Felix Singer (Code Review) 15 Mar '22

15 Mar '22

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62816 ) Change subject: mb/hp/snb_ivb_laptops: Move selects from Kconfig.name to Kconfig ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I500f6422c1f8975de8b0bcc8b95cba2bcd4ebe27 Gerrit-Change-Number: 62816 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:44:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/hp/snb_ivb_laptops: Rename `BOARD_HP_SNB_IVB_LAPTOPS`
by Felix Singer (Code Review) 15 Mar '22

15 Mar '22

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62815 ) Change subject: mb/hp/snb_ivb_laptops: Rename `BOARD_HP_SNB_IVB_LAPTOPS` ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icadeb8a33ae0787d2cd5da460065a2ed15256d64 Gerrit-Change-Number: 62815 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:44:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/hp/snb_ivb_laptops/Kconfig{,.name}: Reorder selects alphabetically
by Felix Singer (Code Review) 15 Mar '22

15 Mar '22

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62814 ) Change subject: mb/hp/snb_ivb_laptops/Kconfig{,.name}: Reorder selects alphabetically ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/62814 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54367c7c663ad288ccdcbd4e7289546489a68f30 Gerrit-Change-Number: 62814 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:44:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]src/*: Fix void pointer aritmetics
by Arthur Heymans (Code Review) 15 Mar '22

15 Mar '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62817 ) Change subject: [WIP]src/*: Fix void pointer aritmetics ...................................................................... [WIP]src/*: Fix void pointer aritmetics Fix undefined C code and add a CFLAG a warning about it. Change-Id: Ic6dfb30c426867c3176a9426c2909702b40cc577 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/acpi/acpi.c M src/acpi/device.c M src/arch/x86/ioapic.c M src/commonlib/bsd/cbfs_mcache.c M src/commonlib/bsd/cbfs_private.c M src/commonlib/bsd/elog.c M src/commonlib/bsd/lz4_wrapper.c M src/cpu/x86/lapic/lapic_cpu_init.c M src/cpu/x86/pae/pgtbl.c M src/device/mmio.c M src/device/pci_rom.c M src/drivers/mipi/panel.c M src/drivers/spi/bitbang.c M src/lib/cbfs.c M src/lib/hexdump.c M src/lib/lzma.c M src/lib/malloc.c M src/lib/rmodule.c M src/lib/stack.c 20 files changed, 80 insertions(+), 58 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/62817/1 diff --git a/Makefile.inc b/Makefile.inc index ec2d097..77ec1d0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -435,6 +435,7 @@ CFLAGS_common += -Wdangling-else CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -fstrict-aliasing -ffunction-sections -fdata-sections -fno-pie +CFLAGS_common += -Wpointer-arith ifeq ($(CONFIG_COMPILER_GCC),y) # Don't add these GCC specific flags when running scan-build ifeq ($(CCC_ANALYZER_OUTPUT_FORMAT),) diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 78d5f07..60fd0e3 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -26,6 +26,7 @@ #include <device/mmio.h> #include <device/pci.h> #include <pc80/mc146818rtc.h> +#include <stdint.h> #include <string.h> #include <types.h> #include <version.h> @@ -1621,9 +1622,9 @@ if (fw) { rsdp = NULL; /* Find RSDP. */ - for (void *p = (void *)current; p < (void *)fw; p += 16) { + for (uintptr_t p = current; p < (uintptr_t)fw; p += 16) { if (valid_rsdp((acpi_rsdp_t *)p)) { - rsdp = p; + rsdp = (void *)p; break; } } diff --git a/src/acpi/device.c b/src/acpi/device.c index 1df179b..d4bd2c3 100644 --- a/src/acpi/device.c +++ b/src/acpi/device.c @@ -42,7 +42,7 @@ */ static void acpi_device_fill_len(void *ptr) { - acpi_device_fill_from_len(ptr, ptr + sizeof(uint16_t)); + acpi_device_fill_from_len(ptr, (char *)ptr + sizeof(uint16_t)); } /* Locate and return the ACPI name for this device */ diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c index d65637c..518a516 100644 --- a/src/arch/x86/ioapic.c +++ b/src/arch/x86/ioapic.c @@ -5,17 +5,18 @@ #include <arch/ioapic.h> #include <console/console.h> #include <cpu/x86/lapic.h> +#include <stdint.h> u32 io_apic_read(void *ioapic_base, u32 reg) { write32(ioapic_base, reg); - return read32(ioapic_base + 0x10); + return read32p((uintptr_t)ioapic_base + 0x10); } void io_apic_write(void *ioapic_base, u32 reg, u32 value) { write32(ioapic_base, reg); - write32(ioapic_base + 0x10, value); + write32p((uintptr_t)ioapic_base + 0x10, value); } static void write_vector(void *ioapic_base, u8 vector, u32 high, u32 low) diff --git a/src/commonlib/bsd/cbfs_mcache.c b/src/commonlib/bsd/cbfs_mcache.c index 29ba110..ab1ab40 100644 --- a/src/commonlib/bsd/cbfs_mcache.c +++ b/src/commonlib/bsd/cbfs_mcache.c @@ -2,6 +2,7 @@ #include <assert.h> #include <commonlib/bsd/cbfs_private.h> +#include <stdint.h> /* * A CBFS metadata cache is an in memory data structure storing CBFS file headers (= metadata). @@ -35,8 +36,8 @@ }; struct cbfs_mcache_build_args { - void *mcache; - void *end; + uintptr_t mcache; + uintptr_t end; int count; }; @@ -44,13 +45,13 @@ size_t already_read, void *arg) { struct cbfs_mcache_build_args *args = arg; - union mcache_entry *entry = args->mcache; + union mcache_entry *entry = (void *)args->mcache; const uint32_t data_offset = be32toh(mdata->h.offset); - if (args->end - args->mcache < data_offset) + if ((uintptr_t)args->end - (uintptr_t)args->mcache < data_offset) return CB_CBFS_CACHE_FULL; - if (cbfs_copy_fill_metadata(args->mcache, mdata, already_read, dev, offset)) + if (cbfs_copy_fill_metadata((void *)args->mcache, mdata, already_read, dev, offset)) return CB_CBFS_IO; entry->magic = MCACHE_MAGIC_FILE; @@ -66,15 +67,15 @@ struct vb2_hash *metadata_hash) { struct cbfs_mcache_build_args args = { - .mcache = mcache, - .end = mcache + ALIGN_DOWN(size, CBFS_MCACHE_ALIGNMENT) + .mcache = (uintptr_t)mcache, + .end = (uintptr_t)mcache + ALIGN_DOWN(size, CBFS_MCACHE_ALIGNMENT) - sizeof(uint32_t), /* leave space for terminating magic */ .count = 0, }; assert(size > sizeof(uint32_t) && IS_ALIGNED((uintptr_t)mcache, CBFS_MCACHE_ALIGNMENT)); enum cb_err ret = cbfs_walk(dev, build_walker, &args, metadata_hash, 0); - union mcache_entry *entry = args.mcache; + union mcache_entry *entry = (void *)args.mcache; if (ret == CB_CBFS_NOT_FOUND) { ret = CB_SUCCESS; entry->magic = MCACHE_MAGIC_END; @@ -84,7 +85,7 @@ } LOG("mcache @%p built for %d files, used %#zx of %#zx bytes\n", mcache, - args.count, args.mcache + sizeof(entry->magic) - mcache, size); + args.count, args.mcache + sizeof(entry->magic) - (uintptr_t)mcache, size); return ret; } @@ -92,11 +93,11 @@ union cbfs_mdata *mdata_out, size_t *data_offset_out) { const size_t namesize = strlen(name) + 1; /* Count trailing \0 so we can memcmp() it. */ - const void *end = mcache + mcache_size; - const void *current = mcache; + const uintptr_t end = (uintptr_t)mcache + mcache_size; + uintptr_t current = (uintptr_t)mcache; while (current + sizeof(uint32_t) <= end) { - const union mcache_entry *entry = current; + const union mcache_entry *entry = (void *)current; if (entry->magic == MCACHE_MAGIC_END) return CB_CBFS_NOT_FOUND; @@ -108,7 +109,7 @@ const uint32_t data_length = be32toh(entry->file.h.len); if (namesize <= data_offset - offsetof(union cbfs_mdata, h.filename) && memcmp(name, entry->file.h.filename, namesize) == 0) { - LOG("Found '%s' @%#x size %#x in mcache @%p\n", + LOG("Found '%s' @%#x size %#x in mcache @%lx\n", name, entry->offset, data_length, current); *data_offset_out = entry->offset + data_offset; memcpy(mdata_out, &entry->file, data_offset); @@ -124,11 +125,11 @@ size_t cbfs_mcache_real_size(const void *mcache, size_t mcache_size) { - const void *end = mcache + mcache_size; - const void *current = mcache; + const uintptr_t end = (uintptr_t)mcache + mcache_size; + uintptr_t current = (uintptr_t)mcache; while (current + sizeof(uint32_t) <= end) { - const union mcache_entry *entry = current; + const union mcache_entry *entry = (void *)current; if (entry->magic == MCACHE_MAGIC_FULL || entry->magic == MCACHE_MAGIC_END) { current += sizeof(entry->magic); @@ -139,5 +140,5 @@ current += ALIGN_UP(be32toh(entry->file.h.offset), CBFS_MCACHE_ALIGNMENT); } - return current - mcache; + return current - (uintptr_t)mcache; } diff --git a/src/commonlib/bsd/cbfs_private.c b/src/commonlib/bsd/cbfs_private.c index e77c299..5ca6f29 100644 --- a/src/commonlib/bsd/cbfs_private.c +++ b/src/commonlib/bsd/cbfs_private.c @@ -2,6 +2,7 @@ #include <commonlib/bsd/cbfs_private.h> #include <assert.h> +#include <stdint.h> static enum cb_err read_next_header(cbfs_dev_t dev, size_t *offset, struct cbfs_file *buffer, const size_t devsize) @@ -173,7 +174,7 @@ return NULL; while (offset + sizeof(struct cbfs_file_attribute) <= end) { - const struct cbfs_file_attribute *attr = (const void *)mdata->raw + offset; + const struct cbfs_file_attribute *attr = (const void *)((uintptr_t)mdata->raw + offset); const uint32_t tag = be32toh(attr->tag); const uint32_t len = be32toh(attr->len); diff --git a/src/commonlib/bsd/elog.c b/src/commonlib/bsd/elog.c index 8151d70..08465c0 100644 --- a/src/commonlib/bsd/elog.c +++ b/src/commonlib/bsd/elog.c @@ -3,6 +3,7 @@ #include <commonlib/bsd/bcd.h> #include <commonlib/bsd/elog.h> #include <stddef.h> +#include <stdint.h> /* * verify and validate if header is a valid coreboot Event Log header. @@ -35,7 +36,7 @@ return NULL; /* Point to next event */ - return (const struct event_header *)((const void *)(event) + event->length); + return (const struct event_header *)((uintptr_t)event + event->length); } /* return the data associated to the event_header. */ diff --git a/src/commonlib/bsd/lz4_wrapper.c b/src/commonlib/bsd/lz4_wrapper.c index 73a3571..6c736c8 100644 --- a/src/commonlib/bsd/lz4_wrapper.c +++ b/src/commonlib/bsd/lz4_wrapper.c @@ -95,13 +95,14 @@ size_t ulz4fn(const void *src, size_t srcn, void *dst, size_t dstn) { - const void *in = src; + const uintptr_t src_ptr = (uintptr_t)src; + uintptr_t in = (uintptr_t)src; void *out = dst; size_t out_size = 0; int has_block_checksum; { /* With in-place decompression the header may become invalid later. */ - const struct lz4_frame_header *h = in; + const struct lz4_frame_header *h = (void *)in; if (srcn < sizeof(*h) + sizeof(uint64_t) + sizeof(uint8_t)) return 0; /* input overrun */ @@ -123,7 +124,7 @@ } while (1) { - if ((size_t)(in - src) + sizeof(struct lz4_block_header) > srcn) + if ((size_t)(in - src_ptr) + sizeof(struct lz4_block_header) > srcn) break; /* input overrun */ struct lz4_block_header b = { @@ -131,29 +132,29 @@ }; in += sizeof(struct lz4_block_header); - if ((size_t)(in - src) + (b.raw & BH_SIZE) > srcn) + if ((size_t)(in - src_ptr) + (b.raw & BH_SIZE) > srcn) break; /* input overrun */ if (!(b.raw & BH_SIZE)) { - out_size = out - dst; + out_size = (uintptr_t)out - (uintptr_t)dst; break; /* decompression successful */ } if (b.raw & NOT_COMPRESSED) { size_t size = MIN((uintptr_t)(b.raw & BH_SIZE), (uintptr_t)dst + dstn - (uintptr_t)out); - memcpy(out, in, size); + memcpy(out, (void *)in, size); if (size < (b.raw & BH_SIZE)) break; /* output overrun */ - out += size; + out = (void *)((uintptr_t)out + size); } else { /* constant folding essential, do not touch params! */ - int ret = LZ4_decompress_generic(in, out, (b.raw & BH_SIZE), - dst + dstn - out, endOnInputSize, + int ret = LZ4_decompress_generic((void *)in, out, (b.raw & BH_SIZE), + (uintptr_t)dst + dstn - (uintptr_t)out, endOnInputSize, full, 0, noDict, out, NULL, 0); if (ret < 0) break; /* decompression error */ - out += ret; + out = (void *)((uintptr_t)out + ret); } in += (b.raw & BH_SIZE); diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 2cb8459..c8b8a45 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -7,6 +7,7 @@ #include <acpi/acpi.h> #include <delay.h> #include <lib.h> +#include <stdint.h> #include <string.h> #include <symbols.h> #include <console/console.h> @@ -369,7 +370,7 @@ printk(BIOS_DEBUG, "All AP CPUs stopped (%ld loops)\n", loopcount); checkstack(_estack, 0); for (i = 1; i < CONFIG_MAX_CPUS && i <= last_cpu_index; i++) - checkstack((void *)stacks[i] + CONFIG_STACK_SIZE, i); + checkstack((void *)((uintptr_t)stacks[i] + CONFIG_STACK_SIZE), i); } void initialize_cpus(struct bus *cpu_bus) diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index c8783d6..59c1da3 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -7,6 +7,7 @@ #include <cpu/x86/cr.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> +#include <stdint.h> #include <string.h> #include <symbols.h> #include <assert.h> @@ -201,7 +202,7 @@ printk(BIOS_SPEW, "%s: Clearing %llx[%lx] - %zx\n", __func__, dest + offset, (uintptr_t)vmem_addr + offset, len); - memset(vmem_addr + offset, pat, len); + memset((void *)((uintptr_t)vmem_addr + offset), pat, len); dest += s2MiB; length -= len; diff --git a/src/device/mmio.c b/src/device/mmio.c index de8c8d3..5487638 100644 --- a/src/device/mmio.c +++ b/src/device/mmio.c @@ -2,6 +2,7 @@ #include <assert.h> #include <device/mmio.h> +#include <stdint.h> /* Helper functions for various MMIO access patterns. */ @@ -9,13 +10,14 @@ int fifo_stride, int fifo_width) { u8 *p = buffer; + u8 *f = fifo; int i, j; assert(fifo_width > 0 && fifo_width <= sizeof(u32) && fifo_stride % sizeof(u32) == 0); - for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { - u32 val = read32(fifo); + for (i = 0; i < size; i += fifo_width, f += fifo_stride) { + u32 val = read32(f); for (j = 0; j < MIN(size - i, fifo_width); j++) *p++ = (u8)(val >> (j * 8)); } @@ -31,7 +33,7 @@ fifo_stride % sizeof(u32) == 0 && prefsz <= fifo_width); uint32_t val = prefix; - for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { + for (i = 0; i < size; i += fifo_width, fifo = (void *)((uintptr_t)fifo + fifo_stride)) { for (; j < MIN(size - i, fifo_width); j++) val |= *p++ << (j * 8); write32(fifo, val); diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index b8dafd1..0e4e259 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -6,6 +6,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <stdint.h> #include <stdio.h> #include <string.h> #include <cbfs.h> @@ -121,7 +122,7 @@ return NULL; } - rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data)); + rom_data = (void *)(((uintptr_t)rom_header) + le32_to_cpu(rom_header->data)); printk(BIOS_SPEW, "PCI ROM image, vendor ID %04x, device ID %04x,\n", rom_data->vendor, rom_data->device); @@ -159,10 +160,10 @@ do { /* Get next image. */ - rom_header = (struct rom_header *)((void *) rom_header + rom_header = (struct rom_header *)((uintptr_t) rom_header + image_size); - rom_data = (struct pci_data *)((void *) rom_header + rom_data = (struct pci_data *)((uintptr_t) rom_header + le32_to_cpu(rom_header->data)); image_size = le32_to_cpu(rom_data->ilen) * 512; @@ -197,8 +198,8 @@ rom_header, pci_ram_image_start, rom_size); memcpy(pci_ram_image_start, rom_header, rom_size); - pci_ram_image_start += rom_size; - return (struct rom_header *) (pci_ram_image_start-rom_size); + pci_ram_image_start = (void *)((uintptr_t)pci_ram_image_start + rom_size); + return (struct rom_header *) ((uintptr_t)pci_ram_image_start-rom_size); } /* ACPI */ diff --git a/src/drivers/mipi/panel.c b/src/drivers/mipi/panel.c index 9646eca..6b16409 100644 --- a/src/drivers/mipi/panel.c +++ b/src/drivers/mipi/panel.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <delay.h> #include <mipi/panel.h> +#include <stdint.h> enum cb_err mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func) { @@ -20,7 +21,7 @@ * For some commands like DELAY, the init->len should not be * counted for buf. */ - buf += sizeof(*init); + buf = (void *)((uintptr_t)buf + sizeof(*init)); u32 cmd = init->cmd, len = init->len; @@ -71,7 +72,7 @@ enum cb_err ret = cmd_func(type, init->data, len); if (ret != CB_SUCCESS) return ret; - buf += len; + buf = (void *)((uintptr_t)buf + len); } return CB_SUCCESS; diff --git a/src/drivers/spi/bitbang.c b/src/drivers/spi/bitbang.c index 168ec64..1c5b1b5 100644 --- a/src/drivers/spi/bitbang.c +++ b/src/drivers/spi/bitbang.c @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "device/mmio.h" #include <console/console.h> #include <delay.h> #include <spi_bitbang.h> +#include <stdint.h> /* Set to 1 to dump all SPI transfers to the UART. */ #define TRACE 0 @@ -38,11 +40,13 @@ printk(BIOS_SPEW, ">"); } + uintptr_t dout_ptr = (uintptr_t)dout; + uintptr_t din_ptr = (uintptr_t)din; while (bytes_out || bytes_in) { int i; uint8_t in_byte = 0, out_byte = 0; if (bytes_out) { - out_byte = *(const uint8_t *)dout++; + out_byte = read8p(dout_ptr++); bytes_out--; if (TRACE) printk(BIOS_SPEW, "%02x", out_byte); @@ -58,7 +62,7 @@ ops->set_clk(ops, 0); } if (bytes_in) { - *(uint8_t *)din++ = in_byte; + write8p(din_ptr++, in_byte); bytes_in--; if (TRACE) printk(BIOS_SPEW, "%02x", in_byte); diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index c8ca14c..e30d906 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -13,6 +13,7 @@ #include <metadata_hash.h> #include <security/tpm/tspi/crtm.h> #include <security/vboot/vboot_common.h> +#include <stdint.h> #include <stdlib.h> #include <string.h> #include <symbols.h> @@ -546,8 +547,8 @@ return CB_ERR; prog_set_area(pstage, (void *)(uintptr_t)be64toh(sattr->loadaddr), be32toh(sattr->memlen)); - prog_set_entry(pstage, prog_start(pstage) + - be32toh(sattr->entry_offset), NULL); + prog_set_entry(pstage, (void *)((uintptr_t)prog_start(pstage) + + be32toh(sattr->entry_offset)), NULL); /* Hacky way to not load programs over read only media. The stages * that would hit this path initialize themselves. */ @@ -565,7 +566,7 @@ compressed data to the end of the buffer and point &rdev to that memory location. */ if (cbfs_lz4_enabled() && compression == CBFS_COMPRESS_LZ4) { size_t in_size = region_device_sz(&rdev); - void *compr_start = prog_start(pstage) + prog_size(pstage) - in_size; + void *compr_start = (void *)((uintptr_t)prog_start(pstage) + prog_size(pstage) - in_size); if (rdev_readat(&rdev, compr_start, 0, in_size) != in_size) return CB_ERR; rdev_chain_mem(&rdev, compr_start, in_size); @@ -577,7 +578,7 @@ return CB_ERR; /* Clear area not covered by file. */ - memset(prog_start(pstage) + fsize, 0, prog_size(pstage) - fsize); + memset((void *)((uintptr_t)prog_start(pstage) + fsize), 0, prog_size(pstage) - fsize); prog_segment_loaded((uintptr_t)prog_start(pstage), prog_size(pstage), SEG_FINAL); diff --git a/src/lib/hexdump.c b/src/lib/hexdump.c index 533411f..da18baa 100644 --- a/src/lib/hexdump.c +++ b/src/lib/hexdump.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <ctype.h> #include <lib.h> +#include <stdint.h> void hexdump(const void *memory, size_t length) { @@ -33,7 +34,7 @@ } if ((all_zero < 2) && (all_one < 2)) { - printk(BIOS_DEBUG, "%p:", memory + i); + printk(BIOS_DEBUG, "%lx:", (uintptr_t)memory + i); for (j = 0; j < num_bytes; j++) printk(BIOS_DEBUG, " %02x", line[j]); for (; j < 16; j++) diff --git a/src/lib/lzma.c b/src/lib/lzma.c index d2e3e4b..cf8d323 100644 --- a/src/lib/lzma.c +++ b/src/lib/lzma.c @@ -15,6 +15,7 @@ #include <lib.h> #include "lzmadecode.h" +#include "stddef.h" size_t ulzman(const void *src, size_t srcn, void *dst, size_t dstn) { @@ -39,7 +40,7 @@ * (ref: lzma.cc@LZMACompress: put_64). To prevent accessing by * unaligned memory address and to load in correct endianness, read each * byte and re-construct. */ - cp = src + LZMA_PROPERTIES_SIZE; + cp = (unsigned char *)src + LZMA_PROPERTIES_SIZE; outSize = cp[3] << 24 | cp[2] << 16 | cp[1] << 8 | cp[0]; if (outSize > dstn) outSize = dstn; @@ -54,7 +55,7 @@ return 0; } state.Probs = (CProb *)scratchpad; - res = LzmaDecode(&state, src + data_offset, srcn - data_offset, + res = LzmaDecode(&state, (unsigned char *)src + data_offset, srcn - data_offset, &inProcessed, dst, outSize, &outProcessed); if (res != 0) { printk(BIOS_WARNING, "lzma: Decoding error = %d\n", res); diff --git a/src/lib/malloc.c b/src/lib/malloc.c index 7d787d6..9aebb2d 100644 --- a/src/lib/malloc.c +++ b/src/lib/malloc.c @@ -1,4 +1,5 @@ #include <console/console.h> +#include <stdint.h> #include <stdlib.h> #include <string.h> @@ -27,7 +28,7 @@ free_mem_ptr = (void *)ALIGN((unsigned long)free_mem_ptr, boundary); p = free_mem_ptr; - free_mem_ptr += size; + free_mem_ptr = (void *)((uintptr_t)free_mem_ptr + size); /* * Store last allocation pointer after ALIGN, as malloc() will * return it. This may cause n bytes of gap between allocations diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index 31bf141..6437ec6 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -264,7 +264,7 @@ if (rmodule_parse(rmod_loc, &rmod_stage)) return -1; - if (rmodule_load(rmod_loc + sizeof(struct rmodule_header), &rmod_stage)) + if (rmodule_load((void *)((uintptr_t)rmod_loc + sizeof(struct rmodule_header)), &rmod_stage)) return -1; prog_set_area(rsl->prog, rmod_stage.location, diff --git a/src/lib/stack.c b/src/lib/stack.c index 479ed93..ae364a1 100644 --- a/src/lib/stack.c +++ b/src/lib/stack.c @@ -25,6 +25,7 @@ #include <assert.h> #include <lib.h> #include <console/console.h> +#include <stdint.h> #include <symbols.h> int checkstack(void *top_of_stack, int core) @@ -33,7 +34,7 @@ size_t stack_size = CONFIG_STACK_SIZE ? CONFIG_STACK_SIZE : REGION_SIZE(stack); int i; - u32 *stack = (u32 *) (top_of_stack - stack_size); + u32 *stack = (u32 *) ((uintptr_t)top_of_stack - stack_size); if (stack[0] != 0xDEADBEEF) { printk(BIOS_ERR, -- To view, visit https://review.coreboot.org/c/coreboot/+/62817 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6dfb30c426867c3176a9426c2909702b40cc577 Gerrit-Change-Number: 62817 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code
by Subrata Banik (Code Review) 15 Mar '22

15 Mar '22

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62738 ) Change subject: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code ...................................................................... {mb, soc}: Move mrc_cache invalidating logic into `memory` common code Commit hash b8b40964 ( mb, soc: Add the SPD_CACHE_ENABLE) introduced per mainboard logic to invalidate the mrc_cache. This patch moves mrc_cache invalidating logic into IA common code and cleans up the code to remove unused argument `dimms_changed` from SoC and mainboard directory. BUG=b:200243989 BRANCH=firmware-brya-14505.B TEST=Able to build and boot redrix without any visible failure/errors. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62738 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao(a)google.com> --- M src/mainboard/google/brya/romstage.c M src/mainboard/intel/adlrvp/romstage_fsp_params.c M src/mainboard/intel/shadowmountain/romstage.c M src/mainboard/prodrive/atlas/romstage_fsp_params.c M src/soc/intel/alderlake/include/soc/meminit.h M src/soc/intel/alderlake/meminit.c M src/soc/intel/common/block/include/intelblocks/meminit.h M src/soc/intel/common/block/memory/meminit.c M src/soc/intel/tigerlake/meminit.c 9 files changed, 19 insertions(+), 33 deletions(-) Approvals: build bot (Jenkins): Verified Zhuohao Lee: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved Eric Lai: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c index 2560840..4e88eca 100644 --- a/src/mainboard/google/brya/romstage.c +++ b/src/mainboard/google/brya/romstage.c @@ -12,7 +12,6 @@ const struct mb_cfg *mem_config = variant_memory_params(); bool half_populated = variant_is_half_populated(); struct mem_spd spd_info; - bool dimms_changed = false; memset(&spd_info, 0, sizeof(spd_info)); variant_get_spd_info(&spd_info); @@ -20,11 +19,7 @@ const struct pad_config *pads; size_t pads_num; - memcfg_init(memupd, mem_config, &spd_info, half_populated, &dimms_changed); - if (dimms_changed) { - memupd->FspmArchUpd.NvsBufferPtr = 0; - memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; - } + memcfg_init(memupd, mem_config, &spd_info, half_populated); pads = variant_romstage_gpio_table(&pads_num); gpio_configure_pads(pads, pads_num); diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c index 8a24529..e29b7d4 100644 --- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c +++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c @@ -48,7 +48,6 @@ const struct mb_cfg *mem_config = variant_memory_params(); int board_id = get_board_id(); const bool half_populated = false; - bool dimms_changed = false; const struct mem_spd memory_down_spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, @@ -73,8 +72,7 @@ case ADL_P_DDR4_1: case ADL_P_DDR4_2: case ADL_P_DDR5_1: - memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, - &dimms_changed); + memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated); break; case ADL_P_DDR5_2: case ADL_P_LP4_1: @@ -84,8 +82,7 @@ case ADL_M_LP4: case ADL_M_LP5: case ADL_N_LP5: - memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated, - &dimms_changed); + memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated); break; default: die("Unknown board id = 0x%x\n", board_id); diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c index eb08d18..fcd829f 100644 --- a/src/mainboard/intel/shadowmountain/romstage.c +++ b/src/mainboard/intel/shadowmountain/romstage.c @@ -11,12 +11,11 @@ { const struct mb_cfg *mem_config = variant_memory_params(); const bool half_populated = false; - bool dimms_changed = false; const struct mem_spd lp5_spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, .cbfs_index = variant_memory_sku(), }; - memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated, &dimms_changed); + memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated); } diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c index fae7100..bd4c0a3 100644 --- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c +++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c @@ -31,7 +31,6 @@ { const struct mb_cfg *mem_config = &ddr5_mem_config; const bool half_populated = false; - bool dimms_changed = false; const struct mem_spd dimm_module_spd_info = { .topo = MEM_TOPO_DIMM_MODULE, @@ -47,5 +46,5 @@ }, }; - memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed); + memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated); } diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h index 6af0acc..bd75636 100644 --- a/src/soc/intel/alderlake/include/soc/meminit.h +++ b/src/soc/intel/alderlake/include/soc/meminit.h @@ -110,6 +110,6 @@ }; void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, - const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed); + const struct mem_spd *spd_info, bool half_populated); #endif /* _SOC_ALDERLAKE_MEMINIT_H_ */ diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 2c915ef..d40ee35 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -236,7 +236,7 @@ } void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, - const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed) + const struct mem_spd *spd_info, bool half_populated) { struct mem_channel_data data; bool dq_dqs_auto_detect = false; @@ -280,7 +280,7 @@ } mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated, - &data, dimms_changed); + &data); mem_init_spd_upds(mem_cfg, &data); mem_init_dq_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); mem_init_dqs_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); diff --git a/src/soc/intel/common/block/include/intelblocks/meminit.h b/src/soc/intel/common/block/include/intelblocks/meminit.h index 6276a7e..3ebf536 100644 --- a/src/soc/intel/common/block/include/intelblocks/meminit.h +++ b/src/soc/intel/common/block/include/intelblocks/meminit.h @@ -136,13 +136,11 @@ * the mainboard. * spd_info : Information about the memory topology. * half_populated: Hint from mainboard if channels are half populated. - * dimms_changed: True if the dimms is changed after caching the spd data. */ void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *spd_info, bool half_populated, - struct mem_channel_data *data, - bool *dimms_changed); + struct mem_channel_data *data); /* * Given a channel number and the maximum number of supported channels, this diff --git a/src/soc/intel/common/block/memory/meminit.c b/src/soc/intel/common/block/memory/meminit.c index 272e6a1..1c6563a 100644 --- a/src/soc/intel/common/block/memory/meminit.c +++ b/src/soc/intel/common/block/memory/meminit.c @@ -98,7 +98,7 @@ static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *info, bool half_populated, struct mem_channel_data *channel_data, - size_t *spd_len, bool *dimms_changed) + size_t *spd_len) { size_t ch, dimm; struct spd_block blk = { 0 }; @@ -110,7 +110,6 @@ * channel is marked as populated. */ uint32_t pop_mask = 0; - *dimms_changed = false; if (!(info->topo & MEM_TOPO_DIMM_MODULE)) return false; @@ -134,14 +133,15 @@ printk(BIOS_WARNING, "Invalid SPD cache\n"); } else { dimm_changed = check_if_dimm_changed(spd_cache, &blk); - if (dimm_changed) { + if (dimm_changed && memupd->FspmArchUpd.NvsBufferPtr != 0) { /* - * Set flag to indicate that the + * Set FSP-M Arch UPD to indicate that the * mrc_cache need to be invalidated */ - printk(BIOS_INFO, - "DIMM change, invalidate cache.\n"); - *dimms_changed = true; + printk(BIOS_INFO, "DIMM change, invalidate cache.\n"); + memupd->FspmArchUpd.NvsBufferPtr = 0; + memupd->FspmArchUpd.BootMode = + FSP_BOOT_WITH_FULL_CONFIGURATION; } } need_update_cache = true; @@ -187,8 +187,7 @@ void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *spd_info, bool half_populated, - struct mem_channel_data *data, - bool *dimms_changed) + struct mem_channel_data *data) { size_t spd_md_len = 0, spd_dimm_len = 0; bool have_dimms; @@ -197,7 +196,7 @@ read_spd_md(soc_mem_cfg, spd_info, half_populated, data, &spd_md_len); have_dimms = read_spd_dimm(memupd, soc_mem_cfg, spd_info, half_populated, data, - &spd_dimm_len, dimms_changed); + &spd_dimm_len); if (data->ch_population_flags == NO_CHANNEL_POPULATED) die("No channels are populated. Incorrect memory configuration!\n"); diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c index 10c57a5..368e071 100644 --- a/src/soc/intel/tigerlake/meminit.c +++ b/src/soc/intel/tigerlake/meminit.c @@ -151,14 +151,13 @@ const struct mem_spd *spd_info, bool half_populated) { struct mem_channel_data data; - bool dimms_changed = false; FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; if (mb_cfg->type >= ARRAY_SIZE(soc_mem_cfg)) die("Invalid memory type(%x)!\n", mb_cfg->type); mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated, - &data, &dimms_changed); + &data); mem_init_spd_upds(mem_cfg, &data); mem_init_dq_upds(mem_cfg, &data, mb_cfg); mem_init_dqs_upds(mem_cfg, &data, mb_cfg); -- To view, visit https://review.coreboot.org/c/coreboot/+/62738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Gerrit-Change-Number: 62738 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code
by Subrata Banik (Code Review) 15 Mar '22

15 Mar '22

Attention is currently required from: Nick Vaccaro, Eric Lai, Patrick Rudolph, Zhuohao Lee. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62738 ) Change subject: {mb, soc}: Move mrc_cache invalidating logic into `memory` common code ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > I ran this code on my brask device, the result looks okay. Thanks Subrata! Thanks Zhuohao for checking on brask device. -- To view, visit https://review.coreboot.org/c/coreboot/+/62738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f18e18adc6572571871dd6da1698186e4e3d671 Gerrit-Change-Number: 62738 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Tue, 15 Mar 2022 10:18:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Pass `FSPM_UPD *` argument for spd functions
by Subrata Banik (Code Review) 15 Mar '22

15 Mar '22

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62737 ) Change subject: soc/intel/common: Pass `FSPM_UPD *` argument for spd functions ...................................................................... soc/intel/common: Pass `FSPM_UPD *` argument for spd functions This patch adds `FSPM_UPD *` as argument for mem_populate_channel_data() and read_spd_dimm(). This change will help to update the architectural FSP-M UPDs in read_spd_dimm(). BUG=b:200243989 BRANCH=firmware-brya-14505.B TEST=Able to build and boot redrix without any visible failure/errors. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I770cfd05194c33e11f98f95c5b93157b0ead70c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62737 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao(a)google.com> --- M src/soc/intel/alderlake/meminit.c M src/soc/intel/common/block/include/intelblocks/meminit.h M src/soc/intel/common/block/memory/meminit.c M src/soc/intel/tigerlake/meminit.c 4 files changed, 12 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Zhuohao Lee: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 31b3ae1..2c915ef 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -279,8 +279,8 @@ die("Unsupported memory type(%d)\n", mb_cfg->type); } - mem_populate_channel_data(&soc_mem_cfg[mb_cfg->type], spd_info, half_populated, &data, - dimms_changed); + mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated, + &data, dimms_changed); mem_init_spd_upds(mem_cfg, &data); mem_init_dq_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); mem_init_dqs_upds(mem_cfg, &data, mb_cfg, dq_dqs_auto_detect); diff --git a/src/soc/intel/common/block/include/intelblocks/meminit.h b/src/soc/intel/common/block/include/intelblocks/meminit.h index 130249c..6276a7e 100644 --- a/src/soc/intel/common/block/include/intelblocks/meminit.h +++ b/src/soc/intel/common/block/include/intelblocks/meminit.h @@ -3,6 +3,7 @@ #ifndef __SOC_INTEL_COMMON_BLOCK_MEMINIT_H__ #define __SOC_INTEL_COMMON_BLOCK_MEMINIT_H__ +#include <fsp/api.h> #include <types.h> /* @@ -130,13 +131,14 @@ /* * This change populates data regarding memory channels in `struct * mem_channel_data` using the following inputs from SoC code: + * memupd : FSP-M UPD configuration. * soc_mem_cfg : SoC-specific information about the memory technology used by * the mainboard. * spd_info : Information about the memory topology. * half_populated: Hint from mainboard if channels are half populated. * dimms_changed: True if the dimms is changed after caching the spd data. */ -void mem_populate_channel_data(const struct soc_mem_cfg *soc_mem_cfg, +void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *spd_info, bool half_populated, struct mem_channel_data *data, diff --git a/src/soc/intel/common/block/memory/meminit.c b/src/soc/intel/common/block/memory/meminit.c index 89cd4e3..272e6a1 100644 --- a/src/soc/intel/common/block/memory/meminit.c +++ b/src/soc/intel/common/block/memory/meminit.c @@ -95,8 +95,9 @@ #define CH_DIMM_OFFSET(ch, dimm) ((ch) * CONFIG_DIMMS_PER_CHANNEL + (dimm)) -static bool read_spd_dimm(const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *info, - bool half_populated, struct mem_channel_data *channel_data, +static bool read_spd_dimm(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, + const struct mem_spd *info, bool half_populated, + struct mem_channel_data *channel_data, size_t *spd_len, bool *dimms_changed) { size_t ch, dimm; @@ -183,7 +184,7 @@ return pop_mask != 0; } -void mem_populate_channel_data(const struct soc_mem_cfg *soc_mem_cfg, +void mem_populate_channel_data(FSPM_UPD *memupd, const struct soc_mem_cfg *soc_mem_cfg, const struct mem_spd *spd_info, bool half_populated, struct mem_channel_data *data, @@ -195,7 +196,7 @@ memset(data, 0, sizeof(*data)); read_spd_md(soc_mem_cfg, spd_info, half_populated, data, &spd_md_len); - have_dimms = read_spd_dimm(soc_mem_cfg, spd_info, half_populated, data, + have_dimms = read_spd_dimm(memupd, soc_mem_cfg, spd_info, half_populated, data, &spd_dimm_len, dimms_changed); if (data->ch_population_flags == NO_CHANNEL_POPULATED) diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c index d5ca9a9..10c57a5 100644 --- a/src/soc/intel/tigerlake/meminit.c +++ b/src/soc/intel/tigerlake/meminit.c @@ -157,8 +157,8 @@ if (mb_cfg->type >= ARRAY_SIZE(soc_mem_cfg)) die("Invalid memory type(%x)!\n", mb_cfg->type); - mem_populate_channel_data(&soc_mem_cfg[mb_cfg->type], spd_info, half_populated, &data, - &dimms_changed); + mem_populate_channel_data(memupd, &soc_mem_cfg[mb_cfg->type], spd_info, half_populated, + &data, &dimms_changed); mem_init_spd_upds(mem_cfg, &data); mem_init_dq_upds(mem_cfg, &data, mb_cfg); mem_init_dqs_upds(mem_cfg, &data, mb_cfg); -- To view, visit https://review.coreboot.org/c/coreboot/+/62737 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I770cfd05194c33e11f98f95c5b93157b0ead70c1 Gerrit-Change-Number: 62737 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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