coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4
by Name of user not set (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Sean Rhodes, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Jeff Daly, Sean Rhodes, Mariusz Szafrański, Paul Menzel, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62270 to look at the new patch set (#5). Change subject: soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4 ...................................................................... soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4 Calculate the frequencies based on the appropriate MSRs and pass them to SMBIOS tables generator. This has been tested on a Harcuvar CRB, where Tianocore now reports a correct CPU frequency. Signed-off-by: Mathieu Othacehe <othacehe(a)gnu.org> Change-Id: I6249b0f74b34ec5ca73351eda00604089b7c3581 --- M src/soc/intel/denverton_ns/cpu.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/62270/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/62270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6249b0f74b34ec5ca73351eda00604089b7c3581 Gerrit-Change-Number: 62270 Gerrit-PatchSet: 5 Gerrit-Owner: Name of user not set #1004162 Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/banshee: Add WiFi SAR table
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Frank Wu, John Su, YH Lin, Dtrain Hsu, Ian Feng, Tim Wawrzynczak, Nick Vaccaro, Amanda Hwang, Ricky Chang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62846 ) Change subject: mb/google/brya/var/banshee: Add WiFi SAR table ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fa833409bd69e080fda735c89015b9548252190 Gerrit-Change-Number: 62846 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Ricky Chang <rickytlchang(a)google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 08:01:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/banshee: Add WiFi SAR table
by Frank Wu (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: John Su, YH Lin, Dtrain Hsu, Ian Feng, Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Amanda Hwang, Ricky Chang. Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62846 ) Change subject: mb/google/brya/var/banshee: Add WiFi SAR table ...................................................................... Patch Set 4: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/62846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fa833409bd69e080fda735c89015b9548252190 Gerrit-Change-Number: 62846 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Ricky Chang <rickytlchang(a)google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:59:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Revise power-on sequence of PS8640
by Paul Menzel (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62893 ) Change subject: mb/google/corsola: Revise power-on sequence of PS8640 ...................................................................... Patch Set 6: Code-Review+1 (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62893/comment/ee4ad38f_5f4e62ee PS5, Line 9: The power-on sequence of PS8640 needs to be modified because the : waveform of power-on sequence do not meet the spec of PS8640. Could you clarify that in the commit message? > Although the panel initializes fine and the fw recovery screen is displayed without issues, the current power-on sequence of the PS8640 violates the spec of the PS8640, which can be confirmed by measuring it with an oscilloscope. https://review.coreboot.org/c/coreboot/+/62893/comment/829dac11_56bf2afe PS5, Line 17: result of waveform meets the spec. > I add power-on sequence in commit message: […] Awesome thank you. Patchset: PS6: Sorry for all my nitpicks. Thank you for responding so quickly. File src/mainboard/google/corsola/display.c: https://review.coreboot.org/c/coreboot/+/62893/comment/69903b77_599d66cb PS6, Line 32: mdelay(55); As no problems are known, I’d use 50 ms and not add a margin. -- To view, visit https://review.coreboot.org/c/coreboot/+/62893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7706c56dc7fc13ac84c0d52a6e534bc0988e8fd3 Gerrit-Change-Number: 62893 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:47:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4
by Name of user not set (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Name of user not set #1004162, Sean Rhodes, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Hello build bot (Jenkins), Jeff Daly, Sean Rhodes, Mariusz Szafrański, Paul Menzel, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62270 to look at the new patch set (#4). Change subject: soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4 ...................................................................... soc/intel/denverton_ns/cpu: Get CPU frequencies for SMBIOS type 4 Calculate the frequencies based on the appropriate MSRs and pass them to SMBIOS tables generator. This has been tested on a Harcuvar CRB, where Tianocore now reports a correct CPU frequency. Signed-off-by: Mathieu Othacehe <othacehe(a)gnu.org> Change-Id: I6249b0f74b34ec5ca73351eda00604089b7c3581 --- M src/soc/intel/denverton_ns/cpu.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/62270/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/62270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6249b0f74b34ec5ca73351eda00604089b7c3581 Gerrit-Change-Number: 62270 Gerrit-PatchSet: 4 Gerrit-Owner: Name of user not set #1004162 Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Name of user not set #1004162 Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/corsola: Revise power-on sequence of PS8640
by Rex-BC Chen (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62893 ) Change subject: mb/google/corsola: Revise power-on sequence of PS8640 ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62893/comment/b7dd3184_c30d3613 PS5, Line 9: The power-on sequence of PS8640 needs to be modified because the : waveform of power-on sequence do not meet the spec of PS8640. > no, just not meet power-on spec measured by oscilloscope. Done https://review.coreboot.org/c/coreboot/+/62893/comment/1913dc56_daae2cf9 PS5, Line 17: result of waveform meets the spec. > I add power-on sequence in commit message: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7706c56dc7fc13ac84c0d52a6e534bc0988e8fd3 Gerrit-Change-Number: 62893 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:42:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Revise power-on sequence of PS8640
by Yu-Ping Wu (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62893 ) Change subject: mb/google/corsola: Revise power-on sequence of PS8640 ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7706c56dc7fc13ac84c0d52a6e534bc0988e8fd3 Gerrit-Change-Number: 62893 Gerrit-PatchSet: 6 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:40:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "Revert "drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` t...
by Subrata Banik (Code Review) 18 Mar '22

18 Mar '22

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62907 ) Change subject: Revert "Revert "drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially"" ...................................................................... Revert "Revert "drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially"" This reverts a change that was causing hangs and exceptions during boot on an ADL brya4es. The hang (or APIC exception) occurs at what appears to be the FSP MP initialization sequence, prior to the "Display FSP Version Info HOB" log being displayed : [DEBUG] Detected 10 core, 12 thread CPU. [DEBUG] Display FSP Version Info HOB This reverts commit 40ca79714ad7d5f2aa201d83db4d97f21260d924. BUG=b:224873032 TEST=`emerge-brya coreboot chromeos-bootimage`, flash and verify brya4es is able to successfully reboot 200 times without any issues. Change-Id: I88c15a51c5d27fbd243478c923e75962d3f8d67d Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62907 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c 1 file changed, 17 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Ronak Kanabar: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c index 50e35b0..9aef1b6 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c @@ -94,10 +94,23 @@ /* Run on BSP */ procedure(argument); - /* Run on APs */ - if (mp_run_on_aps((void *)procedure, argument, - MP_RUN_ON_ALL_CPUS, timeout_usec) != CB_SUCCESS) { - printk(BIOS_ERR, "%s: Exit with Failure\n", __func__); + /* + * Run on APs Serially + * + * FIXME: As per MP service specification, EDK2 is allowed to specify the mode + * in which a 'func' routine should be executed on APs (i.e. execute serially + * or concurrently). + * + * MP service API `StartupAllCPUs` doesn't specify such requirement. + * Hence, running the `CpuCacheInfoCollectCoreAndCacheData` + * (UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c#194) + * simultaneously on APs results in a coherency issue (hang while executing `func`) + * due to lack of acquiring a spin lock while accessing common data structure in + * multiprocessor environment. + */ + if (mp_run_on_all_aps((void *)procedure, argument, timeout_usec, false) != + CB_SUCCESS) { + printk(BIOS_DEBUG, "%s: Exit with Failure\n", __func__); return FSP_NOT_STARTED; } -- To view, visit https://review.coreboot.org/c/coreboot/+/62907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88c15a51c5d27fbd243478c923e75962d3f8d67d Gerrit-Change-Number: 62907 Gerrit-PatchSet: 7 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek: Save dram info to cbmem
by Yu-Ping Wu (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Hung-Te Lin, Xi Chen, Paul Menzel, Julius Werner, Xixi Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61334 ) Change subject: soc/mediatek: Save dram info to cbmem ...................................................................... Patch Set 25: -Code-Review (1 comment) File src/soc/mediatek/common/memory.c: https://review.coreboot.org/c/coreboot/+/61334/comment/49daee2c_42fc3564 PS22, Line 123: p = (void *)((uintptr_t)mc + sizeof(*mc)); > The problem with C99 variable-length arrays is that they make sizeof() illegal. […] Now I see what the problem is. The error will happen only if x (in Julius' example) points to a global variable, which makes perfect sense since the x->c[2] will definitely access invalid memory. However, I don't know why there won't be errors when x points to a local variable. In PS18 'p' is pointing to a global variable 'curr_dram_info', which is of course wrong. Now in PS25 we've fixed the problem, so I believe we can access the array by `mc->channel[i]`. -- To view, visit https://review.coreboot.org/c/coreboot/+/61334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I195187c0c757a43bb6d2c57c8f303249f2a7995a Gerrit-Change-Number: 61334 Gerrit-PatchSet: 25 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:17:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter
by Werner Zeh (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Nico Huber, Maxim Polyakov, Paul Menzel, Angel Pons, Andrey Petrov. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62889 ) Change subject: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/apollolake/romstage.c: https://review.coreboot.org/c/coreboot/+/62889/comment/50b8eee6_96073d0d PS2, Line 236: GPU_PRIMARY_PCI > Does the external PCIe GPU work too? I will have access to an Intel CRB in two weeks and will test to be sure. -- To view, visit https://review.coreboot.org/c/coreboot/+/62889 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbc144fa809f6d4587f5223b235ee95579c48f7 Gerrit-Change-Number: 62889 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 07:09:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2022