coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/dedede/var/beadrix: Update PCIe and SATA pins for low power...
by Teddy Shih (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Henry Sun, Paul Menzel, Aseda Aboagye, Simon Yang, Karthik Ramasubramanian. Teddy Shih has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62776 ) Change subject: mb/google/dedede/var/beadrix: Update PCIe and SATA pins for low power consumption ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Dear All, I have updated with Google battery life and Intel power consumption requirement. Please kindly review it. Best Regards, Teddy -- To view, visit https://review.coreboot.org/c/coreboot/+/62776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79ec524c5ce8f2a79da4aeba084786fb9dac17af Gerrit-Change-Number: 62776 Gerrit-PatchSet: 3 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:54:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "Revert "drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` t...
by Ronak Kanabar (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Maulik V Vaghela, Paul Menzel, Sridhar Siricilla, Nick Vaccaro, Andrey Petrov. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62907 ) Change subject: Revert "Revert "drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially"" ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88c15a51c5d27fbd243478c923e75962d3f8d67d Gerrit-Change-Number: 62907 Gerrit-PatchSet: 6 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:37:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add UfsEnable parameter
by Subrata Banik (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Tim Wawrzynczak, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62914 ) Change subject: soc/intel/alderlake: Add UfsEnable parameter ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b956204fb1001977d86c0d898b2734efb32271 Gerrit-Change-Number: 62914 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:17:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable debug driver for Alder Lake platform
by Subrata Banik (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62652 ) Change subject: soc/intel/alderlake: Enable debug driver for Alder Lake platform ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4df3d7f3d6585bd37c632b1a3f0a47c94b63697 Gerrit-Change-Number: 62652 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:15:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/p2sb: Add helper function to enable BAR
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Wonkyu Kim, Subrata Banik, John Zhao, Angel Pons, Nick Vaccaro, Patrick Rudolph. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62778 ) Change subject: soc/intel/common/block/p2sb: Add helper function to enable BAR ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica41e8e8bdfcfe855e730b3878b874070062ef93 Gerrit-Change-Number: 62778 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:03:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable debug driver for Alder Lake platform
by Rizwan Qureshi (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62652 ) Change subject: soc/intel/alderlake: Enable debug driver for Alder Lake platform ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4df3d7f3d6585bd37c632b1a3f0a47c94b63697 Gerrit-Change-Number: 62652 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:02:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable dynamic debug capability for brya family
by Rizwan Qureshi (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61381 ) Change subject: mb/google/brya: Enable dynamic debug capability for brya family ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61381 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51b0e0bb4392d3fbdb50577d3644491ab90a33c3 Gerrit-Change-Number: 61381 Gerrit-PatchSet: 15 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:02:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add IOE P2SB for TCSS
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, John Zhao, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62721 ) Change subject: soc/intel/common: Add IOE P2SB for TCSS ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Gerrit-Change-Number: 62721 Gerrit-PatchSet: 9 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 06:01:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Configure TCSS access through IOE P2SB
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, John Zhao, Paul Menzel, Angel Pons, Patrick Rudolph, EricR Lai. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Configure TCSS access through IOE P2SB ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/tcss/tcss.c: https://review.coreboot.org/c/coreboot/+/62723/comment/124b61b2_c9e54cdb PS5, Line 371: static void ioe_tcss_configure_aux_bias_pads_sbi( : const struct typec_aux_bias_pads *pads) : { : for (size_t i = 0; i < MAX_TYPE_C_PORTS; i++) { : if (pads[i].pad_auxn_dc && pads[i].pad_auxp_dc) { : ioe_p2sb_sbi_write(PID_IOM, IOM_AUX_BIAS_CTRL_PULLUP_OFFSET(i), : calc_bias_ctrl_reg_value(pads[i].pad_auxp_dc)); : ioe_p2sb_sbi_write(PID_IOM, IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(i), : calc_bias_ctrl_reg_value(pads[i].pad_auxn_dc)); : } : } : } : : static void tcss_configure_aux_bias_pads( : const struct typec_aux_bias_pads *pads) : { : if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR)) : tcss_configure_aux_bias_pads_regbar(pads); : else if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_SBI)) { : if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB)) : ioe_tcss_configure_aux_bias_pads_sbi(pads); : } : else : printk(BIOS_ERR, "%s: Error: No TCSS configuration method is selected!\n", : __func__); : } : : const struct tcss_port_map *tcss_get_port_info(size_t *num_ports) : { : static struct tcss_port_map port_map[MAX_TYPE_C_PORTS]; : size_t active_ports = 0; : size_t port; : : for (port = 0; port < MAX_TYPE_C_PORTS; port++) { : const struct device_path conn_path[] = { : {.type = DEVICE_PATH_PCI, .pci.devfn = PCH_DEVFN_PMC}, : {.type = DEVICE_PATH_GENERIC, .generic.id = 0, .generic.subid = 0}, : {.type = DEVICE_PATH_GENERIC, .generic.id = port}, : }; : const struct device *conn = find_dev_nested_path(pci_root_bus(), conn_path, : ARRAY_SIZE(conn_path)); : unsigned int usb2_port, usb3_port; : : if (!conn) : continue; : : if (CONFIG(DRIVERS_INTEL_PMC) && : intel_pmc_mux_conn_get_ports(conn, &usb2_port, &usb3_port)) { : port_map[active_ports].usb2_port = usb2_port; : port_map[active_ports].usb3_port = usb3_port; : ++active_ports; : } : } : : *num_ports = active_ports; : return port_map; : } : : void tcss_configure(const struct typec_aux_bias_pads aux_bias_pads[MAX_TYPE_C_PORTS]) : { : const struct tcss_port_map *port_map; : size_t num_ports; : size_t i; : : port_map = tcss_get_port_info(&num_ports); : if (port_map == NULL) : return; : : for (i = 0; i < num_ports; i++) : tcss_init_mux(i, &port_map[i]); : : /* This should be performed before alternate modes are entered */ : tcss_configure_aux_bias_pads(aux_bias_pads); : : if (CONFIG(ENABLE_TCSS_DISPLAY_DETECTION)) : tcss_configure_dp_mode(port_map, num_ports); : } : : uint32_t tcss_valid_tbt_auth(void) : { : if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_REGBAR)) { : return REGBAR32(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION; : } else if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_REG_ACCESS_SBI)) { : if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB)) : return (ioe_p2sb_sbi_read(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & : TBT_VALID_AUTHENTICATION); : } : : printk(BIOS_ERR, "%s: Error: No validation for Thunderbolt authentication!\n", : __func__); : return 0; : } > This is getting to be pretty complex logic to pick which method is used to access TCSS registers her […] I vote soc_tcss_ops. Very objective way like other chips driver. -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 5 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 18 Mar 2022 05:53:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add UfsEnable parameter
by Eric Lai (Code Review) 18 Mar '22

18 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62914 ) Change subject: soc/intel/alderlake: Add UfsEnable parameter ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/62914/comment/92aee1b5_d3cafaeb PS1, Line 620: s_cfg->UfsEnable[0] = is_devfn_enabled(PCH_DEVFN_UFS); > This is very weird, as per EDS, ADL-N supports only 1 UFS controller but FSP code assumes/kept place […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b956204fb1001977d86c0d898b2734efb32271 Gerrit-Change-Number: 62914 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 18 Mar 2022 05:49:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2022