Attention is currently required from: Martin L Roth.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/em100/+/62938 )
Change subject: makechips.sh: Build makedpfw if not present
......................................................................
Patch Set 1: Code-Review+1
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Gerrit-Change-Id: If5dd121a4977126c456162de7d4328d69e741902
Gerrit-Change-Number: 62938
Gerrit-PatchSet: 1
Gerrit-Owner: Martin L Roth <martinroth(a)google.com>
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Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/62938 )
Change subject: makechips.sh: Build makedpfw if not present
......................................................................
makechips.sh: Build makedpfw if not present
Check for makedpfw and build it if it hasn't been built yet.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: If5dd121a4977126c456162de7d4328d69e741902
---
M makechips.sh
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/38/62938/1
diff --git a/makechips.sh b/makechips.sh
index ddf1953..e6080f2 100755
--- a/makechips.sh
+++ b/makechips.sh
@@ -28,6 +28,10 @@
WD="$(cd "$(dirname "$(eval echo "$0")")" || exit 1; pwd)"
TD="${WD}/em100_home"
+if [[ ! -f "${WD}/makedpfw" ]]; then
+ make makedpfw
+fi
+
cd "${TEMP}" || exit 1
if [ -r "${WD}/${FILE}" ]; then
echo " Copying $FILE..."
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Gerrit-MessageType: newchange
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62924 )
Change subject: mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
......................................................................
mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
Right now, the PSPP policy that controls if the PCIe lanes can be
dynamically downgraded to a lower speed to save some power needs to be
disabled in order for the link training to be successful. Once this
feature is working, PSPP will be reenabled.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I6ea602596acb8e5ea92076386e80102c3bc757af
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62924
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
Reviewed-by: Jon Murphy <jpmurphy(a)google.com>
---
M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
Jon Murphy: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index 7d4fb7f..03bb55e 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -47,6 +47,8 @@
register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # Audio/SAR
register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # GSC
+ register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works
+
device domain 0 on
device ref lpc_bridge on
chip ec/google/chromeec
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
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Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62923 )
Change subject: mb/amd/chausie/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
......................................................................
mb/amd/chausie/devicetree: set PSPP policy to DXIO_PSPP_DISABLED
Right now, the PSPP policy that controls if the PCIe lanes can be
dynamically downgraded to a lower speed to save some power needs to be
disabled in order for the link training to be successful. Once this
feature is working, the PSPP policy will be switched to balanced again.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I85a06f322c4ddff25c3a858e2b79c84b36c48932
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62923
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
---
M src/mainboard/amd/chausie/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
Fred Reitberger: Looks good to me, but someone else must approve
diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb
index f3a84f3..7f37be2 100644
--- a/src/mainboard/amd/chausie/devicetree.cb
+++ b/src/mainboard/amd/chausie/devicetree.cb
@@ -24,7 +24,7 @@
register "s0ix_enable" = "true"
- register "pspp_policy" = "DXIO_PSPP_BALANCED"
+ register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works
device domain 0 on
device ref iommu on end
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
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Xue Yao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28950 )
Change subject: lenovo/x230: introduce FHD variant
......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS13:
> I'm new to gerrit, should the author be changed and should I amend the commit message? I've changed […]
Apologies about the author. I've reverted it back in patch set 15 and also fixed the extra newline. This should be good to merge into master.
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Attention is currently required from: Nico Huber, Xue Yao, Paul Menzel, Kilian Neuner, Angel Pons, Charles Moyes, Alexander Couzens.
Xue Yao has uploaded a new patch set (#15) to the change originally created by Alexander Couzens. ( https://review.coreboot.org/c/coreboot/+/28950 )
Change subject: lenovo/x230: introduce FHD variant
......................................................................
lenovo/x230: introduce FHD variant
There is a modification for the x230 which uses the 2nd DP from the dock
as the integrated panel's connection, which allows using a Full HD (FHD)
eDP panel instead of the stock LVDS display.
To make this work with coreboot, the internal LVDS connector should be
disabled in libgfxinit. The VBT has been modified as well, which allows
brightness controls to work out of the box.
The modifications done to the VBT are:
- Remove the LVDS port entry.
- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
position on the list.
- Set the DP-3 as internally connected.
This has been reported to work with panel LP125WF2 SPB4.
Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
---
M src/mainboard/lenovo/x230/Kconfig
M src/mainboard/lenovo/x230/Kconfig.name
M src/mainboard/lenovo/x230/Makefile.inc
A src/mainboard/lenovo/x230/variants/x230_edp/board_info.txt
A src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
A src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
6 files changed, 72 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/28950/15
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Xue Yao has uploaded a new patch set (#14) to the change originally created by Alexander Couzens. ( https://review.coreboot.org/c/coreboot/+/28950 )
Change subject: lenovo/x230: introduce FHD variant
......................................................................
lenovo/x230: introduce FHD variant
There is a modification for the x230 which uses the 2nd DP from the dock
as the integrated panel's connection, which allows using a Full HD (FHD)
eDP panel instead of the stock LVDS display.
To make this work with coreboot, the internal LVDS connector should be
disabled in libgfxinit. The VBT has been modified as well, which allows
brightness controls to work out of the box.
The modifications done to the VBT are:
- Remove the LVDS port entry.
- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
position on the list.
- Set the DP-3 as internally connected.
This has been reported to work with panel LP125WF2 SPB4.
Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
---
M src/mainboard/lenovo/x230/Kconfig
M src/mainboard/lenovo/x230/Kconfig.name
M src/mainboard/lenovo/x230/Makefile.inc
A src/mainboard/lenovo/x230/variants/x230_edp/board_info.txt
A src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
A src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
6 files changed, 73 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/28950/14
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Change subject: lenovo/x230: introduce FHD variant
......................................................................
Patch Set 13:
(2 comments)
File src/mainboard/lenovo/x230/variants/x230_fhd/gma-mainboard.ads:
PS10:
> Please use SPDX: […]
Amended.
File src/mainboard/lenovo/x230/variants/x230_fhd/gpio.c:
PS12:
> You can treat the X230_FHD like the regular X230 (same variant dir), but with a different gma-mainbo […]
Is this implementation better now?
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