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Hello build bot (Jenkins), Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Rizwan Qureshi, Sugnan Prabhu S, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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Change subject: src/driver/wifi: Add _DSM method for DDRRFIM
......................................................................
src/driver/wifi: Add _DSM method for DDRRFIM
coreboot needs to propagate the CnviDdrRfim value info of the feature
enable/disable state into the CNVi via the WiFi DSM ACPI object. This
patch adds _DSM method for that.
Add support for following 2 function in _DSM method
- Function 0: Function Support Query Returns a bitmask of functions
supported.
- Function 3: RFI enablement 0 Feature Enable 1 Feature Disable
BUG=b:201724512
TEST=Build, boot brya0 and dump SSDT entries
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
ToBuffer (Arg0, Local0)
If ((Local0 == ToUUID ("7266172c-220b-4b29-814f-75e4dd26b5fd")))
{
ToInteger (Arg2, Local1)
If ((Local1 == Zero))
{
Return (Buffer (One)
{
0x09
})
}
If ((Local1 == One)){}
If ((Local1 == 0x02)){}
If ((Local1 == 0x03))
{
Return (Zero)
}
Return (Buffer (One)
{
0x00
})
}
Return (Buffer (One)
{
0x00
})
}
Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com>
Change-Id: I217b736df3d4224a6732d1941a160abcddbd8f37
---
M src/drivers/wifi/generic/acpi.c
1 file changed, 67 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/61020/21
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Hello Tim Wawrzynczak,
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Change subject: [TEST]mb/google/brya/var/taeko: Improve factory process to avoid mess up eMMC and SSD when first boot.
......................................................................
[TEST]mb/google/brya/var/taeko: Improve factory process to avoid mess up eMMC and
SSD when first boot.
Using GPP_F19 as eMMC detect pin when first boot with default FW ID.
BUG=b:224884408
TEST=Build FW and test on rework MB also test on original MB pass.
Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com>
Change-Id: I6eb29680518ba5ba447ac16aef5eaaf0262437e0
---
M src/mainboard/google/brya/romstage.c
M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/brya/variants/taeko/Makefile.inc
M src/mainboard/google/brya/variants/taeko/gpio.c
A src/mainboard/google/brya/variants/taeko/runtimestorage.c
5 files changed, 49 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/62941/2
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62941 )
Change subject: mb/google/brya/var/taeko: Improve factory process to avoid mess up eMMC and SSD when first boot.
......................................................................
Patch Set 1:
(6 comments)
File src/mainboard/google/brya/variants/taeko/runtimestorage.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/87e00f9a_fe903e41
PS1, Line 15: if(fw_config_probe(FW_CONFIG(BOOT_NVME_MASK, BOOT_NVME_ENABLED)) &&
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/be218b3a_87af9ae1
PS1, Line 15: if(fw_config_probe(FW_CONFIG(BOOT_NVME_MASK, BOOT_NVME_ENABLED)) &&
space required before the open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/47e74195_a49ffa1f
PS1, Line 16: fw_config_probe(FW_CONFIG(BOOT_EMMC_MASK, BOOT_EMMC_ENABLED))){
space required before the open brace '{'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/820797a0_f3d3d31b
PS1, Line 23:
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/48e7508c_110776a6
PS1, Line 24: if(!gpio_get(GPP_F19)){
space required before the open brace '{'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144317):
https://review.coreboot.org/c/coreboot/+/62941/comment/50d52886_24a5ebb0
PS1, Line 24: if(!gpio_get(GPP_F19)){
space required before the open parenthesis '('
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Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62192 )
Change subject: soc/intel/common: Retry END_OF_POST command
......................................................................
Patch Set 14:
(2 comments)
Patchset:
PS14:
> Result from a test: applying CB:62272 on TGL also resolved the issue without having to retry
Thanks for verifying the patch.
File src/soc/intel/common/block/cse/cse_eop.c:
https://review.coreboot.org/c/coreboot/+/62192/comment/067ad372_ad04fc64
PS12, Line 14: #define CSE_MAX_RETRY_CMD 3
> I don't think we need a macro for this, do we?
sorry, I didn't notice the comment. Since the retry is specific purpose, so do you suggest the macro is not needed here? or any other reason?
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Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Paul Menzel, Tim Wawrzynczak, Angel Pons, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: Documentation: Move documentation license to main menu
......................................................................
Documentation: Move documentation license to main menu
The "Getting started" section is not an appropriate place for the
documentation license. It should rather be listed in the main menu.
Thus, move it there.
Change-Id: I8bfc4f52da8a93d78a62e3a68fd6f1dc8ae4d335
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
R Documentation/documentation_license.md
M Documentation/getting_started/index.md
M Documentation/index.md
3 files changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/62767/4
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62767 )
Change subject: Documentation: Move documentation license to main menu
......................................................................
Patch Set 3:
This change is ready for review.
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Hello build bot (Jenkins), Jamie Ryu, Wonkyu Kim, Ethan Tsao, Raj Astekar, Ravishankar Sarawadi,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/mtl: Do initial SoC commit till bootblock
......................................................................
soc/intel/mtl: Do initial SoC commit till bootblock
List of changes:
1. Add required SoC programming till bootblock
2. Include only required headers into include/soc
3. Include MTL-P related DID, BDF
4. Ref: Processor EDS documents
vol1 #621483, vol2 #640858
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com>
Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4
---
A src/soc/intel/meteorlake/Kconfig
A src/soc/intel/meteorlake/Makefile.inc
A src/soc/intel/meteorlake/bootblock/bootblock.c
A src/soc/intel/meteorlake/bootblock/pch.c
A src/soc/intel/meteorlake/bootblock/report_platform.c
A src/soc/intel/meteorlake/include/soc/bootblock.h
A src/soc/intel/meteorlake/include/soc/espi.h
A src/soc/intel/meteorlake/include/soc/iomap.h
A src/soc/intel/meteorlake/include/soc/p2sb.h
A src/soc/intel/meteorlake/include/soc/pci_devs.h
A src/soc/intel/meteorlake/include/soc/pcr_ids.h
A src/soc/intel/meteorlake/include/soc/pm.h
A src/soc/intel/meteorlake/include/soc/smbus.h
13 files changed, 1,036 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/62772/4
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/em100/+/62939 )
Change subject: makechips.sh: Reformat script with shfmt
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/em100/+/62939/comment/cf11c826_bde36e99
PS1, Line 8:
Maybe add the shfmt version.
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Change subject: makechips.sh: Clean up shellcheck errors and formatting
......................................................................
Patch Set 1: Code-Review+1
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