coreboot-gerrit March 2022

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Change in blobs[master]: mb/google/guybrush: Update APCB file
by Martin Roth (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Robert Zieba, Raul Rangel, Patrick Georgi, Rob Barnes, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/62963 ) Change subject: mb/google/guybrush: Update APCB file ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Martin/Patrick, […] You need to get someone who has the blob verify +1 rights to verify it. Jenkins does not set it. Here's that list: https://review.coreboot.org/admin/groups/0ea5973ed8d211846a4e9b62b08b1f728d… Aside from that, there's a readme.md file at the top level of the blobs repo with some requirements. https://review.coreboot.org/plugins/gitiles/blobs/+/refs/heads/master/READM… For an APCB update in guybrush, really all that you'd need is to update the release notes. -- To view, visit https://review.coreboot.org/c/blobs/+/62963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: Ifbfe2c61c42cd503a70fd84c51ce184c40fed318 Gerrit-Change-Number: 62963 Gerrit-PatchSet: 3 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:38:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbmem: Keep original Total Time calculation when no negative tim...
by Julius Werner (Code Review) 21 Mar '22

21 Mar '22

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61839 ) Change subject: util/cbmem: Keep original Total Time calculation when no negative timestamps ...................................................................... util/cbmem: Keep original Total Time calculation when no negative timestamps "Total time" calculation changed after CL 59555 to include "1st timestamp" value in the calculation. This patch restores original Total Time calculation where "1st timetamp" is subtracted from "jumping to kernel". If pre CPU reset timestamps are added (negative timestamps), "Total time" calculation still includes the pre-reset time as expected. 1) Before https://review.coreboot.org/c/coreboot/+/59555: 0:1st timestamp 225,897 1101:jumping to kernel 1,238,218 (16,316) Total Time: 1,012,281 2) After https://review.coreboot.org/c/coreboot/+/59555: 0:1st timestamp 225,897 1101:jumping to kernel 1,238,218 (16,316) Total Time: 1,238,178 3) After this patch: 0:1st timestamp 225,897 (0) 1101:jumping to kernel 1,238,218 (16,316) Total Time: 1,012,281 BUG=none TEST=Boot to OS, check cbmem -t on Redrix board Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: I0442f796b03731df3b869aea32d40ed94cabdce0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61839 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M util/cbmem/cbmem.c 1 file changed, 5 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Julius Werner: Looks good to me, approved diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index eef68a0..0fd69d6 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -642,9 +642,12 @@ * If there are negative timestamp entries, rebase all of the * timestamps to the lowest one in the list. */ - if (sorted_tst_p->entries[0].entry_stamp < 0) + if (sorted_tst_p->entries[0].entry_stamp < 0) { sorted_tst_p->base_time = -sorted_tst_p->entries[0].entry_stamp; - prev_stamp = 0; + prev_stamp = 0; + } else { + prev_stamp = tst_p->base_time; + } total_time = 0; for (uint32_t i = 0; i < sorted_tst_p->num_entries; i++) { -- To view, visit https://review.coreboot.org/c/coreboot/+/61839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0442f796b03731df3b869aea32d40ed94cabdce0 Gerrit-Change-Number: 61839 Gerrit-PatchSet: 7 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: [RFC]device/device.h: Remove struct bus linked list
by Arthur Heymans (Code Review) 21 Mar '22

21 Mar '22

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62965 ) Change subject: [RFC]device/device.h: Remove struct bus linked list ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I only clicked a few random, failing boards, it looked all like the same > error: `.next = NULL` generated by sconfig. that's true, but fixing that revealed that actually most of the the ramstage state machine does not loop over link_list busses. Only the allocator does not. -- To view, visit https://review.coreboot.org/c/coreboot/+/62965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757957d6470111651f88b550df06c4c953b777f Gerrit-Change-Number: 62965 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:27:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/device_tree.c: zero-initialize new DT nodes
by Julius Werner (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62928 ) Change subject: lib/device_tree.c: zero-initialize new DT nodes ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Right, this was a mistake when porting the code from depthcharge -- it's supposed to be zero-initialized. Good find! -- To view, visit https://review.coreboot.org/c/coreboot/+/62928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38a7ec1949d80f7a2564fac380ce94de6056a0c7 Gerrit-Change-Number: 62928 Gerrit-PatchSet: 1 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:22:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Turn off gpp clock request for disabled devices
by Felix Held (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Martin L Roth, Marshall Dawson, Paul Menzel, Fred Reitberger, Rob Barnes, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61259 ) Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices ...................................................................... Patch Set 35: (2 comments) File src/soc/amd/cezanne/fch.c: https://review.coreboot.org/c/coreboot/+/61259/comment/8ad9318c_2f790a00 PS34, Line 200: && (id != 0x0000ffff) && (id != 0xffff0000) > Done ah, that's where those cases were from. even though i don't expect those to happen, it's a good idea to also check for those two odd combinations File src/soc/amd/cezanne/fch.c: https://review.coreboot.org/c/coreboot/+/61259/comment/fc2e9fb9_5de7dc0f PS35, Line 185: break replace break with continue? that will processing the next dxio descriptors instead of just jumping out of the for loop and not looking at the remaining dxio descriptors -- To view, visit https://review.coreboot.org/c/coreboot/+/61259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77389372c60bdec572622a3b49484d4789fd4e4c Gerrit-Change-Number: 61259 Gerrit-PatchSet: 35 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:22:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Robert Zieba <robertzieba(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]device/device.h: Remove struct bus linked list
by Nico Huber (Code Review) 21 Mar '22

21 Mar '22

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62965 ) Change subject: [RFC]device/device.h: Remove struct bus linked list ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I only clicked a few random, failing boards, it looked all like the same error: `.next = NULL` generated by sconfig. -- To view, visit https://review.coreboot.org/c/coreboot/+/62965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757957d6470111651f88b550df06c4c953b777f Gerrit-Change-Number: 62965 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:18:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: device/resource_allocator_v4.c: Loop over struct bus linked list
by Arthur Heymans (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62967 to review the following change. Change subject: device/resource_allocator_v4.c: Loop over struct bus linked list ...................................................................... device/resource_allocator_v4.c: Loop over struct bus linked list The allocator code assumes only one downstream bus per device on .link_list. Even though this is the most common setup this would be consistent with the rest of device.c. Change-Id: Ie4eec48c7008c19896996a40b1fa9b09008b3354 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/device/resource_allocator_common.c M src/device/resource_allocator_v4.c 2 files changed, 35 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/62967/1 diff --git a/src/device/resource_allocator_common.c b/src/device/resource_allocator_common.c index 1cb1895..bf5ceef 100644 --- a/src/device/resource_allocator_common.c +++ b/src/device/resource_allocator_common.c @@ -40,7 +40,7 @@ } } -const struct device *largest_resource(struct bus *bus, +const struct device *largest_resource(struct bus *bus_list, struct resource **result_res, unsigned long type_mask, unsigned long type) @@ -52,8 +52,9 @@ state.result = NULL; state.seen_last = 0; - search_bus_resources(bus, type_mask, type, pick_largest_resource, - &state); + for (struct bus *bus = bus_list; bus; bus = bus->next) + search_bus_resources(bus, type_mask, type, pick_largest_resource, + &state); *result_res = state.result; return state.result_dev; diff --git a/src/device/resource_allocator_v4.c b/src/device/resource_allocator_v4.c index 6f8159e..2a21e0b 100644 --- a/src/device/resource_allocator_v4.c +++ b/src/device/resource_allocator_v4.c @@ -55,7 +55,7 @@ resource_t base; bool first_child_res = true; const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH; - struct bus *bus = bridge->link_list; + struct bus *bus_list = bridge->link_list; child_res = NULL; @@ -73,7 +73,7 @@ dev_path(bridge), resource2str(bridge_res), bridge_res->size, bridge_res->align, bridge_res->gran, bridge_res->limit); - while ((child = largest_resource(bus, &child_res, type_mask, type_match))) { + while ((child = largest_resource(bus_list, &child_res, type_mask, type_match))) { /* Size 0 resources can be skipped. */ if (!child_res->size) @@ -153,7 +153,7 @@ { const struct device *child; struct resource *res; - struct bus *bus = bridge->link_list; + struct bus *bus; const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH; for (res = bridge->resource_list; res; res = res->next) { @@ -167,10 +167,12 @@ * Ensure that the resource requirements for all downstream bridges are * gathered before updating the window for current bridge resource. */ - for (child = bus->children; child; child = child->sibling) { - if (!dev_has_children(child)) - continue; - compute_bridge_resources(child, type_match, print_depth + 1); + for (bus = bridge->link_list; bus; bus = bus->next) { + for (child = bus->children; child; child = child->sibling) { + if (!dev_has_children(child)) + continue; + compute_bridge_resources(child, type_match, print_depth + 1); + } } /* @@ -202,16 +204,17 @@ if (domain->link_list == NULL) return; - for (child = domain->link_list->children; child; child = child->sibling) { + for (struct bus *bus = domain->link_list; bus; bus = bus->next) { + for (child = bus->children; child; child = child->sibling) { + /* Skip if this is not a bridge or has no children under it. */ + if (!dev_has_children(child)) + continue; - /* Skip if this is not a bridge or has no children under it. */ - if (!dev_has_children(child)) - continue; - - compute_bridge_resources(child, IORESOURCE_IO, print_depth); - compute_bridge_resources(child, IORESOURCE_MEM, print_depth); - compute_bridge_resources(child, IORESOURCE_MEM | IORESOURCE_PREFETCH, + compute_bridge_resources(child, IORESOURCE_IO, print_depth); + compute_bridge_resources(child, IORESOURCE_MEM, print_depth); + compute_bridge_resources(child, IORESOURCE_MEM | IORESOURCE_PREFETCH, print_depth); + } } } @@ -362,13 +365,13 @@ * order until all resources of given type are allocated address space within the current * resource window. */ -static void allocate_child_resources(struct bus *bus, struct memranges *ranges, +static void allocate_child_resources(struct bus *bus_list, struct memranges *ranges, unsigned long type_mask, unsigned long type_match) { struct resource *resource = NULL; const struct device *dev; - while ((dev = largest_resource(bus, &resource, type_mask, type_match))) { + while ((dev = largest_resource(bus_list, &resource, type_mask, type_match))) { if (!resource->size) continue; @@ -427,12 +430,9 @@ update_constraints(ranges, dev, res); } - bus = dev->link_list; - if (bus == NULL) - return; - - for (child = bus->children; child != NULL; child = child->sibling) - avoid_fixed_resources(ranges, child, mask_match); + for (bus = dev->link_list; bus; bus = bus->next) + for (child = bus->children; child != NULL; child = child->sibling) + avoid_fixed_resources(ranges, child, mask_match); } static void constrain_domain_resources(const struct device *domain, struct memranges *ranges, @@ -512,7 +512,7 @@ { struct memranges ranges; const struct resource *res; - struct bus *bus = bridge->link_list; + struct bus *bus; unsigned long type_match; struct device *child; const unsigned long type_mask = IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH; @@ -527,15 +527,17 @@ type_match = res->flags & type_mask; setup_resource_ranges(bridge, res, type_match, &ranges); - allocate_child_resources(bus, &ranges, type_mask, type_match); + allocate_child_resources(bridge->link_list, &ranges, type_mask, type_match); cleanup_resource_ranges(bridge, &ranges, res); } - for (child = bus->children; child; child = child->sibling) { - if (!dev_has_children(child)) - continue; + for (bus = bridge->link_list; bus; bus = bus->next) { + for (child = bus->children; child; child = child->sibling) { + if (!dev_has_children(child)) + continue; - allocate_bridge_resources(child); + allocate_bridge_resources(child); + } } } -- To view, visit https://review.coreboot.org/c/coreboot/+/62967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4eec48c7008c19896996a40b1fa9b09008b3354 Gerrit-Change-Number: 62967 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/spd_tools: Add support for exclusive IDs
by Felix Held (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Robert Zieba, Raul Rangel, Paul Menzel, Reka Norman, Nick Vaccaro. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62905 ) Change subject: util/spd_tools: Add support for exclusive IDs ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: > This change is not impacting the default behavior of the SPD generation tool or SPD ID generation to […] oh, i compared K4U6E3S4AB-MGCL with K4UBE3D4AB-MGCL and not each with the similar but not quite the same dram chips. so unless there's something else to put in the spd that is different for the dram chips, this seems to be the way to go even though i don't like the idea too much -- To view, visit https://review.coreboot.org/c/coreboot/+/62905 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife5afe32337f69bc06451ce16238c7a83bc983c8 Gerrit-Change-Number: 62905 Gerrit-PatchSet: 8 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:10:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: Extend BIOS Directory Table Entries | Update PSP Firmware Integration...
by Al Hirani (Code Review) 21 Mar '22

21 Mar '22

Attention is currently required from: Felix Singer, Marshall Dawson, Felix Held. Al Hirani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62910 ) Change subject: Extend BIOS Directory Table Entries | Update PSP Firmware Integration Guide Documentation ...................................................................... Patch Set 5: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62910/comment/30b0bea4_15089fd8 PS1, Line 7: Update Coreboot.org PSP Firmware Integration Guide Documentation > docs/soc/amd: Update PSP Firmware Integration Guide Done https://review.coreboot.org/c/coreboot/+/62910/comment/c7c12a9b_ebb8ed97 PS1, Line 9: Update Coreboot.org PSP Firmware Documentation with current internal PSP documentation > Clearly state the changes that are being made and provide an explanation. Done File Documentation/soc/amd/psp_integration.md: https://review.coreboot.org/c/coreboot/+/62910/comment/33b9cf1b_93f6eaf1 PS1, Line 306: | | | | content is placed in > Missing character at the end of the line Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62910 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I677f86614b0fdc6377fb2e27932ed3a8ded27102 Gerrit-Change-Number: 62910 Gerrit-PatchSet: 5 Gerrit-Owner: Al Hirani <al.hirani13(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 21 Mar 2022 20:02:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]device/device.h: Remove struct bus linked list
by Arthur Heymans (Code Review) 21 Mar '22

21 Mar '22

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/62965 ) Change subject: [RFC]device/device.h: Remove struct bus linked list ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/62965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757957d6470111651f88b550df06c4c953b777f Gerrit-Change-Number: 62965 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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coreboot-gerrit March 2022