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Change subject: mb/google/guybrush: Update APCB file
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Patch Set 5: Verified+1 Code-Review+2
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Change subject: mb/google/guybrush: Update APCB file
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Subrata Banik has uploaded a new patch set (#6) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/62772 )
Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
......................................................................
soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
List of changes:
1. Add required Meteor Lake SoC programming till bootblock
2. Include only required headers into include/soc
3. Include MTL-P related DID, BDF
4. Ref: Processor EDS documents
vol1 #621483, vol2 #640858
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com>
Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4
---
A src/soc/intel/meteorlake/Kconfig
A src/soc/intel/meteorlake/Makefile.inc
A src/soc/intel/meteorlake/bootblock/bootblock.c
A src/soc/intel/meteorlake/bootblock/pch.c
A src/soc/intel/meteorlake/bootblock/report_platform.c
A src/soc/intel/meteorlake/include/soc/bootblock.h
A src/soc/intel/meteorlake/include/soc/espi.h
A src/soc/intel/meteorlake/include/soc/iomap.h
A src/soc/intel/meteorlake/include/soc/p2sb.h
A src/soc/intel/meteorlake/include/soc/pci_devs.h
A src/soc/intel/meteorlake/include/soc/pcr_ids.h
A src/soc/intel/meteorlake/include/soc/pm.h
A src/soc/intel/meteorlake/include/soc/smbus.h
13 files changed, 1,035 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/62772/6
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Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/62963 )
Change subject: mb/google/guybrush: Update APCB file
......................................................................
Patch Set 5:
(1 comment)
File mainboard/google/guybrush/Release.txt:
https://review.coreboot.org/c/blobs/+/62963/comment/5018380d_12aea69f
PS4, Line 8: Set number of SPD
> Increase the number of SPD slots from 4 to 16 […]
Done
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Set Ready For Review
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Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS4:
> Any guidance/documentation on HOW-TOs for stage-wise Make build setup? Wondering when building coreboot.rom if it stubs out stages if not included.
I have tried creating a skeleton MTL board and select MTL SoC code to allow building only the bootblock code that you have added here.But unfortunately, it's too much changes that I had to make to resolve the code dependencies to allow this bootblock code to get successfully compiled.
I have noticed the main reasons for those compilation errors are due to inclusion of common code from SoC block, each common code block has some dependencies over other header files or the code block which is not added by this CL, hence, i had to keep on adding those, for example this CL selects `PCH_BASE` Kconfig from SoC code, now `PCH_BASE` kconfig internally selects GPIO Common code block, and GPIO common code block expects SoC code to have GPIO support. This has become circular dependencies.
IMO, we unfortunately need to add SoC code incrementally without hooking a MB code till we have SOC code ready with `ramstage` code changes.
Having said that, this CL need lots of rework to add only the bootblock code and corresponding header (which is not the case with this CL), so, please keep on adding those header files when you need those, rather dumping everything at once.
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Change subject: mb/google/guybrush: Update APCB file
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