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Change subject: mb/google/brya/var/taniks: Use TSR2 to replace TSR3
......................................................................
mb/google/brya/var/taniks: Use TSR2 to replace TSR3
Change settings according to thermal team test results
BUG=b:215033682
TEST=build and tested fan works normally on taniks
Change-Id: I567815782ece4ab7fcec7da6b787ee9eec27aba4
Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/taniks/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/62952/2
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Change subject: drivers/tpm/cr50: Use cr50_get_firmware_version in get_board_cfg
......................................................................
Patch Set 3:
(2 comments)
File src/drivers/tpm/cr50.c:
https://review.coreboot.org/c/coreboot/+/62964/comment/5befcabb_819cbe4a
PS3, Line 16: static struct cr50_firmware_version cr50_firmware_version;
Maybe just make this a static local in cr50_get_firmware_version() so it can't be used uninitialized?
https://review.coreboot.org/c/coreboot/+/62964/comment/655a1a72_8fa4cd6b
PS3, Line 104: if (!cr50_fw_supports_board_cfg(&cr50_firmware_version))
Does this have the same issue?
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Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62949/comment/bed204f2_d22db22a
PS3, Line 12:
> I am unable to access it. Plesae add the document name, revision and chapter to the commit message.
Done
https://review.coreboot.org/c/coreboot/+/62949/comment/2774ceaa_1ba8607d
PS3, Line 14:
> `TEST=...` […]
Done
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62949
to look at the new patch set (#7).
Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
......................................................................
mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
This CL adds the delay time into the RTD3 sequence, which will turn
off the eMMC controller (a true D3cold state) during the RTD3 sequence.We checked power on sequence requires enable pin prior to reset pin, added delay to meet the sequence and test passed on various eMMC SKUs.Base on BH799BB_Preliminary_DS_R079_20201124.pdf in chapter 7.2.
BUG=b:224648680
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test suspend stress 2500 cycles passed on primus
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: I1ab4fdf0ee73b819b3c203e995ac9d5ae0d24bd0
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62949/7
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
......................................................................
mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
This CL adds the delay time into the RTD3 sequence, which will turn
off the eMMC controller (a true D3cold state) during the RTD3 sequence.We checked power on sequence requires enable pin prior to reset pin, added delay to meet the sequence and test passed on various eMMC SKUs.
Base on BH799BB_Preliminary_DS_R079_20201124.pdf in chapter 7.2.
BUG=b:224648680
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test suspend stress 2500 cycles passed on primus
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: I1ab4fdf0ee73b819b3c203e995ac9d5ae0d24bd0
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62949/6
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
......................................................................
mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
This CL adds the delay time into the RTD3 sequence, which will turn
off the eMMC controller (a true D3cold state) during the RTD3 sequence.We checked power on sequence requires enable pin prior to reset pin,
added delay to meet the sequence and test passed on various eMMC SKUs.
Base on BH799BB_Preliminary_DS_R079_20201124.pdf in chapter 7.2.
BUG=b:224648680
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test suspend stress 2500 cycles passed on primus
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: I1ab4fdf0ee73b819b3c203e995ac9d5ae0d24bd0
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62949/5
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
......................................................................
mb/google/brya/var/primus{4es}: add delay time to rtd3-cold
This CL adds the delay time into the RTD3 sequence, which will turn
off the eMMC controller (a true D3cold state) during the RTD3
sequence.We checked power on sequence requires enable pin prior to reset pin,
added delay to meet the sequence and test passed on various eMMC SKUs.
Base on BH799BB_Preliminary_DS_R079_20201124.pdf in chapter 7.2.
BUG=b:224648680
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test suspend stress 2500 cycles passed on primus
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: I1ab4fdf0ee73b819b3c203e995ac9d5ae0d24bd0
---
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/62949/4
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Change subject: ec/google: Add PSRC and PBOK method
......................................................................
Patch Set 2:
(1 comment)
File src/ec/google/chromeec/ec_dptf_helpers.c:
https://review.coreboot.org/c/coreboot/+/62945/comment/8c3646e2_b2965608
PS2, Line 138: cpigen_write_store();
: acpigen_emit_byte(ARG0_OP);
: acpigen_emit_byte(LOCAL0_OP);
:
: acpigen_emit_byte(AND_OP);
: acpigen_emit_byte(LOCAL0_OP);
: acpigen_write_byte(0x0F);
: acpigen_emit_byte(LOCAL0_OP);
> I think what Eric means if you can simplify this to: […]
yes, thanks! This is what I mean :p
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Change subject: drivers/intel/dptf: Add support for Power participant
......................................................................
Patch Set 2: -Code-Review
(1 comment)
File src/drivers/intel/dptf/dptf.c:
https://review.coreboot.org/c/coreboot/+/62944/comment/801f867b_16669432
PS2, Line 387: acpigen_write_device_end(); /* TPWR Power Participant Device */
> this is kind of awkward, having the write_device_end() in a separate function, why can't this just g […]
oh true.
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