coreboot-gerrit March 2022

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by Tim Wawrzynczak (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Martin L Roth, Kevin Chang, Kane Chen. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 14: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/62919/comment/40218d90_c5eae1bc PS14, Line 656: PcieRpAspm `pcie_rp_aspm` -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 14 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 22 Mar 2022 04:03:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/{}: Add SBU orientation property for Type C Mux
by Meera Ravindranath (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Prashant Malani, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Deepti Deshatty, Prashant Malani, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61622 to look at the new patch set (#6). Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux ...................................................................... mb/google/brya/{}: Add SBU orientation property for Type C Mux BUG=b:214430691 BRANCH=firmware-brya-14505.B TEST=On Redrix, type-C display verified with normal and inverted orientation. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9 --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/banshee/overridetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb M src/mainboard/google/brya/variants/felwinter/overridetree.cb M src/mainboard/google/brya/variants/kano/overridetree.cb M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/redrix/overridetree.cb M src/mainboard/google/brya/variants/taeko/overridetree.cb M src/mainboard/google/brya/variants/taniks/overridetree.cb M src/mainboard/google/brya/variants/vell/overridetree.cb M src/mainboard/google/brya/variants/volmar/overridetree.cb 11 files changed, 44 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/61622/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/61622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9 Gerrit-Change-Number: 61622 Gerrit-PatchSet: 6 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/{}: Add SBU orientation property for Type C Mux
by Meera Ravindranath (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Prashant Malani, Nick Vaccaro. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61622 ) Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Sorry, I meant Meera. Hi Prashant, we do not have other boards here in BA and could verify only on redrix. Is there a way we could get this tested on other boards? -- To view, visit https://review.coreboot.org/c/coreboot/+/61622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9 Gerrit-Change-Number: 61622 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 04:03:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Prashant Malani <pmalani(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by Kevin Chang (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Martin L Roth, Kevin Chang, Kane Chen, Tim Wawrzynczak. Kevin Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 14: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/62919/comment/6a4ca841_68af56b0 PS13, Line 303: * that the mainboard setting does not disable ASPM incorrectly, chip > > trailing whitespace […] Update in Latest patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 14 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 04:00:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by Martin L Roth (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Kane Chen, Tim Wawrzynczak. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 14: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/62919/comment/e2e9d8d7_caa28d5b PS13, Line 303: * that the mainboard setting does not disable ASPM incorrectly, chip > > trailing whitespace […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 14 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 04:00:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by Martin L Roth (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Kane Chen, Tim Wawrzynczak. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/62919/comment/196ec44e_bb00a929 PS13, Line 303: * that the mainboard setting does not disable ASPM incorrectly, chip > trailing whitespace Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 13 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 04:00:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by build bot (Jenkins) (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Kane Chen, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/alderlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144396): https://review.coreboot.org/c/coreboot/+/62919/comment/80737d73_5580d4b9 PS13, Line 303: * that the mainboard setting does not disable ASPM incorrectly, chip trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 13 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 03:58:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by build bot (Jenkins) (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Kane Chen, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Patch Set 12: (1 comment) File src/soc/intel/alderlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144395): https://review.coreboot.org/c/coreboot/+/62919/comment/6f85d16e_f6f05fb6 PS12, Line 303: * that the mainboard setting does not disable ASPM incorrectly, chip trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 12 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 03:57:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config.
by Peichao Wang (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Kane Chen, Tim Wawrzynczak. Peichao Wang has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/62919 ) Change subject: soc/intel/{adl,common}: Add ASPM setting in pcie_rp_config. ...................................................................... Removed Code-Review+2 by Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/62919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19b5f3dc8d95e153301d777492c921ce582ba988 Gerrit-Change-Number: 62919 Gerrit-PatchSet: 13 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: deleteVote

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Change in coreboot[master]: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
by Peichao Wang (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Kevin Chang, Tim Wawrzynczak. Peichao Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62973 ) Change subject: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ed790c833d1c01a30aed0fd09cac260a3837ead Gerrit-Change-Number: 62973 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 03:54:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2022