coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: sec/intel/txt: Use variable
by Patrick Rudolph (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Arthur Heymans. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63062 ) Change subject: sec/intel/txt: Use variable ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63062 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ee61fb9533b90ddb1a1592d5d9945761739ddb6 Gerrit-Change-Number: 63062 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 27 Mar 2022 09:20:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: nb/intel/sandybridge: Support setting PCI bars above 4G
by Paul Menzel (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Arthur Heymans, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51060 ) Change subject: nb/intel/sandybridge: Support setting PCI bars above 4G ...................................................................... Patch Set 4: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51060/comment/14e55e26_7fb69bab PS4, Line 10: Linux relocates and possibly resizes the BARs below : 4G Only when using ACPI? https://review.coreboot.org/c/coreboot/+/51060/comment/cbd93eba_e7c5aeaa PS4, Line 12: Tested how? -- To view, visit https://review.coreboot.org/c/coreboot/+/51060 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1be9a2c1e03e5465fd3b164469511eca60edc5a Gerrit-Change-Number: 51060 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 27 Mar 2022 09:02:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [TESTONLY]Kconfig: Build all board with clang
by Paul Menzel (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63082 ) Change subject: [TESTONLY]Kconfig: Build all board with clang ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: I successfully tested this on the ASUS F2A85-M PRO with Idec3832d8d1ab95ae9747ce87792ee7b474540c7, and Debian’s clang. $ clang --version Debian clang version 13.0.1-3+b1 Target: x86_64-pc-linux-gnu Thread model: posix InstalledDir: /usr/bin [1]: https://review.coreboot.org/c/coreboot/+/54669 -- To view, visit https://review.coreboot.org/c/coreboot/+/63082 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia35f9cfb16ddc6a248baf2ee6aa864a3ac4e9b41 Gerrit-Change-Number: 63082 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 27 Mar 2022 07:22:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by Paul Menzel (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Felix Singer, Tim Wawrzynczak, Michael Niewöhner. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 ) Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... Patch Set 12: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59548/comment/f6138e6d_437c3c17 PS8, Line 26: TianoCore > yes, Kconfig default Done https://review.coreboot.org/c/coreboot/+/59548/comment/1e46a024_9fb37c6e PS8, Line 56: > Ack Too make it crystal clear, maybe mention “vendor firmware”. -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 12 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Sun, 27 Mar 2022 07:16:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Add timestamp to measure PERST# time
by Yu-Ping Wu (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62933 ) Change subject: soc/mediatek: Add timestamp to measure PERST# time ...................................................................... Patch Set 10: (1 comment) File src/soc/mediatek/common/pcie.c: https://review.coreboot.org/c/coreboot/+/62933/comment/55844648_59b3ada2 PS10, Line 249: mtk_pcie_reset(conf->base + PCIE_RST_CTRL_REG, true); > no need to mdelay 100 - the perst_time_us (0) will sleep enough time later. right. a warning message is still preferred -- To view, visit https://review.coreboot.org/c/coreboot/+/62933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2b7b6174abdf951af5796ab5ed141c45f32fc71 Gerrit-Change-Number: 62933 Gerrit-PatchSet: 10 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Sun, 27 Mar 2022 05:22:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Add a configurate "USE_CBMEM_DRAM_INFO"
by Hung-Te Lin (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Rex-BC Chen, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63109 ) Change subject: soc/mediatek: Add a configurate "USE_CBMEM_DRAM_INFO" ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63109/comment/56153f58_24e9cdf7 PS4, Line 9: There is a assertion error for platforms which dram_info are not : implemented in blob, Try to not only mention "assertion error" because people can't tell what's causing that. Also not mentioning blob because we should focus on what (memory init) instead of how (blob impl). Try something like this: The memory initialization reference code didn't support returning DRAM information in the old platforms, for example MT8192 and MT8195. So we have to add a new configuration USE_CBMEM_DRAM_INFO to make sure the common code will try to get DRAM information on new platforms supporting that. -- To view, visit https://review.coreboot.org/c/coreboot/+/63109 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebe9ea0c1d01890b09fdf586813d85adde9702e1 Gerrit-Change-Number: 63109 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sun, 27 Mar 2022 03:12:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/cherry: support max98390 audio amp
by Hung-Te Lin (Code Review) 27 Mar '22

27 Mar '22

Attention is currently required from: Rex-BC Chen, Paul Menzel, Trevor Wu, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63083 ) Change subject: mb/google/cherry: support max98390 audio amp ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/cherry/chromeos.c: https://review.coreboot.org/c/coreboot/+/63083/comment/581f1e8e_49324b6c PS4, Line 26: > or […] the later one looks even better. Can you do that? -- To view, visit https://review.coreboot.org/c/coreboot/+/63083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b6bc5a5520292dd502b0389217f5062479b4490 Gerrit-Change-Number: 63083 Gerrit-PatchSet: 7 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Trevor Wu <trevor.wu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sun, 27 Mar 2022 02:18:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Update audio and adsp power control
by Hung-Te Lin (Code Review) 27 Mar '22

27 Mar '22

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63106 ) Change subject: soc/mediatek/mt8195: Update audio and adsp power control ...................................................................... soc/mediatek/mt8195: Update audio and adsp power control To control I2S in MT8195 for dojo project, we need to enable adsp power before audio power. Therefore, we need to update bus protection steps to correct the setting. TEST=build pass BUG=b:204391159 BRANCH=cherry Signed-off-by: Chun-Jie Chen <chun-jie.chen(a)mediatek.com> Change-Id: I0bcf1ddeebf0d3df0a1d6b22273123be1aaf85a8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63106 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/mediatek/mt8195/include/soc/spm.h M src/soc/mediatek/mt8195/mtcmos.c 2 files changed, 16 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/mt8195/include/soc/spm.h b/src/soc/mediatek/mt8195/include/soc/spm.h index 945852a..25f6d6b 100644 --- a/src/soc/mediatek/mt8195/include/soc/spm.h +++ b/src/soc/mediatek/mt8195/include/soc/spm.h @@ -946,6 +946,7 @@ check_member(mtk_spm_regs, pwr_status, 0x016c); check_member(mtk_spm_regs, audio_pwr_con, 0x0358); +check_member(mtk_spm_regs, adsp_pwr_con, 0x0360); check_member(mtk_spm_regs, ap_mdsrc_req, 0x043c); check_member(mtk_spm_regs, ulposc_con, 0x644); @@ -1000,10 +1001,16 @@ static const struct power_domain_data audio[] = { { + .pwr_con = &mtk_spm->adsp_pwr_con, + .pwr_sta_mask = 0x1 << 10, + .sram_pdn_mask = 0x1 << 8, + .sram_ack_mask = 0x1 << 12, + }, + { .pwr_con = &mtk_spm->audio_pwr_con, - .pwr_sta_mask = AUDIO_PWR_STA_MASK, - .sram_pdn_mask = AUDIO_SRAM_PDN_MASK, - .sram_ack_mask = AUDIO_SRAM_ACK_MASK, + .pwr_sta_mask = 0x1 << 8, + .sram_pdn_mask = 0x1 << 8, + .sram_ack_mask = 0x1 << 12, }, }; diff --git a/src/soc/mediatek/mt8195/mtcmos.c b/src/soc/mediatek/mt8195/mtcmos.c index e194441..cc2edb8 100644 --- a/src/soc/mediatek/mt8195/mtcmos.c +++ b/src/soc/mediatek/mt8195/mtcmos.c @@ -26,7 +26,9 @@ VDOSYS1_PROT_STEP_2_MASK = 0x00400000, VDOSYS1_PROT_STEP_1_MASK = 0xC0000000, - AUDIO_PROT_STEP_1_MASK = 0x00000600, + ADSP_PROT_STEP_1_MASK = 0x0001D000, + + AUDIO_PROT_STEP_1_MASK = 0x00000A00, }; void mtcmos_protect_display_bus(void) @@ -73,5 +75,8 @@ void mtcmos_protect_audio_bus(void) { write32(&mt8195_infracfg_ao->infra_topaxi_protecten_clr_2, + ADSP_PROT_STEP_1_MASK); + + write32(&mt8195_infracfg_ao->infra_topaxi_protecten_clr_2, AUDIO_PROT_STEP_1_MASK); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bcf1ddeebf0d3df0a1d6b22273123be1aaf85a8 Gerrit-Change-Number: 63106 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chun-Jie Chen <chun-jie.chen(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: src/arch/arm/include/armv7/arch/cache.h:
by Athanasios Kastoras (Code Review) 27 Mar '22

27 Mar '22

Athanasios Kastoras has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63125 ) Change subject: src/arch/arm/include/armv7/arch/cache.h: ...................................................................... src/arch/arm/include/armv7/arch/cache.h: Remove unnecessary whitespace before closing parenthesis at inline assembly statements on lines 237 and 252 Signed-off-by: Thanos Kastoras <akastoras(a)uth.gr> Change-Id: I7aa8174837ff7d20a8217d75e2028a62a381aede --- M src/arch/arm/include/armv7/arch/cache.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/63125/1 diff --git a/src/arch/arm/include/armv7/arch/cache.h b/src/arch/arm/include/armv7/arch/cache.h index e332c31..6054fed 100644 --- a/src/arch/arm/include/armv7/arch/cache.h +++ b/src/arch/arm/include/armv7/arch/cache.h @@ -234,7 +234,7 @@ * Note: L2CTLR can only be written when the L2 memory system * is idle, ie before the MMU is enabled. */ - asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory" ); + asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory"); isb(); } @@ -249,7 +249,7 @@ /* write L2 Auxiliary Control Register (L2ACTLR) */ static inline void write_l2actlr(uint32_t val) { - asm volatile ("mcr p15, 1, %0, c15, c0, 0" : : "r" (val) : "memory" ); + asm volatile ("mcr p15, 1, %0, c15, c0, 0" : : "r" (val) : "memory"); isb(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aa8174837ff7d20a8217d75e2028a62a381aede Gerrit-Change-Number: 63125 Gerrit-PatchSet: 1 Gerrit-Owner: Athanasios Kastoras <thanoskastoras(a)gmail.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb: add new board clevo/tgl-u/l140mu
by build bot (Jenkins) (Code Review) 26 Mar '22

26 Mar '22

Attention is currently required from: Felix Singer, Paul Menzel, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 ) Change subject: mb: add new board clevo/tgl-u/l140mu ...................................................................... Patch Set 12: (6 comments) File src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/1e2c86c6_9ffaee77 PS12, Line 94: PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* I2C1_SDA / PCH_I2C_SDA (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/ad4fe3a7_12fccbe9 PS12, Line 95: PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* I2C1_SCL / PCH_I2C_SCL (retimer rom) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/f32f2034_00f9e97b PS12, Line 99: PAD_NC(GPP_C23, UP_20K), /* GPP_C23 / PCH_GPP_C23 (WLAN_WAKEUP#) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/bdfb4c88_47d199f2 PS12, Line 104: PAD_NC(GPP_D2, NONE), /* LEDKB_DET# (unused; not sold w/o KBLED) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/dd619fd0_326b6ee0 PS12, Line 107: PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* SRCCLKREQ0# / SSD1_CLKREQ# (for SSD2!) */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144801): https://review.coreboot.org/c/coreboot/+/59548/comment/c8e5b1ae_487df729 PS12, Line 110: PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* SRCCLKREQ3# / SSD2_CLKREQ# (for SSD1!) */ line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620 Gerrit-Change-Number: 59548 Gerrit-PatchSet: 12 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Sat, 26 Mar 2022 18:05:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022