coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: drivers/intel/fsp1_1: Reduce scope of functions
by Elyes Haouas (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Patrick Rudolph, Lee Leahy, Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63203 ) Change subject: drivers/intel/fsp1_1: Reduce scope of functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63203 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81007295ed2d1592c4d829cbb277c0726d89ea4b Gerrit-Change-Number: 63203 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 30 Mar 2022 18:57:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: tpm: Accept Google Ti50 TPM DID:VID
by Jes Klinke (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Christian Walter, Julius Werner. Hello build bot (Jenkins), Christian Walter, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63158 to look at the new patch set (#3). Change subject: tpm: Accept Google Ti50 TPM DID:VID ...................................................................... tpm: Accept Google Ti50 TPM DID:VID A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> --- M src/drivers/crb/tis.c M src/drivers/i2c/tpm/cr50.c M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/cr50.c M src/drivers/tpm/cr50.h 5 files changed, 95 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63158/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 3 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jett Rink <jettrink(a)chromium.org> Gerrit-CC: Jett Rink <jettrink(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: tpm: Accept Google Ti50 TPM DID:VID
by build bot (Jenkins) (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Christian Walter, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63158 ) Change subject: tpm: Accept Google Ti50 TPM DID:VID ...................................................................... Patch Set 2: (1 comment) File src/drivers/tpm/cr50.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145041): https://review.coreboot.org/c/coreboot/+/63158/comment/3f542636_a2acb6ef PS2, Line 171: switch (ver.type) { switch and case should be at the same indent -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 2 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jett Rink <jettrink(a)chromium.org> Gerrit-CC: Jett Rink <jettrink(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 30 Mar 2022 18:09:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: tpm: Accept Google Ti50 TPM DID:VID
by Jes Klinke (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Jes Klinke, Christian Walter, Julius Werner. Hello build bot (Jenkins), Christian Walter, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63158 to look at the new patch set (#2). Change subject: tpm: Accept Google Ti50 TPM DID:VID ...................................................................... tpm: Accept Google Ti50 TPM DID:VID A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> --- M src/drivers/crb/tis.c M src/drivers/i2c/tpm/cr50.c M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/cr50.c M src/drivers/tpm/cr50.h 5 files changed, 95 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63158/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 2 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jett Rink <jettrink(a)chromium.org> Gerrit-CC: Jett Rink <jettrink(a)google.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek/early_init: Fix function return type
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Hung-Te Lin, Paul Menzel, Jianjun Wang. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63190 ) Change subject: soc/mediatek/early_init: Fix function return type ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c361828362c2dfec91358ad8a420f5360243da0 Gerrit-Change-Number: 63190 Gerrit-PatchSet: 3 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 18:01:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: Makefile.inc: Add the x86 bootblock as a regular cbfs file
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Arthur Heymans, Martin Roth, Julius Werner, Yu-Ping Wu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56122 ) Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file ...................................................................... Patch Set 3: (1 comment) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/56122/comment/e80d7b2e_581c6d64 PS3, Line 840: This top aligns files of type bootblock, assuming that only x86 uses those > Instead of making this assumption, maybe add a Kconfig option that's selected by x86? Up to you. Would --xip not achieve the same without needing this extra code. That should do it for Intel. I'm not exactly sure how that works for newer AMD systems. Isn't the bootblock cbfs file unnecessary here as the it's embedded inside the PSP image? -- To view, visit https://review.coreboot.org/c/coreboot/+/56122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Gerrit-Change-Number: 56122 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 17:56:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: arch/x86/Kconfig: Drop obsolete fixed ramstage symbols
by Raul Rangel (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Arthur Heymans, Fred Reitberger, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63215 ) Change subject: arch/x86/Kconfig: Drop obsolete fixed ramstage symbols ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Oh great cleanup! I always wondered why we had these. -- To view, visit https://review.coreboot.org/c/coreboot/+/63215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01b2335d0b82bea8f885ee5ca9814351bbf2aa3c Gerrit-Change-Number: 63215 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 30 Mar 2022 17:45:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/octopus: Implement touchscreen,digitizer power sequencing
by build bot (Jenkins) (Code Review) 30 Mar '22

30 Mar '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63212 ) Change subject: mb/google/octopus: Implement touchscreen,digitizer power sequencing ...................................................................... Patch Set 1: (4 comments) File src/mainboard/google/octopus/variants/ampton/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145037): https://review.coreboot.org/c/coreboot/+/63212/comment/f3e9c7e2_e8e37863 PS1, Line 134: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 0, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_105 -- TOUCHSCREEN_RST */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145037): https://review.coreboot.org/c/coreboot/+/63212/comment/1a5910f0_e6dc7499 PS1, Line 194: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145037): https://review.coreboot.org/c/coreboot/+/63212/comment/2cbb6f6c_2f29b919 PS1, Line 201: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 1, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_TOUCHSCREEN */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145037): https://review.coreboot.org/c/coreboot/+/63212/comment/ec039bb3_48ad44b8 PS1, Line 296: PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 1, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_TOUCHSCREEN */ line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/63212 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia725b4054069c0a4f60afd7e0bca6e2fd5fdcbba Gerrit-Change-Number: 63212 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Mar 2022 17:42:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: Makefile.inc: Add the x86 bootblock as a regular cbfs file
by Martin Roth (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Arthur Heymans, Julius Werner, Yu-Ping Wu. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56122 ) Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file ...................................................................... Patch Set 3: (1 comment) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/56122/comment/9e2a2465_b0d24f29 PS3, Line 840: This top aligns files of type bootblock, assuming that only x86 uses those Instead of making this assumption, maybe add a Kconfig option that's selected by x86? Up to you. -- To view, visit https://review.coreboot.org/c/coreboot/+/56122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Gerrit-Change-Number: 56122 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 17:41:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: arch/x86/Kconfig: Drop obsolete fixed ramstage symbols
by Arthur Heymans (Code Review) 30 Mar '22

30 Mar '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63215 ) Change subject: arch/x86/Kconfig: Drop obsolete fixed ramstage symbols ...................................................................... arch/x86/Kconfig: Drop obsolete fixed ramstage symbols On x86 ramstage is always relocated at runtime in cbmem so there is no need to have this configurable in Kconfig. Change-Id: I01b2335d0b82bea8f885ee5ca9814351bbf2aa3c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/Kconfig M src/arch/x86/include/arch/memlayout.h M src/arch/x86/memlayout.ld M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld M src/soc/amd/picasso/Kconfig M src/soc/amd/sabrina/Kconfig 7 files changed, 4 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/63215/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 4052b2e..e9fce50 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -118,22 +118,6 @@ default n depends on ARCH_X86 -# Set the rambase for systems that still need it, only 5 chipsets as of -# Sep 2018. This value was 0x100000, chosen to match the entry point -# of Linux 2.2 in 1999. The new value, 14 MiB, makes a lot more sense -# for as long as we need it; with luck, that won't be much longer. -# In the long term, both RAMBASE and RAMTOP should be removed. -# This value leaves more than 1 MiB which is required for fam10 -# and broadwell_de. -config RAMBASE - hex - default 0xe00000 - -config RAMTOP - hex - default 0x1000000 - depends on ARCH_X86 - # Traditionally BIOS region on SPI flash boot media was memory mapped right below # 4G and it was the last region in the IFD. This way translation between CPU # address space to flash address was trivial. However some IFDs on newer SoCs diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h index aea5a7d..4f5d21a 100644 --- a/src/arch/x86/include/arch/memlayout.h +++ b/src/arch/x86/include/arch/memlayout.h @@ -3,10 +3,6 @@ #ifndef __ARCH_MEMLAYOUT_H #define __ARCH_MEMLAYOUT_H -#if (CONFIG_RAMTOP == 0) -# error "CONFIG_RAMTOP not configured" -#endif - /* Intel386 psABI requires a 16 byte aligned stack. */ #define ARCH_STACK_ALIGN_SIZE 16 diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld index a0b0f53..bbd5450 100644 --- a/src/arch/x86/memlayout.ld +++ b/src/arch/x86/memlayout.ld @@ -13,7 +13,8 @@ * conditionalize with macros. */ #if ENV_RAMSTAGE - RAMSTAGE(CONFIG_RAMBASE, 8M) + /* Relocated at runtime in cbmem so the address does not matter. */ + RAMSTAGE(64M, 8M) #elif ENV_ROMSTAGE /* The 1M size is not allocated. It's just for basic size checking. diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 48944c8..8522d3f 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -217,10 +217,6 @@ hex default 0x40000 if CBFS_PRELOAD -config RAMBASE - hex - default 0x10000000 - config RO_REGION_ONLY string depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index f17043b..4c2a740 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -111,7 +111,8 @@ EARLY_RESERVED_DRAM_END(.) - RAMSTAGE(CONFIG_RAMBASE, 8M) + /* Relocated at runtime in cbmem so the address does not matter. */ + RAMSTAGE(64M, 8M) } #if ENV_BOOTBLOCK diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 84af18c..b005f9b 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -207,10 +207,6 @@ Sets the size of DRAM allocation for verstage in linker script if running as a separate stage on x86. -config RAMBASE - hex - default 0x10000000 - config ECAM_MMCONF_BASE_ADDRESS default 0xF8000000 diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 8392e2f..6fd6ed7 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -221,10 +221,6 @@ hex default 0x40000 if CBFS_PRELOAD -config RAMBASE - hex - default 0x10000000 - config RO_REGION_ONLY string depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A -- To view, visit https://review.coreboot.org/c/coreboot/+/63215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01b2335d0b82bea8f885ee5ca9814351bbf2aa3c Gerrit-Change-Number: 63215 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022