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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56119
to look at the new patch set (#6).
Change subject: security/intel/cbnt/Makefile.inc: Improve build flow
......................................................................
security/intel/cbnt/Makefile.inc: Improve build flow
Using 'files_added::' is not needed any longer as all files have
already been added to the build. This has the advantage of showing all
final entries in the FIT table and CBFS during the build process as
adding the bpm to cbfs and fit is moved earlier.
Change-Id: I22aa140202f0665b7095a01cb138af4986aa9ac3
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/security/intel/cbnt/Makefile.inc
1 file changed, 8 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/56119/6
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Hello build bot (Jenkins), Martin Roth, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56122
to look at the new patch set (#4).
Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file
......................................................................
Makefile.inc: Add the x86 bootblock as a regular cbfs file
Files of type bootblock are now always top aligned. This assumes only
x86 ever uses cbfs file type bootblock.
As the cbfs header needs to be at a specific place and it can be
updated only later on, use a placeholder cbfs file.
Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
M src/Kconfig
M src/arch/x86/Makefile.inc
3 files changed, 15 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/56122/4
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Arthur Heymans has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/59132 )
Change subject: Makefile.inc: Update the master header pointer in a separate target
......................................................................
Makefile.inc: Update the master header pointer in a separate target
The makefiles don't like cbfs file names with spaces in them so update
the file name with '_' instead of spaces. To keep the master header at
the top of cbfs, add a placeholder.
Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
M src/security/vboot/Makefile.inc
M util/cbfstool/cbfstool.c
3 files changed, 25 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/59132/3
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Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63216 )
Change subject: soc/amd/common/block/i2c/i23c_pad_def.h: fix off by one in define
......................................................................
Patch Set 1: Code-Review+2
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63216 )
Change subject: soc/amd/common/block/i2c/i23c_pad_def.h: fix off by one in define
......................................................................
soc/amd/common/block/i2c/i23c_pad_def.h: fix off by one in define
I23C_PAD_CTRL_SLEW_N_SHIFT is 6 and not 7 which matches both with the
PPR #57243 revision 1.53 and with I23C_PAD_CTRL_SLEW_N_MASK which covers
both bits 6 and 7.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I622717bebaffe34b6df5e578b082dc10e2a98256
---
M src/soc/amd/common/block/i2c/i23c_pad_def.h
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/63216/1
diff --git a/src/soc/amd/common/block/i2c/i23c_pad_def.h b/src/soc/amd/common/block/i2c/i23c_pad_def.h
index 8973a0c..ae7f3d6 100644
--- a/src/soc/amd/common/block/i2c/i23c_pad_def.h
+++ b/src/soc/amd/common/block/i2c/i23c_pad_def.h
@@ -17,7 +17,7 @@
#define I23C_PAD_CTRL_RX_SEL_OFF (0 << I23C_PAD_CTRL_RX_SHIFT)
#define I23C_PAD_CTRL_RX_SEL_ON (3 << I23C_PAD_CTRL_RX_SHIFT)
#define I23C_PAD_CTRL_SLEW_N_MASK (BIT(6) | BIT(7))
-#define I23C_PAD_CTRL_SLEW_N_SHIFT 7
+#define I23C_PAD_CTRL_SLEW_N_SHIFT 6
#define I23C_PAD_CTRL_SLEW_N_DIS (0 << I23C_PAD_CTRL_SLEW_N_SHIFT)
#define I23C_PAD_CTRL_SLEW_N_FAST (3 << I23C_PAD_CTRL_SLEW_N_SHIFT)
#define I23C_PAD_CTRL_FALLSLEW_SEL_MASK (BIT(8) | BIT(9))
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Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56115 )
Change subject: cpu/intel/fit/Makefile.inc: Update add_intermediate deps
......................................................................
Abandoned
Not useful.
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Jett Rink has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63158 )
Change subject: tpm: Accept Google Ti50 TPM DID:VID
......................................................................
Patch Set 3:
(2 comments)
File src/drivers/tpm/cr50.c:
https://review.coreboot.org/c/coreboot/+/63158/comment/c37f9e87_a0b6187e
PS3, Line 67: if (version->type != GSC_CR50)
should we have a `printk` info here like down below in the function?
https://review.coreboot.org/c/coreboot/+/63158/comment/bab9b662_ea62c965
PS3, Line 214: ver->minor = 42;
why 42? if this is a placeholder, then we should have a TODO comment
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Change subject: drivers/intel/fsp2_0: Add provision to extract FSP Performance Data
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
Ping! 😊
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56122 )
Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file
......................................................................
Patch Set 3:
(1 comment)
File Makefile.inc:
https://review.coreboot.org/c/coreboot/+/56122/comment/d2621ae1_9e1afc46
PS3, Line 840: This top aligns files of type bootblock, assuming that only x86 uses those
> > Instead of making this assumption, maybe add a Kconfig option that's selected by x86? Up to you.
>
> Would --xip not achieve the same without needing this extra code. That should do it for Intel.
>
> I'm not exactly sure how that works for newer AMD systems. Isn't the bootblock cbfs file unnecessary here as the it's embedded inside the PSP image?
Sorry for the noise I can't think of a better way to do it (--xip won't work)
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