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Hello Felix Singer, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Lean Sheng Tan, Werner Zeh, Patrick Rudolph, EricR Lai,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#23).
Change subject: soc/intel/common/basecode/eop: coreboot driver perform EOP operations
......................................................................
soc/intel/common/basecode/eop: coreboot driver perform EOP operations
This patch implements the required operations to perform prior to
booting to OS (typically, known as End Of POST aka. EOP) using coreboot
native driver when platform decides to skip FSP notify APIs
i.e. Ready to Boot and End Of Firmware.
BUG=b:211954778
TEST=Able to build brya with these changes and coreboot log with this
code change as below when ADL SoC selects all required configs:
BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 62 ms
coreboot skipped calling FSP notify phase: 00000040.
coreboot skipped calling FSP notify phase: 000000f0.
BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
Finalizing chipset.
apm_control: Finalizing SMM.
APMC done.
HECI: Sending End-of-Post
CSE: EOP requested action: continue boot
CSE EOP successful, continuing boot
HECI: CSE device 16.1 is disabled
HECI: CSE device 16.4 is disabled
HECI: CSE device 16.5 is disabled
BS: BS_PAYLOAD_BOOT entry times (exec / console): 9 / 27 ms
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7
---
M src/soc/intel/common/basecode/Kconfig
A src/soc/intel/common/basecode/eop/Kconfig
A src/soc/intel/common/basecode/eop/Makefile.inc
A src/soc/intel/common/basecode/eop/eop.c
4 files changed, 63 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/60405/23
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Hello Felix Singer, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Lean Sheng Tan, Patrick Rudolph, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60406
to look at the new patch set (#16).
Change subject: soc/intel/alderlake: Skip FSP Notify APIs
......................................................................
soc/intel/alderlake: Skip FSP Notify APIs
SoC selects relevant Kconfigs as below:
- SOC_INTEL_COMMON_BASECODE
- SOC_INTEL_COMMON_BASECODE_END_OF_POST
to skip FSP notify APIs (Ready to boot and End of Firmware) and make
use of native coreboot driver to perform SoC recommended operations
prior booting to payload/OS.
Additionally, created a helper function `heci_finalize()` to keep HECI
related operations separated for easy guarding again config.
BUG=b:211954778
TEST=Able to build brya with these changes and coreboot log with this
code change as below when ADL SoC selects required configs.
BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 62 ms
coreboot skipped calling FSP notify phase: 00000040.
coreboot skipped calling FSP notify phase: 000000f0.
BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
Finalizing chipset.
apm_control: Finalizing SMM.
APMC done.
HECI: Sending End-of-Post
CSE: EOP requested action: continue boot
CSE EOP successful, continuing boot
HECI: CSE device 16.1 is disabled
HECI: CSE device 16.4 is disabled
HECI: CSE device 16.5 is disabled
BS: BS_PAYLOAD_BOOT entry times (exec / console): 9 / 27 ms
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I0198c9568de0e74053775682a44324405746389a
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/finalize.c
2 files changed, 14 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/60406/16
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Hello Felix Singer, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Lean Sheng Tan, Werner Zeh, Patrick Rudolph, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60405
to look at the new patch set (#22).
Change subject: soc/intel/common/basecode/eop: coreboot driver perform EOP operations
......................................................................
soc/intel/common/basecode/eop: coreboot driver perform EOP operations
This patch implements the required operations to perform prior to
booting to OS (typically, known as End Of POST aka. EOP) using coreboot
native driver when platform decides to skip FSP notify APIs
i.e. Ready to Boot and End Of Firmware.
BUG=b:211954778
TEST=Able to build brya with these changes and coreboot log with this
code change as below when ADL SoC selects all required configs:
BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 62 ms
coreboot skipped calling FSP notify phase: 00000040.
coreboot skipped calling FSP notify phase: 000000f0.
BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
Finalizing chipset.
apm_control: Finalizing SMM.
APMC done.
HECI: Sending End-of-Post
CSE: EOP requested action: continue boot
CSE EOP successful, continuing boot
HECI: CSE device 16.1 is disabled
HECI: CSE device 16.4 is disabled
HECI: CSE device 16.5 is disabled
BS: BS_PAYLOAD_BOOT entry times (exec / console): 9 / 27 ms
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7
---
M src/soc/intel/common/basecode/Kconfig
A src/soc/intel/common/basecode/eop/Kconfig
A src/soc/intel/common/basecode/eop/Makefile.inc
A src/soc/intel/common/basecode/eop/eop.c
4 files changed, 65 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/60405/22
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Hello Arthur Heymans,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/61562
to review the following change.
Change subject: drivers/smmstore/store.c: Add static assertion based on fmap
......................................................................
drivers/smmstore/store.c: Add static assertion based on fmap
Instead of having runtime failures that are hard to debug because SMM
debugging is disabled by default assert some properties of fmap at
buildtime.
Change-Id: I5b5b511142d93d5799565a8936e9a087117044b3
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/drivers/smmstore/store.c
1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/61562/1
diff --git a/src/drivers/smmstore/store.c b/src/drivers/smmstore/store.c
index 24e8a88..6ba3f53 100644
--- a/src/drivers/smmstore/store.c
+++ b/src/drivers/smmstore/store.c
@@ -2,6 +2,7 @@
#include <boot_device.h>
#include <fmap.h>
+#include <fmap_config.h>
#include <commonlib/helpers.h>
#include <commonlib/region.h>
#include <console/console.h>
@@ -10,6 +11,13 @@
#define SMMSTORE_REGION "SMMSTORE"
+
+_Static_assert(IS_ALIGNED(FMAP_SECTION_SMMSTORE_START, SMM_BLOCK_SIZE),
+ "SMMSTORE FMAP region not aligned to 64K");
+
+_Static_assert(SMM_BLOCK_SIZE <= FMAP_SECTION_SMMSTORE_SIZE,
+ "SMMSTORE FMAP region must be at least 64K");
+
/*
* The region format is still not finalized, but so far it looks like this:
* (
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Change subject: soc/intel/alderlake: Enable USB2 port reset message on Type-C ports
......................................................................
Patch Set 6: Code-Review+1
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Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61369 )
Change subject: psp_verstage: report developer mode to PSP
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> this likely needs to be ported forward to sabrina; from what i've seen without that being ported for […]
Will do before we enable verified boot for Sabrina.
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Change subject: soc/intel/alderlake: Enable USB2 port reset message on Type-C ports
......................................................................
Removed Code-Review+1 by Sridhar Siricilla <sridhar.siricilla(a)intel.com>
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Change subject: payload/external/iPXE/Makefile: Clean up the repo before checking out
......................................................................
Patch Set 2:
(1 comment)
File payloads/external/iPXE/Makefile:
https://review.coreboot.org/c/coreboot/+/60007/comment/36fd79bd_13ebf10b
PS2, Line 32: git checkout maste
This line should do the same thing, I'd think.
Maybe just add --force here?
maybe `git checkout --force origin/master`
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HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61557 )
Change subject: drivers: Get rid of unnecessary blank lines {before,after} brace
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61557/comment/6dd91787_a64ca317
PS1, Line 7: src/drivers
> drivers
Ack
https://review.coreboot.org/c/coreboot/+/61557/comment/a22e3124_563beed4
PS1, Line 7: blace
> brace
Ack
Patchset:
PS2:
Thx
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