coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya: Lock TPM pin in brask and brya baseboards
by Nick Vaccaro (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Subrata Banik. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61499 ) Change subject: mb/google/brya: Lock TPM pin in brask and brya baseboards ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/brya/variants/agah/gpio.c: https://review.coreboot.org/c/coreboot/+/61499/comment/9c27b747_9313517a PS5, Line 37: /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ : PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG), : /* B8 : ISH_I2C1_SCL ==> PCH_I2C_TPM_SCL */ : PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG), These are already defined this way in variants/baseboard/brya/gpio.c, no need to duplicate here. Same holds true for the other files in this CL that add this configuration for GPP_B7 and GPP_B8, since all of the devices so far are brya variants (as opposed to brask variants). -- To view, visit https://review.coreboot.org/c/coreboot/+/61499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f2a7014faeecd4701ea35ec77ef0e1692516b9d Gerrit-Change-Number: 61499 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 02 Feb 2022 21:26:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Add new mainboard
by Karthik Ramasubramanian (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Raul Rangel, Jon Murphy, Rob Barnes, Felix Held. Hello Raul Rangel, Jon Murphy, Rob Barnes, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61565 to look at the new patch set (#2). Change subject: mb/google/skyrim: Add new mainboard ...................................................................... mb/google/skyrim: Add new mainboard Skyrim is a new Google mainboard with AMD Sabrina SOC. BUG=b:214413553 TEST=util/abuild/abuild -t GOOGLE_SKYRIM --clean Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- A src/mainboard/google/skyrim/Kconfig A src/mainboard/google/skyrim/Kconfig.name A src/mainboard/google/skyrim/Makefile.inc A src/mainboard/google/skyrim/board_info.txt A src/mainboard/google/skyrim/bootblock.c A src/mainboard/google/skyrim/chromeos.fmd A src/mainboard/google/skyrim/dsdt.asl A src/mainboard/google/skyrim/mainboard.c A src/mainboard/google/skyrim/port_descriptors.c A src/mainboard/google/skyrim/variants/baseboard/devicetree.cb A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h 12 files changed, 162 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/61565/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Gerrit-Change-Number: 61565 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/skyrim: Add new mainboard
by build bot (Jenkins) (Code Review) 02 Feb '22

02 Feb '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61565 ) Change subject: mb/google/skyrim: Add new mainboard ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/skyrim/port_descriptors.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139791): https://review.coreboot.org/c/coreboot/+/61565/comment/53034fa2_2e2a44b5 PS1, Line 7: const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, need consistent spacing around '*' (ctx:WxO) -- To view, visit https://review.coreboot.org/c/coreboot/+/61565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Gerrit-Change-Number: 61565 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:50:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Add new mainboard
by Karthik Ramasubramanian (Code Review) 02 Feb '22

02 Feb '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61565 ) Change subject: mb/google/skyrim: Add new mainboard ...................................................................... mb/google/skyrim: Add new mainboard Skyrim is a new Google mainboard with an AMD Sabrina SOC. BUG=b:214413553 TEST=util/abuild/abuild -t GOOGLE_SKYRIM --clean Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- A src/mainboard/google/skyrim/Kconfig A src/mainboard/google/skyrim/Kconfig.name A src/mainboard/google/skyrim/Makefile.inc A src/mainboard/google/skyrim/board_info.txt A src/mainboard/google/skyrim/bootblock.c A src/mainboard/google/skyrim/chromeos.fmd A src/mainboard/google/skyrim/dsdt.asl A src/mainboard/google/skyrim/mainboard.c A src/mainboard/google/skyrim/port_descriptors.c A src/mainboard/google/skyrim/variants/baseboard/devicetree.cb A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h A src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h 12 files changed, 162 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/61565/1 diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig new file mode 100644 index 0000000..619ac64 --- /dev/null +++ b/src/mainboard/google/skyrim/Kconfig @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +config BOARD_GOOGLE_BASEBOARD_SKYRIM + def_bool n + +if BOARD_GOOGLE_BASEBOARD_SKYRIM + +config AMD_FWM_POSITION_INDEX + int + default 3 + help + TODO: might need to be adapted for better placement of files in cbfs + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select SOC_AMD_SABRINA + +config DEVICETREE + default "variants/baseboard/devicetree.cb" + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" + +config MAINBOARD_DIR + default "google/skyrim" + +config MAINBOARD_FAMILY + string + default "Google_Skyrim" + +config MAINBOARD_PART_NUMBER + default "Skyrim" if BOARD_GOOGLE_SKYRIM + +endif # BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/mainboard/google/skyrim/Kconfig.name b/src/mainboard/google/skyrim/Kconfig.name new file mode 100644 index 0000000..a36235c --- /dev/null +++ b/src/mainboard/google/skyrim/Kconfig.name @@ -0,0 +1,5 @@ +comment "Skyrim" + +config BOARD_GOOGLE_SKYRIM + bool "-> Skyrim" + select BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/mainboard/google/skyrim/Makefile.inc b/src/mainboard/google/skyrim/Makefile.inc new file mode 100644 index 0000000..df2762d --- /dev/null +++ b/src/mainboard/google/skyrim/Makefile.inc @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-y += bootblock.c + +romstage-y += port_descriptors.c + +ramstage-y += mainboard.c + +subdirs-y += variants/baseboard + +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/google/skyrim/board_info.txt b/src/mainboard/google/skyrim/board_info.txt new file mode 100644 index 0000000..9588901 --- /dev/null +++ b/src/mainboard/google/skyrim/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Skyrim +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/skyrim/bootblock.c b/src/mainboard/google/skyrim/bootblock.c new file mode 100644 index 0000000..dd4c151 --- /dev/null +++ b/src/mainboard/google/skyrim/bootblock.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <baseboard/variants.h> + +void bootblock_mainboard_early_init(void) +{ + /* TODO: Perform mainboard initialization */ +} diff --git a/src/mainboard/google/skyrim/chromeos.fmd b/src/mainboard/google/skyrim/chromeos.fmd new file mode 100644 index 0000000..a6dbc2c --- /dev/null +++ b/src/mainboard/google/skyrim/chromeos.fmd @@ -0,0 +1,34 @@ +FLASH@0xFF000000 16M { + SI_BIOS { + RW_MRC_CACHE(PRESERVE) 64K + RW_SECTION_A 3M { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 256 + } + RW_SECTION_B 3M { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 256 + } + RW_ELOG(PRESERVE) 4K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_VPD(PRESERVE) 8K + RW_NVRAM(PRESERVE) 20K + SMMSTORE(PRESERVE) 4K + RW_LEGACY(CBFS) + WP_RO@8M 8M { + RO_VPD(PRESERVE) 16K + RO_GSCVD 8K + RO_SECTION { + FMAP 2K + RO_FRID 64 + GBB@4K 12K + COREBOOT(CBFS) + } + } + } +} diff --git a/src/mainboard/google/skyrim/dsdt.asl b/src/mainboard/google/skyrim/dsdt.asl new file mode 100644 index 0000000..80a9c1f --- /dev/null +++ b/src/mainboard/google/skyrim/dsdt.asl @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock ( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x00010001 /* OEM Revision */ + ) +{ + #include <acpi/dsdt_top.asl> + #include <soc.asl> +} diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c new file mode 100644 index 0000000..3dc2c41 --- /dev/null +++ b/src/mainboard/google/skyrim/mainboard.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/device.h> + +static void mainboard_init(void *chip_info) +{ + /* TODO: Perform mainboard initialization */ +} + +static void mainboard_enable(struct device *dev) +{ + /* TODO: Enable mainboard */ +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/skyrim/port_descriptors.c b/src/mainboard/google/skyrim/port_descriptors.c new file mode 100644 index 0000000..56bd9f3 --- /dev/null +++ b/src/mainboard/google/skyrim/port_descriptors.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/platform_descriptors.h> +#include <types.h> + +void mainboard_get_dxio_ddi_descriptors( + const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, + const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) +{ + /* TODO: Initialize DXIO and DDI descriptors */ +} diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb new file mode 100644 index 0000000..ed77b0b --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +chip soc/amd/sabrina + device domain 0 on + end # domain +end # chip soc/amd/sabrina diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h new file mode 100644 index 0000000..b94afac --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/baseboard.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h new file mode 100644 index 0000000..927af2f --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_VARIANTS_H__ +#define __BASEBOARD_VARIANTS_H__ + +#endif /* __BASEBOARD_VARIANTS_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/61565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Gerrit-Change-Number: 61565 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/graphics: Create Kconfig for shifting graphic memory base
by Wonkyu Kim (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Subrata Banik, Nico Huber, Ethan Tsao, Ravishankar Sarawadi, Paul Menzel, Raj Astekar, Patrick Rudolph. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 ) Change subject: soc/intel/graphics: Create Kconfig for shifting graphic memory base ...................................................................... Patch Set 11: Code-Review+1 (2 comments) File src/soc/intel/common/block/graphics/graphics.c: https://review.coreboot.org/c/coreboot/+/61389/comment/98e7b53e_b144d85b PS11, Line 122: printk(BIOS_INFO, "gfx memory bar(0x18) = 0x%lx GFX_MEMBASE_OFFSET = 0x%x\n", : memory_base, CONFIG_SOC_INTEL_GFX_MEMBASE_OFFSET); > The purpose of this message is to print gfx basic information without adding debug message and re-bu […] Can we also print out final memory_base? We can print out 3 values or final memory_base with memory bar should be ok as we can figureout offset from 2 values. BTW, how many times does this printout happen during boot up? As this can be common API, we may need to optimize log if there are too many. https://review.coreboot.org/c/coreboot/+/61389/comment/f8240f48_af74ea67 PS11, Line 129: memory_base = memory_base + CONFIG_SOC_INTEL_GFX_MEMBASE_OFFSET; > I think the purpose of if clause is checking if memory bar is zero. […] I also think above memory_base checking for checking PCI config space 0x18 is programmed or not. -- To view, visit https://review.coreboot.org/c/coreboot/+/61389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b1e34ada9b895dabcdc8116d2470e8831ed0a9e Gerrit-Change-Number: 61389 Gerrit-PatchSet: 11 Gerrit-Owner: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:50:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Ethan Tsao <ethan.tsao(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Lock TPM IRQ pin in brask and brya baseboards
by Nick Vaccaro (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Subrata Banik. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61500 ) Change subject: mb/google/brya: Lock TPM IRQ pin in brask and brya baseboards ...................................................................... Patch Set 6: Code-Review+2 (1 comment) File src/mainboard/google/brya/variants/baseboard/brask/gpio.c: https://review.coreboot.org/c/coreboot/+/61500/comment/b03466a0_8dd376b7 PS6, Line 371: PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), Is the thinking here that there's no need to set these as LOCK_CONFIG in the early table given they won't get locked until closer to the end of coreboot anyway, so the definitions in the main table will surfice? -- To view, visit https://review.coreboot.org/c/coreboot/+/61500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfc251152278c59f9a94b84fcd8c6d36c26bff62 Gerrit-Change-Number: 61500 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:48:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Remove `mb_gpio_lock_config()` override function
by Nick Vaccaro (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Subrata Banik. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61503 ) Change subject: mb/google/brya: Remove `mb_gpio_lock_config()` override function ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Thanks for the pointer, yes, we should. […] Have we decided that the SoC will no longer manually lock gpios it deems sensitive, and instead leave that decision completley up to the mainboard? If the answer is yes, then we could remove the soc_lock_gpios() in src/soc/intel/common/block/smm/smihandler.c, soc_gpio_lock_config() call in src/soc/intel/alderlake/gpio.c, and the associated prototypes. If the answer is no, we can still remove mb_gpio_lock_config(). -- To view, visit https://review.coreboot.org/c/coreboot/+/61503 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc7354f2ae3817459b5494d572c603eba48ec66a Gerrit-Change-Number: 61503 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:36:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus,reef: Align SMMSTORE region in default.fmd
by Matt DeVillier (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Arthur Heymans, Tim Wawrzynczak, MrChromebox. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61563 ) Change subject: mb/google/octopus,reef: Align SMMSTORE region in default.fmd ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: I'm trying to remember why the specifying the start address here is even needed, given that it would naturally fall on a 64k boundary given the size of the IFD + IFWI regions -- To view, visit https://review.coreboot.org/c/coreboot/+/61563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d4f71f80c3219ac2c7000e1fa95fd04100d9cfe Gerrit-Change-Number: 61563 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:36:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/{octopus,reef}: correct SMMSTORE alignment in default FMAP
by Matt DeVillier (Code Review) 02 Feb '22

02 Feb '22

Matt DeVillier has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/61564 ) Change subject: mb/google/{octopus,reef}: correct SMMSTORE alignment in default FMAP ...................................................................... Abandoned whoops, dupe of CB:61563 -- To view, visit https://review.coreboot.org/c/coreboot/+/61564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9087089c1416f16c4f824b6dfaa8431e36efe485 Gerrit-Change-Number: 61564 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/alderlake: Enable USB2 port reset message on Type-C ports
by Paul Menzel (Code Review) 02 Feb '22

02 Feb '22

Attention is currently required from: Anil Kumar K, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61536 ) Change subject: soc/intel/alderlake: Enable USB2 port reset message on Type-C ports ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61536/comment/7dce3193_dceee58b PS6, Line 8: Please describe the problem. -- To view, visit https://review.coreboot.org/c/coreboot/+/61536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabc6f308992bf3868da66f152c6d7b0164e64bea Gerrit-Change-Number: 61536 Gerrit-PatchSet: 6 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 02 Feb 2022 20:34:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2022