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Change subject: drivers/i2c/tpm/cr50: Add support to get cr50 firmware version
......................................................................
Patch Set 4:
(4 comments)
File src/drivers/i2c/tpm/cr50.c:
https://review.coreboot.org/c/coreboot/+/61720/comment/cc384b37_168c98a7
PS3, Line 487: -2
> Unable to understand how line #518 (the caller) would differentiate between function returning -1 or […]
Eh right now it doesn't/don't care, I will change to all -1 or 0.
https://review.coreboot.org/c/coreboot/+/61720/comment/3dbde2dd_3a86fdc6
PS3, Line 503: 301
> I see this is the same as in the spi version. […]
No, I don't think it does, but I think that is just the maximum depth of cr50 FIFO maybe? I'll use `CR50_BUF_MAXSIZE * 2` ?
https://review.coreboot.org/c/coreboot/+/61720/comment/a7e472e5_e2f44108
PS3, Line 554: get_fw_version
> line #499 returns the status but you are not checking this prior to below serial msg ?
Done
https://review.coreboot.org/c/coreboot/+/61720/comment/3e3e6c9d_237e8fe8
PS3, Line 565: }
> one blank line please
Done
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Hello build bot (Jenkins), Subrata Banik, Christian Walter, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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Change subject: drivers/i2c/tpm/cr50: Add support to get cr50 firmware version
......................................................................
drivers/i2c/tpm/cr50: Add support to get cr50 firmware version
cr50-based devices that use the I2C protocol may still need to know
the firmware version of the cr50, therefore port this functionality
from the SPI driver to I2C.
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: I9dbdbc6ec717f1aa89111ae09249cbe2312054d9
---
M src/drivers/i2c/tpm/cr50.c
M src/drivers/i2c/tpm/tpm.h
2 files changed, 75 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/61720/4
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Hello build bot (Jenkins), Subrata Banik, Christian Walter, Nick Vaccaro, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61721
to look at the new patch set (#6).
Change subject: drivers/i2c/tpm/cr50: Add support to get and set BOARD_CFG register
......................................................................
drivers/i2c/tpm/cr50: Add support to get and set BOARD_CFG register
The cr50 BOARD_CFG register has a bit to support extended interrupt
pulses to the PCH. There is support for this in the SPI driver, but
not in the I2C driver, and it may be required for some boards,
therefore port the logic over to the I2C driver.
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: I9fcfed9fa133db2560c4a855376d249e865c1335
---
M src/drivers/i2c/tpm/cr50.c
M src/drivers/i2c/tpm/tpm.h
2 files changed, 82 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/61721/6
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61722 )
Change subject: mb/google/brya: Enable GPIO PM dynamically based on cr50 FW version
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brya/mainboard.c:
https://review.coreboot.org/c/coreboot/+/61722/comment/db3d454d_9a04d06a
PS4, Line 46: config->gpio_pm[COMM_0] = 0;
> isn't the default value is always zero unless overridden.
Yes, but this would override anything that sneaks into the overridetrees, that was my reasoning here.
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