Attention is currently required from: Tarun Tuli, Kapil Porwal, Ivy Jian, Eric Lai.
Hello Tarun Tuli, Kapil Porwal, Ivy Jian, Eric Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70064
to look at the new patch set (#2).
Change subject: mb/google/rex: Add PCIe based SD controller
......................................................................
mb/google/rex: Add PCIe based SD controller
This patch adds PCIe based SD controller at RP 7 (from RP 11) with
Proto 1 schematics dated 11/30.
Additionally, added the RTD3 entries for the SD controller.
Finally, ensured that EN_PP3300_SD (GPP_D03) is configured in
bootblock and SD_PERST_L (GPP_D02) is configured in romstage to
meet the power cycle requirement.
BUG=b:242917011
TEST=Able to build and boot Google/Rex. SD card detection is due
for the Proto 1 hardware.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I23d53e4d61ec36d2145f9e5816d97d13eb5b219e
---
M src/mainboard/google/rex/variants/rex0/gpio.c
M src/mainboard/google/rex/variants/rex0/overridetree.cb
2 files changed, 40 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/70064/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/70064
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I23d53e4d61ec36d2145f9e5816d97d13eb5b219e
Gerrit-Change-Number: 70064
Gerrit-PatchSet: 2
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com>
Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Tarun Tuli, Raymond Chung, Zhuohao Lee.
Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69963 )
Change subject: mb/google/brya/var/gaelin: Add camera module settings
......................................................................
Patch Set 2: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/69963
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I42325b75e129429ee451ded6a2086fd3808e581a
Gerrit-Change-Number: 69963
Gerrit-PatchSet: 2
Gerrit-Owner: Raymond Chung <raymondchung(a)ami.corp-partner.google.com>
Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com>
Gerrit-Reviewer: Raymond Chung <raymondchung(a)ami.corp-partner.google.com>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Bruce Chiang <brucechiang(a)msi.corp-partner.google.com>
Gerrit-CC: Eason Chang <easonchang(a)msi.corp-partner.google.com>
Gerrit-CC: Eddy Lu <eddylu(a)ami.corp-partner.google.com>
Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Attention: Raymond Chung <raymondchung(a)ami.corp-partner.google.com>
Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com>
Gerrit-Comment-Date: Wed, 30 Nov 2022 06:20:56 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Wonkyu Kim, Ravishankar Sarawadi, Rizwan Qureshi, Paul Menzel, Angel Pons, Krishna P Bhat D, Tim Wawrzynczak, Tarun Tuli, Jamie Ryu, Subrata Banik, Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Usha P, Raj Astekar.
Harsha B R has uploaded a new patch set (#17) to the change originally created by Jamie Ryu. ( https://review.coreboot.org/c/coreboot/+/66101 )
Change subject: mb/intel/mtlrvp: Enable EC and building ChromeOS
......................................................................
mb/intel/mtlrvp: Enable EC and building ChromeOS
This configures and initializes EC, and adds building ChromeOS.
BUG=b:224325352
TEST=util/abuild/abuild -p none -t intel/mtlrvp -a -c max
Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com>
Change-Id: I662d7f79050d35e152d97dc5c2118a4af56223bc
Signed-off-by: Harsha B R <harsha.b.r(a)intel.com>
---
M src/mainboard/intel/mtlrvp/Kconfig
M src/mainboard/intel/mtlrvp/Makefile.inc
A src/mainboard/intel/mtlrvp/chromeos.c
D src/mainboard/intel/mtlrvp/devicetree.cb
M src/mainboard/intel/mtlrvp/dsdt.asl
A src/mainboard/intel/mtlrvp/ec.c
A src/mainboard/intel/mtlrvp/mainboard.c
A src/mainboard/intel/mtlrvp/smihandler.c
M src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h
A src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp/include/baseboard/ec.h
M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp/include/baseboard/gpio.h
A src/mainboard/intel/mtlrvp/variants/mtlrvp_p/Makefile.inc
A src/mainboard/intel/mtlrvp/variants/mtlrvp_p/devicetree.cb
A src/mainboard/intel/mtlrvp/variants/mtlrvp_p/gpio.c
A src/mainboard/intel/mtlrvp/variants/mtlrvp_p/include/variant/ec.h
A src/mainboard/intel/mtlrvp/variants/mtlrvp_p/include/variant/gpio.h
16 files changed, 345 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/66101/17
--
To view, visit https://review.coreboot.org/c/coreboot/+/66101
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I662d7f79050d35e152d97dc5c2118a4af56223bc
Gerrit-Change-Number: 66101
Gerrit-PatchSet: 17
Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com>
Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Reviewer: Usha P <usha.p(a)intel.com>
Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com>
Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>
Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com>
Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com>
Gerrit-Attention: Usha P <usha.p(a)intel.com>
Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Tarun Tuli.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70146 )
Change subject: mb/google/brya: Don't add MPTS to both DSDT and SSDT
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164885):
https://review.coreboot.org/c/coreboot/+/70146/comment/eadd1ccd_bbdb064c
PS1, Line 12: error:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164885):
https://review.coreboot.org/c/coreboot/+/70146/comment/81c60f96_8ef8a7f6
PS1, Line 13: ERR kernel: [ 0.109237] ACPI BIOS Error (bug): Failure creating named object [\_SB.MPTS], AE_ALREADY_EXISTS (20210730/dswload2-327)
Possible unwrapped commit description (prefer a maximum 72 chars per line)
--
To view, visit https://review.coreboot.org/c/coreboot/+/70146
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9f411aae81ea87aa9c8fc7754c3709e398771a32
Gerrit-Change-Number: 70146
Gerrit-PatchSet: 1
Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
Gerrit-CC: Reka Norman <rekanorman(a)google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com>
Gerrit-Comment-Date: Wed, 30 Nov 2022 06:10:17 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Reka Norman has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70146 )
Change subject: mb/google/brya: Don't add MPTS to both DSDT and SSDT
......................................................................
mb/google/brya: Don't add MPTS to both DSDT and SSDT
CB:65488 started unconditionally adding MPTS to the SSDT. On variants
with HAVE_WWAN_POWER_SEQUENCE selected, MPTS is already added to the
DSDT via wwan_power.asl. The duplicate definition results in a kernel
error:
ERR kernel: [ 0.109237] ACPI BIOS Error (bug): Failure creating named object [\_SB.MPTS], AE_ALREADY_EXISTS (20210730/dswload2-327)
ERR kernel: [ 0.109242] ACPI Error: AE_ALREADY_EXISTS, During name lookup/catalog (20210730/psobject-220)
Don't add MPTS to the SSDT if HAVE_WWAN_POWER_SEQUENCE is selected.
There are no variants which use both, so this should only result in
empty MPTS methods being removed.
BUG=b:260380268
TEST=On pujjo, the SSDT no longer contains an empty MPTS method, there's
no kernel error, and the WWAN power-off sequence is met.
Change-Id: I9f411aae81ea87aa9c8fc7754c3709e398771a32
Signed-off-by: Reka Norman <rekanorman(a)chromium.org>
---
M src/mainboard/google/brya/mainboard.c
1 file changed, 56 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/70146/1
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c
index 4e0cf08..7c51a00 100644
--- a/src/mainboard/google/brya/mainboard.c
+++ b/src/mainboard/google/brya/mainboard.c
@@ -132,6 +132,36 @@
acpigen_emit_namestring(acpi_device_path_join(parent, "PGPR._OFF"));
}
+static void mainboard_generate_mpts(void)
+{
+ const struct device *wwan = DEV_PTR(rp6_wwan);
+ const struct device *dgpu = DEV_PTR(dgpu);
+
+ /*
+ * If HAVE_WWAN_POWER_SEQUENCE is selected, MPTS will be added to the
+ * DSDT via wwan_power.asl. We can't add MPTS to the SSDT as well,
+ * since the duplicate definition will result in a kernel error.
+ *
+ * This special case can be removed in the future if the power-off
+ * sequences for all WWAN devices used on brya are moved to the SSDT.
+ */
+ if (CONFIG(HAVE_WWAN_POWER_SEQUENCE)) {
+ if (wwan || dgpu)
+ printk(BIOS_ERR, "Cannot include MPTS in both DSDT and SSDT\n");
+ return;
+ }
+
+ acpigen_write_scope("\\_SB");
+ acpigen_write_method_serialized("MPTS", 1);
+ if (wwan)
+ mainboard_generate_wwan_shutdown(wwan);
+ if (dgpu)
+ mainboard_generate_dgpu_shutdown(dgpu);
+
+ acpigen_write_method_end(); /* Method */
+ acpigen_write_scope_end(); /* Scope */
+}
+
static void mainboard_generate_s0ix_hook(void)
{
acpigen_write_if_lequal_op_int(ARG0_OP, 1);
@@ -151,18 +181,7 @@
static void mainboard_fill_ssdt(const struct device *dev)
{
- const struct device *wwan = DEV_PTR(rp6_wwan);
- const struct device *dgpu = DEV_PTR(dgpu);
-
- acpigen_write_scope("\\_SB");
- acpigen_write_method_serialized("MPTS", 1);
- if (wwan)
- mainboard_generate_wwan_shutdown(wwan);
- if (dgpu)
- mainboard_generate_dgpu_shutdown(dgpu);
-
- acpigen_write_method_end(); /* Method */
- acpigen_write_scope_end(); /* Scope */
+ mainboard_generate_mpts();
/* for variant to fill additional SSDT */
variant_fill_ssdt(dev);
--
To view, visit https://review.coreboot.org/c/coreboot/+/70146
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9f411aae81ea87aa9c8fc7754c3709e398771a32
Gerrit-Change-Number: 70146
Gerrit-PatchSet: 1
Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org>
Gerrit-CC: Reka Norman <rekanorman(a)google.com>
Gerrit-MessageType: newchange