coreboot-gerrit November 2022

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Set a bogus initial lapic_id
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69108 ) Change subject: cpu/x86/mp_init.c: Set a bogus initial lapic_id ...................................................................... cpu/x86/mp_init.c: Set a bogus initial lapic_id This makes it easier to catch errors later if the ap_init code fails to properly set things up. Change-Id: I938faf042bfa4fe1fc39e78ab740c9b210bc105c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c 1 file changed, 18 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/69108/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 8003ac5..d698634 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -374,9 +374,11 @@ /* Build the CPU device path */ cpu_path.type = DEVICE_PATH_APIC; - /* Assuming linear APIC space allocation. AP will set its own - APIC id in the ap_init() path above. */ - cpu_path.apic.apic_id = info->cpu->path.apic.apic_id + i; + /* + * Set a bogus apic_id. + * AP will set its own APIC id in the ap_init() path above. + */ + cpu_path.apic.apic_id = UINT32_MAX; /* Allocate the new CPU device structure */ new = alloc_find_dev(cpu_bus, &cpu_path); -- To view, visit https://review.coreboot.org/c/coreboot/+/69108 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I938faf042bfa4fe1fc39e78ab740c9b210bc105c Gerrit-Change-Number: 69108 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Use existing code to create cpu struct device
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64341 ) Change subject: cpu/x86/mp_init.c: Use existing code to create cpu struct device ...................................................................... Patch Set 5: (1 comment) File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/64341/comment/28617d0d_26e545fd PS5, Line 374: 1); > Ow, this hurts to look at Fixed. -- To view, visit https://review.coreboot.org/c/coreboot/+/64341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80baadd405b31d6be2fdbb894b0f4b7c775da6f8 Gerrit-Change-Number: 64341 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 18:53:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/mp_init.c: Only enable CPUs once they execute code
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68892 to look at the new patch set (#3). Change subject: cpu/mp_init.c: Only enable CPUs once they execute code ...................................................................... cpu/mp_init.c: Only enable CPUs once they execute code On some systems the BSP cannot know how many CPUs are present in the system. A typical use case is a multi socket system. Setting the enable flag only on CPUs that actually exist makes it more flexible. Change-Id: I6c8042b4d6127239175924f996f735bf9c83c6e8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c 1 file changed, 16 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/68892/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68892 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c8042b4d6127239175924f996f735bf9c83c6e8 Gerrit-Change-Number: 68892 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Use existing code to create cpu struct device
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Hello build bot (Jenkins), Angel Pons, Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64341 to look at the new patch set (#6). Change subject: cpu/x86/mp_init.c: Use existing code to create cpu struct device ...................................................................... cpu/x86/mp_init.c: Use existing code to create cpu struct device Change-Id: I80baadd405b31d6be2fdbb894b0f4b7c775da6f8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c 1 file changed, 15 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/64341/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/64341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80baadd405b31d6be2fdbb894b0f4b7c775da6f8 Gerrit-Change-Number: 64341 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by build bot (Jenkins) (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Kyösti Mälkki. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68893 ) Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... Patch Set 2: Verified+1 (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161894): https://review.coreboot.org/c/coreboot/+/68893/comment/4f5188bd_ae4ef0f5 PS2, Line 8: Possible repeated word: 'are' File src/cpu/x86/mp_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161894): https://review.coreboot.org/c/coreboot/+/68893/comment/bf232228_4e600b34 PS2, Line 490: if (!cpu->enabled) { braces {} are not necessary for any arm of this statement -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 18:49:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Kyösti Mälkki. Hello build bot (Jenkins), Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64342 to look at the new patch set (#6). Change subject: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path ...................................................................... cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path It's quite confusing to keep track of lapic ID inside the device struct and initial lapic ID inside an array. Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/cpu/x86/lapic/lapic_cpu_init.c M src/cpu/x86/mp_init.c M src/device/cpu_device.c M src/include/cpu/cpu.h M src/include/device/path.h 7 files changed, 54 insertions(+), 50 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/64342/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/64342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Gerrit-Change-Number: 64342 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by Iman Bingi (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. Iman Bingi has uploaded a new patch set (#192) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... payloads/cbui: Add new payload CBUI Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Ported coreinfo and nvramcui * Allows to modify NVRAM and RTC * Works as ELF payload * Works as Seabios secondary payload * Basic support for multiple languages * Hacky support for BIOS calls (depends on NASM) * Runs in qemu and on real hardware * Use linker script to allocate low memory Shortcomings: * Doesn't work in VGA text mode * Untested on UEFI * int32 relocates itself to low memory Licenses: * GPLv2 (CBUI + libpayload) * BSD (libpayload) * MIT (nuklear) TODO: * Test on as much platforms as possible * Link int32 into low memory This is Patrick Rudolph's original patch, updated by Ben Adu-Boahen to: * Add Read/Write module * This module allows read/write to any hardware component that is readable/writeable Note: This is work in progress Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig M payloads/Makefile.inc A payloads/cbui/.gitignore A payloads/cbui/Kconfig A payloads/cbui/Makefile A payloads/cbui/NuklearUI/NuklearCheckbox.c A payloads/cbui/NuklearUI/NuklearCheckbox.h A payloads/cbui/NuklearUI/NuklearCombo.c A payloads/cbui/NuklearUI/NuklearCombo.h A payloads/cbui/NuklearUI/NuklearCommon.h A payloads/cbui/NuklearUI/NuklearDataGrid.c A payloads/cbui/NuklearUI/NuklearDataGrid.h A payloads/cbui/NuklearUI/NuklearDatePicker.c A payloads/cbui/NuklearUI/NuklearDatePicker.h A payloads/cbui/NuklearUI/NuklearFieldFile.c A payloads/cbui/NuklearUI/NuklearFieldFile.h A payloads/cbui/NuklearUI/NuklearFieldHex.c A payloads/cbui/NuklearUI/NuklearFieldHex.h A payloads/cbui/NuklearUI/NuklearFileChooser.c A payloads/cbui/NuklearUI/NuklearFileChooser.h A payloads/cbui/NuklearUI/NuklearGroup.c A payloads/cbui/NuklearUI/NuklearGroup.h A payloads/cbui/NuklearUI/NuklearHex.c A payloads/cbui/NuklearUI/NuklearHex.h A payloads/cbui/NuklearUI/NuklearIntegerRange.c A payloads/cbui/NuklearUI/NuklearIntegerRange.h A payloads/cbui/NuklearUI/NuklearLabel.c A payloads/cbui/NuklearUI/NuklearLabel.h A payloads/cbui/NuklearUI/NuklearObject.c A payloads/cbui/NuklearUI/NuklearObject.h A payloads/cbui/NuklearUI/NuklearRW.c A payloads/cbui/NuklearUI/NuklearRW.h A payloads/cbui/NuklearUI/NuklearRoot.c A payloads/cbui/NuklearUI/NuklearRwAcpi.c A payloads/cbui/NuklearUI/NuklearRwAcpi.h A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h A payloads/cbui/NuklearUI/NuklearRwEc.c A payloads/cbui/NuklearUI/NuklearRwEc.h A payloads/cbui/NuklearUI/NuklearRwIo.c A payloads/cbui/NuklearUI/NuklearRwIo.h A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h A payloads/cbui/NuklearUI/NuklearRwMemory.c A payloads/cbui/NuklearUI/NuklearRwMemory.h A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h A payloads/cbui/NuklearUI/NuklearRwNvram.c A payloads/cbui/NuklearUI/NuklearRwNvram.h A payloads/cbui/NuklearUI/NuklearRwPci.c A payloads/cbui/NuklearUI/NuklearRwPci.h A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h A payloads/cbui/NuklearUI/NuklearRwSmbios.c A payloads/cbui/NuklearUI/NuklearRwSmbios.h A payloads/cbui/NuklearUI/NuklearRwSuperIo.c A payloads/cbui/NuklearUI/NuklearRwSuperIo.h A payloads/cbui/NuklearUI/NuklearStyle.c A payloads/cbui/NuklearUI/NuklearStyle.h A payloads/cbui/NuklearUI/NuklearTabView.c A payloads/cbui/NuklearUI/NuklearTextView.c A payloads/cbui/NuklearUI/NuklearTextView.h A payloads/cbui/NuklearUI/NuklearTextfield.c A payloads/cbui/NuklearUI/NuklearTextfield.h A payloads/cbui/NuklearUI/NuklearTimePicker.c A payloads/cbui/NuklearUI/NuklearTimePicker.h A payloads/cbui/NuklearUI/NuklearUI.h A payloads/cbui/NuklearUI/NuklearVector.c A payloads/cbui/NuklearUI/NuklearVector.h A payloads/cbui/arch/x86/cpuid.c A payloads/cbui/arch/x86/cpuid.h A payloads/cbui/arch/x86/int32.h A payloads/cbui/arch/x86/int32.ld A payloads/cbui/arch/x86/int32.nasm A payloads/cbui/arch/x86/memcpy.c A payloads/cbui/arch/x86/memcpy.h A payloads/cbui/arch/x86/vga.c A payloads/cbui/arch/x86/vga.h A payloads/cbui/cbui.c A payloads/cbui/cbui.h A payloads/cbui/fsys/usbstorage.c A payloads/cbui/fsys/usbstorage.h A payloads/cbui/gfx/coreboot.c A payloads/cbui/gfx/coreboot.h A payloads/cbui/gfx/gfx.c A payloads/cbui/gfx/gfx.h A payloads/cbui/gfx/splash.c A payloads/cbui/gfx/splash.h A payloads/cbui/gfx/vbe.c A payloads/cbui/gfx/vbe.h A payloads/cbui/lang/de.c A payloads/cbui/lang/en.c A payloads/cbui/lang/lang.c A payloads/cbui/lang/lang.h A payloads/cbui/logo/cbui.png A payloads/cbui/lp.config A payloads/cbui/modules/bootlog_module.c A payloads/cbui/modules/cbfs_module.c A payloads/cbui/modules/cmos_module.c A payloads/cbui/modules/coreboot_module.c A payloads/cbui/modules/cpuinfo_module.c A payloads/cbui/modules/license_module.c A payloads/cbui/modules/modules.c A payloads/cbui/modules/modules.h A payloads/cbui/modules/nvram_module.c A payloads/cbui/modules/pci_module.c A payloads/cbui/modules/reboot_module.c A payloads/cbui/modules/rtc_module.c A payloads/cbui/modules/rw_module.c A payloads/cbui/modules/timestamps_module.c A payloads/cbui/modules/usb_module.c A payloads/cbui/smbios/smbios.c A payloads/cbui/smbios/smbios.h A payloads/cbui/smbios/smbios_oem.c A payloads/cbui/smbios/smbios_oem.h A payloads/cbui/smbios/smbios_output.c A payloads/cbui/smbios/smbios_output.h A payloads/cbui/util/stringbuffer.c A payloads/cbui/util/stringbuffer.h A payloads/libpayload/configs/defconfig-cbui 122 files changed, 24,979 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/192 -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 192 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Use existing code to create cpu struct device
by Angel Pons (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64341 ) Change subject: cpu/x86/mp_init.c: Use existing code to create cpu struct device ...................................................................... Patch Set 5: Code-Review+2 (2 comments) Patchset: PS5: If a CPU device exists but isn't enabled, using `add_cpu_device()` will enable it. Is this a problem? File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/64341/comment/0f2e4704_cd6186cf PS5, Line 374: 1); Ow, this hurts to look at -- To view, visit https://review.coreboot.org/c/coreboot/+/64341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80baadd405b31d6be2fdbb894b0f4b7c775da6f8 Gerrit-Change-Number: 64341 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Nov 2022 18:46:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: payloads/cbui: Add new payload CBUI
by Iman Bingi (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph. Iman Bingi has uploaded a new patch set (#191) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 ) Change subject: payloads/cbui: Add new payload CBUI ...................................................................... payloads/cbui: Add new payload CBUI Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Ported coreinfo and nvramcui * Allows to modify NVRAM and RTC * Works as ELF payload * Works as Seabios secondary payload * Basic support for multiple languages * Hacky support for BIOS calls (depends on NASM) * Runs in qemu and on real hardware * Use linker script to allocate low memory Shortcomings: * Doesn't work in VGA text mode * Untested on UEFI * int32 relocates itself to low memory Licenses: * GPLv2 (CBUI + libpayload) * BSD (libpayload) * MIT (nuklear) TODO: * Test on as much platforms as possible * Link int32 into low memory This is Patrick Rudolph's original patch, updated by Ben Adu-Boahen to: * Add Read/Write module * This module allows read/write to any hardware component that is readable/writeable Note: This is work in progress Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig M payloads/Makefile.inc A payloads/cbui/.gitignore A payloads/cbui/Kconfig A payloads/cbui/Makefile A payloads/cbui/NuklearUI/NuklearCheckbox.c A payloads/cbui/NuklearUI/NuklearCheckbox.h A payloads/cbui/NuklearUI/NuklearCombo.c A payloads/cbui/NuklearUI/NuklearCombo.h A payloads/cbui/NuklearUI/NuklearCommon.h A payloads/cbui/NuklearUI/NuklearDataGrid.c A payloads/cbui/NuklearUI/NuklearDataGrid.h A payloads/cbui/NuklearUI/NuklearDatePicker.c A payloads/cbui/NuklearUI/NuklearDatePicker.h A payloads/cbui/NuklearUI/NuklearFieldFile.c A payloads/cbui/NuklearUI/NuklearFieldFile.h A payloads/cbui/NuklearUI/NuklearFieldHex.c A payloads/cbui/NuklearUI/NuklearFieldHex.h A payloads/cbui/NuklearUI/NuklearFileChooser.c A payloads/cbui/NuklearUI/NuklearFileChooser.h A payloads/cbui/NuklearUI/NuklearGroup.c A payloads/cbui/NuklearUI/NuklearGroup.h A payloads/cbui/NuklearUI/NuklearHex.c A payloads/cbui/NuklearUI/NuklearHex.h A payloads/cbui/NuklearUI/NuklearIntegerRange.c A payloads/cbui/NuklearUI/NuklearIntegerRange.h A payloads/cbui/NuklearUI/NuklearLabel.c A payloads/cbui/NuklearUI/NuklearLabel.h A payloads/cbui/NuklearUI/NuklearObject.c A payloads/cbui/NuklearUI/NuklearObject.h A payloads/cbui/NuklearUI/NuklearRW.c A payloads/cbui/NuklearUI/NuklearRW.h A payloads/cbui/NuklearUI/NuklearRoot.c A payloads/cbui/NuklearUI/NuklearRwAcpi.c A payloads/cbui/NuklearUI/NuklearRwAcpi.h A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h A payloads/cbui/NuklearUI/NuklearRwEc.c A payloads/cbui/NuklearUI/NuklearRwEc.h A payloads/cbui/NuklearUI/NuklearRwIo.c A payloads/cbui/NuklearUI/NuklearRwIo.h A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h A payloads/cbui/NuklearUI/NuklearRwMemory.c A payloads/cbui/NuklearUI/NuklearRwMemory.h A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h A payloads/cbui/NuklearUI/NuklearRwNvram.c A payloads/cbui/NuklearUI/NuklearRwNvram.h A payloads/cbui/NuklearUI/NuklearRwPci.c A payloads/cbui/NuklearUI/NuklearRwPci.h A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h A payloads/cbui/NuklearUI/NuklearRwSmbios.c A payloads/cbui/NuklearUI/NuklearRwSmbios.h A payloads/cbui/NuklearUI/NuklearRwSuperIo.c A payloads/cbui/NuklearUI/NuklearRwSuperIo.h A payloads/cbui/NuklearUI/NuklearStyle.c A payloads/cbui/NuklearUI/NuklearStyle.h A payloads/cbui/NuklearUI/NuklearTabView.c A payloads/cbui/NuklearUI/NuklearTextView.c A payloads/cbui/NuklearUI/NuklearTextView.h A payloads/cbui/NuklearUI/NuklearTextfield.c A payloads/cbui/NuklearUI/NuklearTextfield.h A payloads/cbui/NuklearUI/NuklearTimePicker.c A payloads/cbui/NuklearUI/NuklearTimePicker.h A payloads/cbui/NuklearUI/NuklearUI.h A payloads/cbui/NuklearUI/NuklearVector.c A payloads/cbui/NuklearUI/NuklearVector.h A payloads/cbui/arch/x86/cpuid.c A payloads/cbui/arch/x86/cpuid.h A payloads/cbui/arch/x86/int32.h A payloads/cbui/arch/x86/int32.ld A payloads/cbui/arch/x86/int32.nasm A payloads/cbui/arch/x86/memcpy.c A payloads/cbui/arch/x86/memcpy.h A payloads/cbui/arch/x86/vga.c A payloads/cbui/arch/x86/vga.h A payloads/cbui/cbui.c A payloads/cbui/cbui.h A payloads/cbui/fsys/usbstorage.c A payloads/cbui/fsys/usbstorage.h A payloads/cbui/gfx/coreboot.c A payloads/cbui/gfx/coreboot.h A payloads/cbui/gfx/gfx.c A payloads/cbui/gfx/gfx.h A payloads/cbui/gfx/splash.c A payloads/cbui/gfx/splash.h A payloads/cbui/gfx/vbe.c A payloads/cbui/gfx/vbe.h A payloads/cbui/lang/de.c A payloads/cbui/lang/en.c A payloads/cbui/lang/lang.c A payloads/cbui/lang/lang.h A payloads/cbui/logo/cbui.png A payloads/cbui/lp.config A payloads/cbui/modules/bootlog_module.c A payloads/cbui/modules/cbfs_module.c A payloads/cbui/modules/cmos_module.c A payloads/cbui/modules/coreboot_module.c A payloads/cbui/modules/cpuinfo_module.c A payloads/cbui/modules/license_module.c A payloads/cbui/modules/modules.c A payloads/cbui/modules/modules.h A payloads/cbui/modules/nvram_module.c A payloads/cbui/modules/pci_module.c A payloads/cbui/modules/reboot_module.c A payloads/cbui/modules/rtc_module.c A payloads/cbui/modules/rw_module.c A payloads/cbui/modules/timestamps_module.c A payloads/cbui/modules/usb_module.c A payloads/cbui/smbios/smbios.c A payloads/cbui/smbios/smbios.h A payloads/cbui/smbios/smbios_oem.c A payloads/cbui/smbios/smbios_oem.h A payloads/cbui/smbios/smbios_output.c A payloads/cbui/smbios/smbios_output.h A payloads/cbui/util/stringbuffer.c A payloads/cbui/util/stringbuffer.h A payloads/libpayload/configs/defconfig-cbui 122 files changed, 24,966 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/191 -- To view, visit https://review.coreboot.org/c/coreboot/+/23586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1 Gerrit-Change-Number: 23586 Gerrit-PatchSet: 191 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: common/acpi/dptc: Dynamic Thermal Table Switching Proposal
by Tim Van Patten (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, EricKY Cheng, Matt DeVillier, Caveh Jalali, Paul Menzel, Tim Wawrzynczak, Eric Peers, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: common/acpi/dptc: Dynamic Thermal Table Switching Proposal ...................................................................... Patch Set 21: (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68471/comment/3f6ca69e_e7d5b0de PS21, Line 9: Thermal table switches to different modes to meet 6 : user experience. nit: Implement dynamic thermal table switching flow chart. This commit message should also describe the various states, so we have a human-readable version of the algorithm which we can validate the code against. File src/ec/google/chromeec/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/82170415_19b99c88 PS21, Line 44: #if CONFIG(FEATURE_DYNAMIC_DPTC) : Name (PRTN, 0) // Previous thermal table Label A(0) to F(5) : #endif Move this to `src/soc/amd/common/acpi/dptc.asl`, where it's used. File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/e901cca8_8914882c PS12, Line 44: TIN4 > Done This was not done. Raul is asking for this code to be moved out of the common `dptc.asl` that all AMD devices use into something that's specific to winterhold devices. File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/24919593_6f853ff8 PS21, Line 46: // AMB sensor trigger point Please add a comment describing what conditions these checks are looking for and what the result should be. Specifically, there is no ">50C" transition state in the diagram here: https://docs.google.com/presentation/d/1Ifjyx_Fu39WgLjJRsUBPxXcHW0dA706Jbx5… Instead, there are only >=45C and <50 transition points. https://review.coreboot.org/c/coreboot/+/68471/comment/b4f7edd6_326aedc7 PS21, Line 47: 123 50C = 122F https://review.coreboot.org/c/coreboot/+/68471/comment/ef3c5f81_d1172da6 PS21, Line 47: 123 Please add a comment stating the units of these temperature values. The documentation all uses Celsius, but these values are Fahrenheit. https://review.coreboot.org/c/coreboot/+/68471/comment/b61c72a8_65f809aa PS21, Line 48: (\_SB.PCI0.LPCB.EC0.PRTN == 3) || // Previous table is D : (\_SB.PCI0.LPCB.EC0.PRTN == 5)) // Previous table is F Why is this checking if the previous table was D or F, when neither of those are related to desktop+lid-open? I'd expect this to check table A. https://review.coreboot.org/c/coreboot/+/68471/comment/74999180_73c83b15 PS21, Line 56: 118 118F = 47.8C. What state is this checking? https://review.coreboot.org/c/coreboot/+/68471/comment/c7f901eb_d1c8c486 PS21, Line 57: (\_SB.PCI0.LPCB.EC0.PRTN == 2) || // Previous table is C : (\_SB.PCI0.LPCB.EC0.PRTN == 4)) // Previous table is E Similarly, why is this state dependent on tables C/E? https://review.coreboot.org/c/coreboot/+/68471/comment/1b81e61e_05e2d9f0 PS21, Line 64: }Else{ nit: Add whitespace around `Else` and before `//`. https://review.coreboot.org/c/coreboot/+/68471/comment/7c46eb44_9a215c27 PS21, Line 84: }Else{// Laptop Same -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 21 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 01 Nov 2022 18:29:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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