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Change subject: mb/google/hatch: Add variant finalize support for hatch devices
......................................................................
Patch Set 14:
(1 comment)
File src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/c/coreboot/+/68821/comment/63662d03_6e402442
PS13, Line 31: variant_finalize_gpio_table
> Sounds good, thanks.
Done
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Change subject: mb/google/hatch: Add variant finalize support for hatch devices
......................................................................
Patch Set 13:
(1 comment)
File src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/c/coreboot/+/68821/comment/133dc445_002c132f
PS13, Line 31: variant_finalize_gpio_table
> I agree this is confusing. […]
Sounds good, thanks.
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Change subject: [WIP] mb/prodrive/hermes: Add libgfxinit support
......................................................................
Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62648/comment/cfee42e8_b9fbb021
PS4, Line 8:
> > Possible unwrapped commit description (prefer a maximum 72 chars per line) […]
Done
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Change subject: mb/google/hatch: Add variant finalize support for hatch devices
......................................................................
Patch Set 13:
(1 comment)
File src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/c/coreboot/+/68821/comment/f1aa4aee_150db63a
PS13, Line 31: variant_finalize_gpio_table
> I found it. […]
I agree this is confusing.
I think what we can do to get the intended flexibility is to move the programming of the pins into into the mainboard_final and define a weak implementation of variant_finalize_gpio_table in the baseboard/gpio.c
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Hello build bot (Jenkins), Saurabh Mishra,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69107
to look at the new patch set (#3).
Change subject: vc/intel/fsp:Update JSL FSP headers from v2385.04 to v4155.00
......................................................................
vc/intel/fsp:Update JSL FSP headers from v2385.04 to v4155.00
The headers added are generated as per FSP v4155.00.
Previous FSP version was v2385.04
Changes Include:
FspsUpd.h: Change in header offset.
{FspmUpd.h,FspUpd.h}: Copyright year update.
MemInfoHob.h: Add HOB_GUID_TYPE, HOB_GENERIC_HEADER Struct.
BUG=b:TBD
BRANCH=firmware-dedede-13606.B
TEST=Build and boot JSLRVP
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com>
Change-Id: Ic4fae89d8d7fbbcb0448222d39dd829bc3f99644
---
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/MemInfoHob.h
4 files changed, 337 insertions(+), 280 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/69107/3
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Change subject: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path
......................................................................
Patch Set 8: Code-Review+1
(5 comments)
File src/arch/x86/cpu.c:
https://review.coreboot.org/c/coreboot/+/64342/comment/61c20097_fe5ebd1a
PS5, Line 224: return NULL;
Given the usage below, maybe it's best to die instead of returning NULL? How important is the CPU cluster device?
https://review.coreboot.org/c/coreboot/+/64342/comment/5e6dfbf7_073733d9
PS5, Line 233: cpu_cluster()
Can return NULL
https://review.coreboot.org/c/coreboot/+/64342/comment/c3c06e62_97912162
PS5, Line 254: return dev->path.apic.initial_lapicid;
When there are `N` CPU devices (`0` to `N - 1`) and one calls this function with `N` as `logical_cpu`, `dev` would be NULL.
File src/cpu/x86/lapic/lapic_cpu_init.c:
https://review.coreboot.org/c/coreboot/+/64342/comment/111c47f5_dd4ce2e5
PS8, Line 255: cpu_add_map_entry(info->index);
Where is `initial_lapicid` set?
https://review.coreboot.org/c/coreboot/+/64342/comment/24fa51a4_0561677e
PS8, Line 396: cpu_add_map_entry(info->index);
Where is `initial_lapicid` set?
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Hello build bot (Jenkins), Saurabh Mishra,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69107
to look at the new patch set (#2).
Change subject: vc/intel/fsp:Update JSL FSP headers from v2385.04 to v4155.00
......................................................................
vc/intel/fsp:Update JSL FSP headers from v2385.04 to v4155.00
The headers added are generated as per FSP v4155.00.
Previous FSP version was v2385.04
Changes Include:
FspsUpd.h: Change in header offset.
{FspmUpd.h,FspUpd.h & FirmwareVersionInfo.h}: Copyright year update.
MemInfoHob.h: Add HOB_GUID_TYPE, HOB_GENERIC_HEADER Struct.
BUG=b:TBD
BRANCH=firmware-dedede-13606.B
TEST=Build and boot JSLRVP
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com>
Change-Id: Ic4fae89d8d7fbbcb0448222d39dd829bc3f99644
---
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h
M src/vendorcode/intel/fsp/fsp2_0/jasperlake/MemInfoHob.h
4 files changed, 337 insertions(+), 280 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/69107/2
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Change subject: cpu/x86/mp_init.c: Handle failed init_bsp()
......................................................................
Patch Set 1:
(1 comment)
File src/cpu/x86/mp_init.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161910):
https://review.coreboot.org/c/coreboot/+/69109/comment/20d82bfe_cd270593
PS1, Line 590: if (init_bsp(cpu_bus) != CB_SUCCESS ) {
space prohibited before that close parenthesis ')'
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Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
......................................................................
Patch Set 4: Verified+1
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161909):
https://review.coreboot.org/c/coreboot/+/68893/comment/da4cde91_3689388b
PS4, Line 8:
Possible repeated word: 'are'
File src/cpu/x86/mp_init.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161909):
https://review.coreboot.org/c/coreboot/+/68893/comment/4f37a710_19e06471
PS4, Line 489: if (!cpu->enabled) {
braces {} are not necessary for any arm of this statement
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