Attention is currently required from: Arthur Heymans, Kyösti Mälkki, Felix Held.
Hello build bot (Jenkins), Kyösti Mälkki, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69114
to look at the new patch set (#3).
Change subject: mb/aopen/dxplplusu: Remove board
......................................................................
mb/aopen/dxplplusu: Remove board
This board use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.
Change-Id: Idf37ade31ddb55697df1a65062c092a0a485e175
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/smbios.c
M src/cpu/intel/Makefile.inc
D src/cpu/intel/socket_mPGA604/Kconfig
D src/cpu/intel/socket_mPGA604/Makefile.inc
M src/cpu/x86/Kconfig
M src/cpu/x86/smm/smmrelocate.S
D src/mainboard/aopen/Kconfig
D src/mainboard/aopen/Kconfig.name
D src/mainboard/aopen/dxplplusu/Kconfig
D src/mainboard/aopen/dxplplusu/Kconfig.name
D src/mainboard/aopen/dxplplusu/Makefile.inc
D src/mainboard/aopen/dxplplusu/acpi/e7505_pri.asl
D src/mainboard/aopen/dxplplusu/acpi/e7505_sec.asl
D src/mainboard/aopen/dxplplusu/acpi/i82801db.asl
D src/mainboard/aopen/dxplplusu/acpi/p64h2.asl
D src/mainboard/aopen/dxplplusu/acpi/power.asl
D src/mainboard/aopen/dxplplusu/acpi/scsi.asl
D src/mainboard/aopen/dxplplusu/acpi/superio.asl
D src/mainboard/aopen/dxplplusu/acpi_tables.c
D src/mainboard/aopen/dxplplusu/board_info.txt
D src/mainboard/aopen/dxplplusu/bootblock.c
D src/mainboard/aopen/dxplplusu/devicetree.cb
D src/mainboard/aopen/dxplplusu/dsdt.asl
D src/northbridge/intel/e7505/Kconfig
D src/northbridge/intel/e7505/Makefile.inc
D src/northbridge/intel/e7505/e7505.h
D src/northbridge/intel/e7505/memmap.c
D src/northbridge/intel/e7505/northbridge.c
D src/northbridge/intel/e7505/raminit.c
D src/northbridge/intel/e7505/raminit.h
D src/northbridge/intel/e7505/romstage.c
M src/southbridge/intel/common/smbus.c
D src/southbridge/intel/i82801dx/Kconfig
D src/southbridge/intel/i82801dx/Makefile.inc
D src/southbridge/intel/i82801dx/ac97.c
D src/southbridge/intel/i82801dx/bootblock.c
D src/southbridge/intel/i82801dx/chip.h
D src/southbridge/intel/i82801dx/early_smbus.c
D src/southbridge/intel/i82801dx/fadt.c
D src/southbridge/intel/i82801dx/i82801dx.c
D src/southbridge/intel/i82801dx/i82801dx.h
D src/southbridge/intel/i82801dx/ide.c
D src/southbridge/intel/i82801dx/lpc.c
D src/southbridge/intel/i82801dx/pci.c
D src/southbridge/intel/i82801dx/smi.c
D src/southbridge/intel/i82801dx/smihandler.c
D src/southbridge/intel/i82801dx/usb.c
D src/southbridge/intel/i82801dx/usb2.c
D src/southbridge/intel/i82870/82870.h
D src/southbridge/intel/i82870/Kconfig
D src/southbridge/intel/i82870/Makefile.inc
D src/southbridge/intel/i82870/ioapic.c
D src/southbridge/intel/i82870/pcibridge.c
M src/superio/smsc/Makefile.inc
D src/superio/smsc/lpc47m10x/Kconfig
D src/superio/smsc/lpc47m10x/Makefile.inc
D src/superio/smsc/lpc47m10x/early_serial.c
D src/superio/smsc/lpc47m10x/lpc47m10x.h
D src/superio/smsc/lpc47m10x/superio.c
59 files changed, 16 insertions(+), 5,262 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/69114/3
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idf37ade31ddb55697df1a65062c092a0a485e175
Gerrit-Change-Number: 69114
Gerrit-PatchSet: 3
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Gerrit-MessageType: newpatchset
Attention is currently required from: Tarun Tuli, Subrata Banik, Paul Menzel, Kapil Porwal, Arthur Heymans.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69091 )
Change subject: cbfstool/lz4: Fix compilation issue
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS1:
> > This is also fixed upstream (https://github.com/lz4/lz4/blob/dev/lib/lz4.c). […]
Generally uprevving sounds fine, but unfortunately in the case of LZ4 it seems that upstream has dropped the in-place decoding support we added (https://github.com/lz4/lz4/pull/185), at least I can't obviously tell that the latest upstream code (which has become quite a bit more complicated) still accounts for this. So if someone wants to uprev it, they would need to do some legwork first to really validate if the latest version still supports in-place properly, or fix it up if it doesn't.
Patchset:
PS3:
I'm surprised that you're getting this error? What exactly were you building in what way? It should have already been addressed with CB:63936.
--
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Gerrit-Change-Number: 69091
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69113
to look at the new patch set (#2).
Change subject: mb/*/*: Remove AMD agesa family16 boards
......................................................................
mb/*/*: Remove AMD agesa family16 boards
These boards use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.
Change-Id: I43c7075fb6418a86c57c863edccbcb750f8ed402
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/amd/olivehill/BiosCallOuts.c
D src/mainboard/amd/olivehill/Kconfig
D src/mainboard/amd/olivehill/Kconfig.name
D src/mainboard/amd/olivehill/Makefile.inc
D src/mainboard/amd/olivehill/OemCustomize.c
D src/mainboard/amd/olivehill/OptionsIds.h
D src/mainboard/amd/olivehill/acpi/gpe.asl
D src/mainboard/amd/olivehill/acpi/mainboard.asl
D src/mainboard/amd/olivehill/acpi/routing.asl
D src/mainboard/amd/olivehill/acpi/sata.asl
D src/mainboard/amd/olivehill/acpi/sleep.asl
D src/mainboard/amd/olivehill/acpi/superio.asl
D src/mainboard/amd/olivehill/acpi/thermal.asl
D src/mainboard/amd/olivehill/acpi/usb_oc.asl
D src/mainboard/amd/olivehill/board_info.txt
D src/mainboard/amd/olivehill/bootblock.c
D src/mainboard/amd/olivehill/buildOpts.c
D src/mainboard/amd/olivehill/cmos.layout
D src/mainboard/amd/olivehill/devicetree.cb
D src/mainboard/amd/olivehill/dsdt.asl
D src/mainboard/amd/olivehill/irq_tables.c
D src/mainboard/amd/olivehill/mainboard.c
D src/mainboard/asrock/imb-a180/BiosCallOuts.c
D src/mainboard/asrock/imb-a180/Kconfig
D src/mainboard/asrock/imb-a180/Kconfig.name
D src/mainboard/asrock/imb-a180/Makefile.inc
D src/mainboard/asrock/imb-a180/OemCustomize.c
D src/mainboard/asrock/imb-a180/OptionsIds.h
D src/mainboard/asrock/imb-a180/acpi/gpe.asl
D src/mainboard/asrock/imb-a180/acpi/mainboard.asl
D src/mainboard/asrock/imb-a180/acpi/routing.asl
D src/mainboard/asrock/imb-a180/acpi/sata.asl
D src/mainboard/asrock/imb-a180/acpi/sleep.asl
D src/mainboard/asrock/imb-a180/acpi/superio.asl
D src/mainboard/asrock/imb-a180/acpi/thermal.asl
D src/mainboard/asrock/imb-a180/acpi/usb_oc.asl
D src/mainboard/asrock/imb-a180/board_info.txt
D src/mainboard/asrock/imb-a180/bootblock.c
D src/mainboard/asrock/imb-a180/buildOpts.c
D src/mainboard/asrock/imb-a180/cmos.layout
D src/mainboard/asrock/imb-a180/devicetree.cb
D src/mainboard/asrock/imb-a180/dsdt.asl
D src/mainboard/asrock/imb-a180/irq_tables.c
D src/mainboard/asrock/imb-a180/mainboard.c
D src/mainboard/asus/am1i-a/BiosCallOuts.c
D src/mainboard/asus/am1i-a/Kconfig
D src/mainboard/asus/am1i-a/Kconfig.name
D src/mainboard/asus/am1i-a/Makefile.inc
D src/mainboard/asus/am1i-a/OemCustomize.c
D src/mainboard/asus/am1i-a/OptionsIds.h
D src/mainboard/asus/am1i-a/acpi/mainboard.asl
D src/mainboard/asus/am1i-a/acpi/routing.asl
D src/mainboard/asus/am1i-a/acpi/sata.asl
D src/mainboard/asus/am1i-a/acpi/sleep.asl
D src/mainboard/asus/am1i-a/acpi/superio.asl
D src/mainboard/asus/am1i-a/board_info.txt
D src/mainboard/asus/am1i-a/bootblock.c
D src/mainboard/asus/am1i-a/buildOpts.c
D src/mainboard/asus/am1i-a/cmos.default
D src/mainboard/asus/am1i-a/cmos.layout
D src/mainboard/asus/am1i-a/devicetree.cb
D src/mainboard/asus/am1i-a/dsdt.asl
D src/mainboard/asus/am1i-a/irq_tables.c
D src/mainboard/asus/am1i-a/mainboard.c
D src/mainboard/bap/Kconfig
D src/mainboard/bap/Kconfig.name
D src/mainboard/bap/ode_e20XX/BiosCallOuts.c
D src/mainboard/bap/ode_e20XX/Kconfig
D src/mainboard/bap/ode_e20XX/Kconfig.name
D src/mainboard/bap/ode_e20XX/Makefile.inc
D src/mainboard/bap/ode_e20XX/OemCustomize.c
D src/mainboard/bap/ode_e20XX/OptionsIds.h
D src/mainboard/bap/ode_e20XX/acpi/gpe.asl
D src/mainboard/bap/ode_e20XX/acpi/mainboard.asl
D src/mainboard/bap/ode_e20XX/acpi/routing.asl
D src/mainboard/bap/ode_e20XX/acpi/sata.asl
D src/mainboard/bap/ode_e20XX/acpi/sleep.asl
D src/mainboard/bap/ode_e20XX/acpi/superio.asl
D src/mainboard/bap/ode_e20XX/acpi/thermal.asl
D src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl
D src/mainboard/bap/ode_e20XX/board_info.txt
D src/mainboard/bap/ode_e20XX/bootblock.c
D src/mainboard/bap/ode_e20XX/buildOpts.c
D src/mainboard/bap/ode_e20XX/cmos.layout
D src/mainboard/bap/ode_e20XX/devicetree.cb
D src/mainboard/bap/ode_e20XX/dsdt.asl
D src/mainboard/bap/ode_e20XX/irq_tables.c
D src/mainboard/bap/ode_e20XX/mainboard.c
D src/mainboard/bap/ode_e20XX/spd/BAP_Q7_1066.spd.hex
D src/mainboard/bap/ode_e20XX/spd/BAP_Q7_800.spd.hex
D src/mainboard/biostar/a68n_5200/BiosCallOuts.c
D src/mainboard/biostar/a68n_5200/Kconfig
D src/mainboard/biostar/a68n_5200/Kconfig.name
D src/mainboard/biostar/a68n_5200/Makefile.inc
D src/mainboard/biostar/a68n_5200/OemCustomize.c
D src/mainboard/biostar/a68n_5200/OptionsIds.h
D src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl
D src/mainboard/biostar/a68n_5200/acpi/gpe.asl
D src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
D src/mainboard/biostar/a68n_5200/acpi/routing.asl
D src/mainboard/biostar/a68n_5200/acpi/sata.asl
D src/mainboard/biostar/a68n_5200/acpi/sleep.asl
D src/mainboard/biostar/a68n_5200/acpi/superio.asl
D src/mainboard/biostar/a68n_5200/acpi/thermal.asl
D src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl
D src/mainboard/biostar/a68n_5200/board_info.txt
D src/mainboard/biostar/a68n_5200/bootblock.c
D src/mainboard/biostar/a68n_5200/buildOpts.c
D src/mainboard/biostar/a68n_5200/cmos.layout
D src/mainboard/biostar/a68n_5200/devicetree.cb
D src/mainboard/biostar/a68n_5200/dsdt.asl
D src/mainboard/biostar/a68n_5200/irq_tables.c
D src/mainboard/biostar/a68n_5200/mainboard.c
D src/mainboard/biostar/am1ml/BiosCallOuts.c
D src/mainboard/biostar/am1ml/Kconfig
D src/mainboard/biostar/am1ml/Kconfig.name
D src/mainboard/biostar/am1ml/Makefile.inc
D src/mainboard/biostar/am1ml/OemCustomize.c
D src/mainboard/biostar/am1ml/OptionsIds.h
D src/mainboard/biostar/am1ml/acpi/flag0.asl
D src/mainboard/biostar/am1ml/acpi/gpe.asl
D src/mainboard/biostar/am1ml/acpi/ide.asl
D src/mainboard/biostar/am1ml/acpi/mainboard.asl
D src/mainboard/biostar/am1ml/acpi/routing.asl
D src/mainboard/biostar/am1ml/acpi/sata.asl
D src/mainboard/biostar/am1ml/acpi/sio.asl
D src/mainboard/biostar/am1ml/acpi/sleep.asl
D src/mainboard/biostar/am1ml/acpi/superio.asl
D src/mainboard/biostar/am1ml/acpi/thermal.asl
D src/mainboard/biostar/am1ml/acpi/usb_oc.asl
D src/mainboard/biostar/am1ml/board_info.txt
D src/mainboard/biostar/am1ml/bootblock.c
D src/mainboard/biostar/am1ml/buildOpts.c
D src/mainboard/biostar/am1ml/cmos.layout
D src/mainboard/biostar/am1ml/devicetree.cb
D src/mainboard/biostar/am1ml/dsdt.asl
D src/mainboard/biostar/am1ml/irq_tables.c
D src/mainboard/biostar/am1ml/mainboard.c
D src/mainboard/gizmosphere/Kconfig
D src/mainboard/gizmosphere/Kconfig.name
D src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c
D src/mainboard/gizmosphere/gizmo2/Kconfig
D src/mainboard/gizmosphere/gizmo2/Kconfig.name
D src/mainboard/gizmosphere/gizmo2/Makefile.inc
D src/mainboard/gizmosphere/gizmo2/OemCustomize.c
D src/mainboard/gizmosphere/gizmo2/OptionsIds.h
D src/mainboard/gizmosphere/gizmo2/acpi/gpe.asl
D src/mainboard/gizmosphere/gizmo2/acpi/mainboard.asl
D src/mainboard/gizmosphere/gizmo2/acpi/routing.asl
D src/mainboard/gizmosphere/gizmo2/acpi/sata.asl
D src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl
D src/mainboard/gizmosphere/gizmo2/acpi/superio.asl
D src/mainboard/gizmosphere/gizmo2/acpi/thermal.asl
D src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl
D src/mainboard/gizmosphere/gizmo2/board_info.txt
D src/mainboard/gizmosphere/gizmo2/bootblock.c
D src/mainboard/gizmosphere/gizmo2/buildOpts.c
D src/mainboard/gizmosphere/gizmo2/cmos.layout
D src/mainboard/gizmosphere/gizmo2/devicetree.cb
D src/mainboard/gizmosphere/gizmo2/dsdt.asl
D src/mainboard/gizmosphere/gizmo2/irq_tables.c
D src/mainboard/gizmosphere/gizmo2/mainboard.c
D src/mainboard/gizmosphere/gizmo2/spd/Micron_MT41J128M16JT.spd.hex
D src/mainboard/hp/abm/BiosCallOuts.c
D src/mainboard/hp/abm/Kconfig
D src/mainboard/hp/abm/Kconfig.name
D src/mainboard/hp/abm/Makefile.inc
D src/mainboard/hp/abm/OemCustomize.c
D src/mainboard/hp/abm/OptionsIds.h
D src/mainboard/hp/abm/acpi/gpe.asl
D src/mainboard/hp/abm/acpi/mainboard.asl
D src/mainboard/hp/abm/acpi/routing.asl
D src/mainboard/hp/abm/acpi/sata.asl
D src/mainboard/hp/abm/acpi/sleep.asl
D src/mainboard/hp/abm/acpi/superio.asl
D src/mainboard/hp/abm/acpi/thermal.asl
D src/mainboard/hp/abm/acpi/usb_oc.asl
D src/mainboard/hp/abm/board_info.txt
D src/mainboard/hp/abm/bootblock.c
D src/mainboard/hp/abm/buildOpts.c
D src/mainboard/hp/abm/cmos.layout
D src/mainboard/hp/abm/devicetree.cb
D src/mainboard/hp/abm/dsdt.asl
D src/mainboard/hp/abm/irq_tables.c
D src/mainboard/hp/abm/mainboard.c
185 files changed, 13 insertions(+), 10,568 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/69113/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I43c7075fb6418a86c57c863edccbcb750f8ed402
Gerrit-Change-Number: 69113
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69123 )
Change subject: cpu/x86: Set up a separate stack for APs
......................................................................
cpu/x86: Set up a separate stack for APs
APs use a lot less stack, so set up a separate stack for those in .bss.
Now that CPU_INFO_V2 is the only code path that is used, there is no
need to align stacks in c_start.S.
Change-Id: I7a681a2e3003da0400843daa5d6d6180d952abf5
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/c_start.S
M src/cpu/x86/Kconfig
M src/cpu/x86/mp_init.c
3 files changed, 29 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/69123/1
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S
index 02a9b89..e4f52e4 100644
--- a/src/arch/x86/c_start.S
+++ b/src/arch/x86/c_start.S
@@ -11,11 +11,9 @@
.global _estack
.global _stack_size
-/* Stack alignment is not enforced with rmodule loader, reserve one
- * extra CPU such that alignment can be enforced on entry. */
-.align CONFIG_STACK_SIZE
+.align 16
_stack:
-.space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE
+.space CONFIG_STACK_SIZE
_estack:
.set _stack_size, _estack - _stack
@@ -76,7 +74,7 @@
/* Set new stack with enforced alignment. */
movl $_estack, %esp
- andl $(~(CONFIG_STACK_SIZE-1)), %esp
+ andl $(0xfffffff0), %esp
push_cpu_info
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index 1d6b489..7927e52 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -209,4 +209,11 @@
However, modern OSes use PAT to control cacheability instead of
using MTRRs.
+config AP_STACK_SIZE
+ hex
+ default 0x200
+ help
+ This is the amount of stack each AP needs. The BSP stack size can be
+ larger and is set with STACK_SIZE.
+
endif # ARCH_X86
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index e3b294f..6cfa96e 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -209,6 +209,8 @@
park_this_cpu(NULL);
}
+static __aligned(16) uint8_t ap_stack[CONFIG_AP_STACK_SIZE * CONFIG_MAX_CPUS];
+
static void setup_default_sipi_vector_params(struct sipi_params *sp)
{
sp->gdt = (uintptr_t)&gdt;
@@ -216,8 +218,8 @@
sp->idt_ptr = (uintptr_t)&idtarg;
sp->per_cpu_segment_descriptors = (uintptr_t)&per_cpu_segment_descriptors;
sp->per_cpu_segment_selector = per_cpu_segment_selector;
- sp->stack_size = CONFIG_STACK_SIZE;
- sp->stack_top = ALIGN_DOWN((uintptr_t)&_estack, CONFIG_STACK_SIZE);
+ sp->stack_size = CONFIG_AP_STACK_SIZE;
+ sp->stack_top = (uintptr_t)ap_stack + ARRAY_SIZE(ap_stack);
}
static const unsigned int fixed_mtrrs[NUM_FIXED_MTRRS] = {
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7a681a2e3003da0400843daa5d6d6180d952abf5
Gerrit-Change-Number: 69123
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69122 )
Change subject: cpu/x86: Drop !CPU_INFO_V2 code
......................................................................
cpu/x86: Drop !CPU_INFO_V2 code
Now that all platforms use parallel_mp this is the only codepath used
for cpu_info() local thread storage.
Change-Id: I119214e703aea8a4fe93f83b784159cf86d859d3
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/Kconfig
M src/arch/x86/c_start.S
M src/arch/x86/include/arch/cpu.h
M src/cpu/x86/Kconfig
M src/security/intel/txt/getsec_enteraccs.S
5 files changed, 16 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/69122/1
diff --git a/src/Kconfig b/src/Kconfig
index b33ea62..08b2437 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -715,7 +715,7 @@
config COOP_MULTITASKING
def_bool n
select TIMER_QUEUE
- depends on ARCH_X86 && CPU_INFO_V2
+ depends on ARCH_X86
help
Cooperative multitasking allows callbacks to be multiplexed on the
main thread. With this enabled it allows for multiple execution paths
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S
index 84fbed2..02a9b89 100644
--- a/src/arch/x86/c_start.S
+++ b/src/arch/x86/c_start.S
@@ -80,7 +80,6 @@
push_cpu_info
-#if CONFIG(CPU_INFO_V2)
/* Allocate the per_cpu_segment_data on the stack */
push_per_cpu_segment_data
@@ -93,7 +92,6 @@
mov $per_cpu_segment_selector, %eax
movl (%eax), %eax
mov %eax, %gs
-#endif
/*
* Now we are finished. Memory is up, data is copied and
@@ -222,7 +220,6 @@
.word 0xffff, 0x0000
.byte 0x00, 0x9b, 0xaf, 0x00
#endif
-#if CONFIG(CPU_INFO_V2)
per_cpu_segment_descriptors:
.rept CONFIG_MAX_CPUS
/* flat data segment */
@@ -233,14 +230,11 @@
.byte 0x00, 0x93, 0xcf, 0x00
#endif
.endr
-#endif /* CPU_INFO_V2 */
gdt_end:
-#if CONFIG(CPU_INFO_V2)
/* Segment selector pointing to the first per_cpu_segment_descriptor. */
per_cpu_segment_selector:
.long per_cpu_segment_descriptors - gdt
-#endif /* CPU_INFO_V2 */
.section ".text._start", "ax", @progbits
#if ENV_X86_64
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 3402215..ca33423 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -150,7 +150,6 @@
static inline struct cpu_info *cpu_info(void)
{
/* We use a #if because we don't want to mess with the &s below. */
-#if CONFIG(CPU_INFO_V2)
struct cpu_info *ci = NULL;
__asm__("mov %%gs:%c[offset], %[ci]"
@@ -159,11 +158,6 @@
);
return ci;
-#else
- char s;
- uintptr_t info = ALIGN_UP((uintptr_t)&s, CONFIG_STACK_SIZE) - sizeof(struct cpu_info);
- return (struct cpu_info *)info;
-#endif /* CPU_INFO_V2 */
}
struct cpuinfo_x86 {
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index b136e9e..1d6b489 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -2,7 +2,6 @@
config PARALLEL_MP
def_bool y
- select CPU_INFO_V2
help
This option uses common MP infrastructure for bringing up APs
in parallel. It additionally provides a more flexible mechanism
@@ -210,12 +209,4 @@
However, modern OSes use PAT to control cacheability instead of
using MTRRs.
-config CPU_INFO_V2
- bool
- depends on PARALLEL_MP
- help
- Enables the new method of locating struct cpu_info. This new method
- uses the %gs segment to locate the cpu_info pointer. The old method
- relied on the stack being CONFIG_STACK_SIZE aligned.
-
endif # ARCH_X86
diff --git a/src/security/intel/txt/getsec_enteraccs.S b/src/security/intel/txt/getsec_enteraccs.S
index cbb24b6..ff9db05 100644
--- a/src/security/intel/txt/getsec_enteraccs.S
+++ b/src/security/intel/txt/getsec_enteraccs.S
@@ -227,7 +227,7 @@
movd %esp, %xmm0
movd %ebp, %xmm1
- /* Backup %gs used by CPU_INFO_V2 */
+ /* Backup %gs used by cpu_info() */
movl %gs, %eax
movd %eax, %xmm2
@@ -265,7 +265,7 @@
movl %eax, %es
movl %eax, %ss
movl %eax, %fs
- /* Restore %gs used by CPU_INFO_V2 */
+ /* Restore %gs used by cpu_info */
movd %xmm2, %eax
movl %eax, %gs
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I119214e703aea8a4fe93f83b784159cf86d859d3
Gerrit-Change-Number: 69122
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange