coreboot-gerrit November 2022

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[XL] Change in coreboot[master]: {cpu/nb}/amd/family16: Remove platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

1 0

[XL] Change in coreboot[master]: vendorcode/amd/agesa/fam15tn: Drop unused platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/69125 ) Change subject: vendorcode/amd/agesa/fam15tn: Drop unused platform ...................................................................... vendorcode/amd/agesa/fam15tn: Drop unused platform This platform use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: I749cf33fad12bb9bc5cd5d682df2652107d60a0f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/amd/agesa/Makefile.inc D src/vendorcode/amd/agesa/f15tn/AGESA.h D src/vendorcode/amd/agesa/f15tn/AMD.h D src/vendorcode/amd/agesa/f15tn/Config/OptionApmInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionC6Install.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpbInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuCacheFlushOnHaltInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuCoreLevelingInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuFamiliesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuFeaturesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionDmiInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionFchInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionGfxRecoveryInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionGnbInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHtInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHtcInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHwC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionIdsInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionIoCstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionL3FeaturesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionLowPwrPstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMemoryInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMmioMapInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMsgBasedC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMultiSocketInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPreserveMailboxInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPsiInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPstateHpcModeInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionS3ScriptInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSlitInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSratInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSwC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionWheaInstall.h D src/vendorcode/amd/agesa/f15tn/Config/PlatformInstall.h D src/vendorcode/amd/agesa/f15tn/Dispatcher.h D src/vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h D src/vendorcode/amd/agesa/f15tn/Include/CommonReturns.h D src/vendorcode/amd/agesa/f15tn/Include/Filecode.h D src/vendorcode/amd/agesa/f15tn/Include/GeneralServices.h D src/vendorcode/amd/agesa/f15tn/Include/GnbInterface.h D src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h D src/vendorcode/amd/agesa/f15tn/Include/Ids.h D src/vendorcode/amd/agesa/f15tn/Include/IdsHt.h D src/vendorcode/amd/agesa/f15tn/Include/OptionDmi.h D src/vendorcode/amd/agesa/f15tn/Include/OptionGfxRecovery.h D src/vendorcode/amd/agesa/f15tn/Include/OptionGnb.h D src/vendorcode/amd/agesa/f15tn/Include/OptionMemory.h D src/vendorcode/amd/agesa/f15tn/Include/OptionMultiSocket.h D src/vendorcode/amd/agesa/f15tn/Include/OptionPstate.h D src/vendorcode/amd/agesa/f15tn/Include/OptionSlit.h D src/vendorcode/amd/agesa/f15tn/Include/OptionSrat.h D src/vendorcode/amd/agesa/f15tn/Include/OptionWhea.h D src/vendorcode/amd/agesa/f15tn/Include/Options.h D src/vendorcode/amd/agesa/f15tn/Include/OptionsHt.h D src/vendorcode/amd/agesa/f15tn/Include/OptionsPage.h D src/vendorcode/amd/agesa/f15tn/Include/PlatformMemoryConfiguration.h D src/vendorcode/amd/agesa/f15tn/Include/Topology.h D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c D src/vendorcode/amd/agesa/f15tn/MainPage.h D src/vendorcode/amd/agesa/f15tn/Makefile.inc D src/vendorcode/amd/agesa/f15tn/OptionsIds.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/F15PstateHpcMode.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnC6State.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnInitEarlyTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnIoCstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMsrTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPackageType.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPciTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerMgmtSystemTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerPlane.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerPlane.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnSharedMsrTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnUtilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnUtilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCoreAfterReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCoreAfterReset.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnDmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnHtc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnNbAfterReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnNbAfterReset.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerCheck.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerCheck.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPsi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuCommonF15Utilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuCommonF15Utilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Apm.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15BrandId.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15CacheDefaults.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Crat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Dmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Dmi.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MsrTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PciTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerCheck.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerCheck.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Utilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Utilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/cpuFamRegisters.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/PreserveMailbox.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/PreserveMailbox.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuApm.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuApm.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuC6State.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuC6State.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCdit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCoreLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCpb.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCpb.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCrat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCrat.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuDmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHtc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHtc.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHwC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHwC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuIoCstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuIoCstate.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuL3Features.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuL3Features.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuLowPwrPstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuLowPwrPstate.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuMsgBasedC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuMsgBasedC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPsi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPsi.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateGather.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateHpcMode.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateHpcMode.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateTables.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSlit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSrat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSwC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSwC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuWhea.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/TableHt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cahalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cahaltasm.S D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuApicUtilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuApicUtilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuBist.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuBrandId.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEnvInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuInitEarlyTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuLateInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuLateInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPage.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtMultiSocket.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtMultiSocket.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSingleSocket.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSingleSocket.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSystemTables.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuServices.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuWarmReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/mmioMapManager.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/mmioMapManager.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdFch.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitEarly.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitPost.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitResume.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdLateRunApTask.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3Save.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonInits.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonInits.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3RestoreState.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/AcpiLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/AcpiLib.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchBiosRamUsage.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommon.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonSmm.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchDef.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchPeLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/MemLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/PciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Fch.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitS3.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchTaskLauncher.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchTaskLauncher.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/InitEnvDef.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/InitResetDef.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppPortInit.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataEnvLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Hudson2LpcEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Hudson2LpcResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciRecovery.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/Gnb.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbFuseTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfxFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbIommu.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbLibFeatures.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbLibFeatures.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcieFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbRegistersLN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbRegistersTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtEarly.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtLate.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtMid.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtPost.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtReset.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtS3Save.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Include/Library/GnbTimerLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Library/GnbTimerLibWrap0/GnbTimerLibWrap0.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Library/GnbTimerLibWrap0/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/GnbTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigMid.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxPostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbBapmCoeffCalcTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbBapmCoeffCalcTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbCacWeightsTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbEarlyInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbFuseTableTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbFuseTableTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbInitTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbInitTNInstall.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbIommuIvrsTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbPostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbRegisterAccTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbRegisterAccTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFM2.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFM2.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFS1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieComplexDataTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieComplexDataTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieConfigTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieEarlyInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieLibTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieLibTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbMSocketLib/GnbMSocketLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbMSocketLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibDebugLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibMmioData.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPciLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPortData.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieService.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuVidReq.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/GnbPcieInitLibV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieMaxPayloadV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieMaxPayloadV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePowerMgmtV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePowerMgmtV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieServiceV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieSmuServiceV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieSmuVidReqV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSSocketLib/GnbSSocketLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSview/GnbSview.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSview/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/GnbTable.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/GnbTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbFam15Mod1x.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbUtilitiesFam15Mod1x.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbUtilitiesFam15Mod1x.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/htFeat.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htFeat.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htGraph.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterface.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterface.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceCoherent.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceCoherent.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceGeneral.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceGeneral.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceNonCoherent.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceNonCoherent.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htMain.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNb.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNb.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNbCommonHardware.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNotify.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNotify.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htPage.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htTopologies.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsCtrl.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsNvToCmos.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsNvToCmos.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebug.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpHdtout.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpHdtout.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpRedirectIo.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpSerial.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsIdtTable.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/IdsF15AllService.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/IdsF15AllService.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/IdsLib.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/IdsPage.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Perf/IdsPerf.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ardk/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ardk/ma.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/mfchi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/mfchi.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CRAT/mfCrat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CRAT/mfCrat.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/mfcsi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/mfcsi.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/DMI/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/DMI/mfDMI.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfecc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfecc.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfemp.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/EXCLUDIMM/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/mfintlvrn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/mfintlvrn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/mflvddr3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/mflvddr3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/MEMCLR/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/MEMCLR/mfmemclr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/PARTRN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/PARTRN/mfStandardTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/S3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/S3/mfs3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/TABLE/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/TABLE/mftds.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/TN/mmflowtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mdef.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/merrhdl.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/minit.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmConditionalPso.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmEcc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmExcludeDimm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmLvDdr3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemClr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmNodeInterleave.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmOnlineSpare.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmParallelTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmStandardTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmUmaAlloc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmflow.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmlvddr3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mu.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnS3tn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mndcttn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnflowtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnidendimmtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnmcttn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnottn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnphytn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mns3tn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnS3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnfeat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnflow.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnmct.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnreg.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mntrain3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FM2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FM2/mpUtnfm2.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FP2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FP2/mpStnfp2.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FS1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FS1/mpStnfs1.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mpStn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mpUtn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mp.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplribt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplrnlr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplrnpr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpmaxfreq.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpmr0.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpodtpat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprc10opspd.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprc2ibt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprtt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpsao.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpseeds.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mt3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mt3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtrci3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtrci3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtsdi3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtsdi3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtspd3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtspd3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mttecc3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mttwl3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mthdi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttEdgeDetect.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttEdgeDetect.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttdimbt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttecc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttml.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttoptsrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttsrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/ma.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/memPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/merrhdl.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfParallelTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfStandardTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfmemclr.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfs3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mftds.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mnreg.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mp.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mport.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mt.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mu.h D src/vendorcode/amd/agesa/f15tn/gcccar.inc 813 files changed, 13 insertions(+), 277,329 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/69125/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I749cf33fad12bb9bc5cd5d682df2652107d60a0f Gerrit-Change-Number: 69125 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

[XL] Change in coreboot[master]: vendorcode/amd/agesa/fam14: Remove dropped platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/69124 ) Change subject: vendorcode/amd/agesa/fam14: Remove dropped platform ...................................................................... vendorcode/amd/agesa/fam14: Remove dropped platform This platform use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: I9dd3ce763418ff767acd0c55be26a998df77081b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/amd/agesa/Makefile.inc D src/vendorcode/amd/agesa/f14/AGESA.h D src/vendorcode/amd/agesa/f14/AMD.h D src/vendorcode/amd/agesa/f14/Config/OptionC6Install.h D src/vendorcode/amd/agesa/f14/Config/OptionCpbInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuCacheFlushOnHaltInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuCoreLevelingInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuFamiliesInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuFeaturesInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionDmiInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionFamily14hInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionGfxRecoveryInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionGnbInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHtAssistInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHtInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHwC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionIdsInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionIoCstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionLowPwrPstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMemoryInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMsgBasedC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMultiSocketInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionPreserveMailboxInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionPstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionS3ScriptInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSlitInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSratInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSwC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionWheaInstall.h D src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h D src/vendorcode/amd/agesa/f14/Dispatcher.h D src/vendorcode/amd/agesa/f14/Include/AdvancedApi.h D src/vendorcode/amd/agesa/f14/Include/CommonReturns.h D src/vendorcode/amd/agesa/f14/Include/Filecode.h D src/vendorcode/amd/agesa/f14/Include/GeneralServices.h D src/vendorcode/amd/agesa/f14/Include/GnbInterface.h D src/vendorcode/amd/agesa/f14/Include/GnbInterfaceStub.h D src/vendorcode/amd/agesa/f14/Include/Ids.h D src/vendorcode/amd/agesa/f14/Include/IdsHt.h D src/vendorcode/amd/agesa/f14/Include/OptionDmi.h D src/vendorcode/amd/agesa/f14/Include/OptionFamily12hEarlySample.h D src/vendorcode/amd/agesa/f14/Include/OptionFamily14hEarlySample.h D src/vendorcode/amd/agesa/f14/Include/OptionGfxRecovery.h D src/vendorcode/amd/agesa/f14/Include/OptionGnb.h D src/vendorcode/amd/agesa/f14/Include/OptionMemory.h D src/vendorcode/amd/agesa/f14/Include/OptionMultiSocket.h D src/vendorcode/amd/agesa/f14/Include/OptionPstate.h D src/vendorcode/amd/agesa/f14/Include/OptionSlit.h D src/vendorcode/amd/agesa/f14/Include/OptionSrat.h D src/vendorcode/amd/agesa/f14/Include/OptionWhea.h D src/vendorcode/amd/agesa/f14/Include/Options.h D src/vendorcode/amd/agesa/f14/Include/OptionsHt.h D src/vendorcode/amd/agesa/f14/Include/OptionsPage.h D src/vendorcode/amd/agesa/f14/Include/PlatformMemoryConfiguration.h D src/vendorcode/amd/agesa/f14/Include/Topology.h D src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c D src/vendorcode/amd/agesa/f14/Legacy/Proc/Makefile.inc D src/vendorcode/amd/agesa/f14/Legacy/Proc/agesaCallouts.c D src/vendorcode/amd/agesa/f14/Legacy/Proc/hobTransfer.c D src/vendorcode/amd/agesa/f14/MainPage.h D src/vendorcode/amd/agesa/f14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14C6State.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14IoCstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14PackageType.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnCpb.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnLogicalIdTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnMicrocodePatchTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnPciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuCommonF14Utilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuCommonF14Utilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14BrandId.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14BrandIdFt1.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14CacheDefaults.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Dmi.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14LowPowerInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14LowPowerInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14MsrTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PerCorePciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerCheck.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerCheck.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerMgmtSystemTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerPlane.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerPlane.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Pstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14SoftwareThermal.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14SoftwareThermal.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Utilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Utilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14WheaInitDataTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/cpuFamRegisters.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c D src/vendorcode/amd/agesa/f14/Proc/CPU/S3.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Table.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cahalt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cahaltasm.S D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuApicUtilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuApicUtilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuBist.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuBrandId.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEarlyInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEarlyInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEnvInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEventLog.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuFamilyTranslation.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuFamilyTranslation.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuGeneralServices.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuInitEarlyTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuLateInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuLateInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuMicrocodePatch.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPage.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPostInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPostInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtMultiSocket.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtMultiSocket.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSingleSocket.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSingleSocket.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSystemTables.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuServices.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuWarmReset.c D src/vendorcode/amd/agesa/f14/Proc/CPU/heapManager.c D src/vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c D src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c D src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.h D src/vendorcode/amd/agesa/f14/Proc/Common/CommonPage.h D src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c D src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c D src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h D src/vendorcode/amd/agesa/f14/Proc/Common/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Common/S3RestoreState.c D src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c D src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/Gnb.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbGfx.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbGfxFamServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbLibFeatures.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbLibFeatures.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbPcie.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbPcieFamServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbRegistersON.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/0x14/F14GfxServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/GfxFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxGmcInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxGmcInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtEnvPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtEnvPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtMidPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtMidPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxRegisterAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxRegisterAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxStrapsInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxStrapsInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtEarly.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtLate.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtMid.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtReset.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSbLink.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSbLink.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkNclkRatio.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkNclkRatio.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbPowerGate.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbPowerGate.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmu.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/NbFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbFuseTable.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbFuseTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbLclkDpm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbLclkDpm.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEarly.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEarly.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEnv.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtLatePost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtLatePost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtReset.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtReset.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioDefinitions.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/PcieFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEarlyPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEarlyPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEnv.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtLatePost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtLatePost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieLateInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieLateInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieMiscLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieMiscLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.h D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h D src/vendorcode/amd/agesa/f14/Proc/HT/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/HT/htFeat.c D src/vendorcode/amd/agesa/f14/Proc/HT/htFeat.h D src/vendorcode/amd/agesa/f14/Proc/HT/htGraph.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterface.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterface.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceCoherent.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceCoherent.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceGeneral.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceGeneral.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceNonCoherent.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceNonCoherent.h D src/vendorcode/amd/agesa/f14/Proc/HT/htMain.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNb.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNb.h D src/vendorcode/amd/agesa/f14/Proc/HT/htNbHardwareFam10.h D src/vendorcode/amd/agesa/f14/Proc/HT/htNotify.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNotify.h D src/vendorcode/amd/agesa/f14/Proc/HT/htPage.h D src/vendorcode/amd/agesa/f14/Proc/HT/htTopologies.h D src/vendorcode/amd/agesa/f14/Proc/IDS/IdsLib.h D src/vendorcode/amd/agesa/f14/Proc/IDS/IdsPage.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/mason3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/mauon3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ma.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/mfchi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/mfchi.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/mfcsi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/mfcsi.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/DMI/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/DMI/mfDMI.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfecc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfecc.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfemp.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/EXCLUDIMM/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/mfidendimm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/mfidendimm.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/mfintlvrn.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/mfintlvrn.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/mflvddr3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/mflvddr3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/MEMCLR/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/MEMCLR/mfmemclr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/PARTRN/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/PARTRN/mfStandardTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/TABLE/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/TABLE/mftds.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/ON/mmflowon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mdef.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/merrhdl.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/minit.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmConditionalPso.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmEcc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmExcludeDimm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmLvDdr3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemClr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmNodeInterleave.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmOnlineSpare.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmParallelTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmStandardTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmUmaAlloc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmflow.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmlvddr3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mu.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnS3on.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnS3on.h D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mndcton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnflowon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnidendimmon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnmcton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnon.h D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnoton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnphyon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnprotoon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnS3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnfeat.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnflow.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnreg.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mntrain2.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mntrain3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/mpson3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/mpuon3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mp.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplribt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplrnlr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplrnpr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpmaxfreq.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpmr0.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpodtpat.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprc10opspd.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprc2ibt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprtt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpsao.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mt3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mt3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtot3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtot3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtrci3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtrci3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtsdi3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtsdi3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mttecc3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mttwl3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mthdi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttEdgeDetect.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttEdgeDetect.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttdimbt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttecc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mtthrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttml.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttoptsrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttsrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/ma.h D src/vendorcode/amd/agesa/f14/Proc/Mem/memPage.h D src/vendorcode/amd/agesa/f14/Proc/Mem/merrhdl.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfParallelTraining.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfStandardTraining.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfmemclr.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfs3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mftds.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mm.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mp.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mport.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mt.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mu.h D src/vendorcode/amd/agesa/f14/errno.h D src/vendorcode/amd/agesa/f14/gcccar.inc 550 files changed, 13 insertions(+), 158,343 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/69124/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd3ce763418ff767acd0c55be26a998df77081b Gerrit-Change-Number: 69124 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

[XL] Change in coreboot[master]: vendorcode/amd/agesa: Drop unused common code
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69127 ) Change subject: vendorcode/amd/agesa: Drop unused common code ...................................................................... vendorcode/amd/agesa: Drop unused common code No platform uses this. Change-Id: If32a4de7ef263f1d4f7ab7a36751ad9dcf52dc7e Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/amd/Makefile.inc D src/vendorcode/amd/agesa/Kconfig D src/vendorcode/amd/agesa/Makefile.inc D src/vendorcode/amd/agesa/common/Makefile.inc D src/vendorcode/amd/agesa/common/agesa-entry-cfg.h D src/vendorcode/amd/agesa/common/agesa-entry.c D src/vendorcode/amd/agesa/common/amdlib.c D src/vendorcode/amd/agesa/common/amdlib.h D src/vendorcode/amd/agesa/common/debug_util.c D src/vendorcode/amd/agesa/common/debug_util.h 10 files changed, 12 insertions(+), 2,217 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/69127/1 diff --git a/src/vendorcode/amd/Makefile.inc b/src/vendorcode/amd/Makefile.inc index 8cce5e6..9cdbe60 100644 --- a/src/vendorcode/amd/Makefile.inc +++ b/src/vendorcode/amd/Makefile.inc @@ -1,3 +1,2 @@ subdirs-y += pi -subdirs-y += agesa subdirs-y += cimx diff --git a/src/vendorcode/amd/agesa/Kconfig b/src/vendorcode/amd/agesa/Kconfig deleted file mode 100644 index 4468cc3..0000000 --- a/src/vendorcode/amd/agesa/Kconfig +++ /dev/null @@ -1,196 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -config IDS_OPTIONS_HOOKED_UP - bool - help - to Kconfig options. - Historically, IDS configuration was defined in a mainboard-specific - `OptionsIds.h` header. Select this on platforms where IDS config is - hooked up to Kconfig options instead. - -if IDS_OPTIONS_HOOKED_UP - -config IDS_ENABLED - bool "Enable AGESA IDS (Integrated Debug Services) support" - default y - help - This is the master switch for the IDS sub-system. Use this option to - enable or remove the entire IDS feature set. This switch must be TRUE - for any of the other options to function. - -comment "Warning: IDS options may not work. Enable at your own risk!" - depends on IDS_ENABLED - -config IDS_CONTROL_ENABLED - bool "Enable IDS User Interface controls" - depends on IDS_ENABLED - help - This is the main switch for the IDS configuration controls. This - switch must be TRUE for any of the configuration controls to function. - - This seems to allow AGESA to retrieve settings from CMOS. - -config IDS_PERF_ANALYSIS - bool "Enable IDS performance analysis" - depends on IDS_ENABLED - help - This is the main switch for the IDS performance analysis controls, - macros and support code needed to enable time data gathering. This - switch must be TRUE for any of the performance analysis features to - function. - -config IDS_TRACING_ENABLED - bool "Enable IDS console" - depends on IDS_ENABLED - help - This is the main switch for the IDS console controls, macros and - support code needed to enable tracing of algorithms. This switch - must be TRUE for any of the tracing features to function. - -config IDS_TRACING_CONSOLE_SERIAL - bool "Use serial port as IDS console" - depends on IDS_TRACING_ENABLED - default DRIVERS_UART_8250IO && CONSOLE_SERIAL - help - Use an I/O-mapped serial port to output IDS messages. - -endif # IDS_OPTIONS_HOOKED_UP - -choice - prompt "DDR3 memory profile" - default CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC - help - Choose the DDR3 memory profile to use for your RAM sticks, e.g. XMP 1. - XMP support is experimental, and your PC will fail booting if you choose - a profile which does not exist on ANY of your RAM sticks! If in doubt - check their SPD Data using a coreboot's great fork of memtest86+ 5.01. - -config CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC - bool "JEDEC" - help - JEDEC memory profile, standard and stable. Is guaranteed to be working. - -config CPU_AMD_AGESA_OPENSOURCE_MEM_XMP_1 - bool "XMP 1" - help - XMP 1 memory profile. Check that it exists on ALL of your RAM sticks! - -config CPU_AMD_AGESA_OPENSOURCE_MEM_XMP_2 - bool "XMP 2" - help - XMP 2 memory profile. Check that it exists on ALL of your RAM sticks! - -config CPU_AMD_AGESA_OPENSOURCE_MEM_CUSTOM - bool "CUSTOM" - help - Custom memory profile. Use the XMP SPD values as the base, if available. - -endchoice - -if CPU_AMD_AGESA_OPENSOURCE_MEM_CUSTOM - -config CUSTOM_SPD_DIVIDENT - int "[10]: Medium Timebase (MTB) Dividend" - default 1 - range 1 255 - -config CUSTOM_SPD_DIVISOR - int "[11]: Medium Timebase (MTB) Divisor" - default 14 - range 1 255 - -config CUSTOM_SPD_TCK - int "[12]: SDRAM Minimum Cycle Time, tCK" - default 15 - range 1 255 - -config CUSTOM_SPD_CASLO - int "[14]: CAS Latencies Supported, Lower Byte" - default 124 - range 0 255 - -config CUSTOM_SPD_CASHI - int "[15]: CAS Latencies Supported, Higher Byte" - default 0 - range 0 255 - -config CUSTOM_SPD_TAA - int "[16]: Min CAS Latency Time, tAA" - default 132 - range 1 255 - -config CUSTOM_SPD_TWR - int "[17]: Min Write Recovery Time, tWR" - default 210 - range 1 255 - -config CUSTOM_SPD_TRCD - int "[18]: Min RAS# to CAS# Delay Time, tRCD" - default 132 - range 1 255 - -config CUSTOM_SPD_TRRD - int "[19]: Min Row Active to Row Active Delay Time, tRRD" - default 84 - range 1 255 - -config CUSTOM_SPD_TRP - int "[20]: Min Row Precharge Delay Time, tRP" - default 132 - range 1 255 - -config CUSTOM_SPD_UPPER_TRC - int "[21][7:4]: Min Active to Active/Refresh Delay, UPPER tRC" - default 2 - range 0 16 - -config CUSTOM_SPD_UPPER_TRAS - int "[21][3:0]: Min Active to Precharge Delay Time, UPPER tRAS" - default 1 - range 0 16 - -config CUSTOM_SPD_TRAS - int "[22]: Min Active to Precharge Delay Time, LOWER tRAS" - default 138 - range 1 255 - -config CUSTOM_SPD_TRC - int "[23]: Min Active to Active/Refresh Delay, LOWER tRC" - default 181 - range 1 255 - -if CPU_AMD_AGESA_FAMILY16_KB - -config CUSTOM_SPD_TRFC_LO - int "[24]: Min Refresh Recovery Delay Time, LOWER tRFC" - default 56 - range 1 255 - -config CUSTOM_SPD_TRFC_HI - int "[25]: Min Refresh Recovery Delay Time, UPPER tRFC" - default 14 - range 0 255 - -endif - -config CUSTOM_SPD_TWTR - int "[26]: Min Internal Write to Read Command Delay, tWTR" - default 105 - range 1 255 - -config CUSTOM_SPD_TRTP - int "[27]: Min Internal Read to Precharge Command Delay, tRTP" - default 105 - range 1 255 - -config CUSTOM_SPD_UPPER_TFAW - int "[28][3:0]: Min Four Activate Window Delay, UPPER tFAW" - default 1 - range 0 16 - -config CUSTOM_SPD_TFAW - int "[29]: Min Four Activate Window Delay Time, tFAW" - default 164 - range 1 255 - -endif diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc deleted file mode 100644 index 9d78195..0000000 --- a/src/vendorcode/amd/agesa/Makefile.inc +++ /dev/null @@ -1,41 +0,0 @@ - -ifeq ($(CONFIG_CPU_AMD_AGESA),y) - -subdirs-y += common - -classes-y += libagesa -libagesa-y = -libagesa-generic-ccopts += -D__LIBAGESA__ -libagesa-generic-ccopts += $(AGESA_INC) $(AGESA_AUTOINCLUDES) -libagesa-generic-ccopts += -Wno-pragma-pack -Wno-unused-but-set-variable -libagesa-generic-ccopts += -Wno-implicit-fallthrough - -romstage-generic-ccopts += -Wno-pragma-pack -ramstage-generic-ccopts += -Wno-pragma-pack - -AGESA_CFLAGS := -march=k8-sse3 -mtune=k8-sse3 -fno-strict-aliasing - -CFLAGS_x86_32 += $(AGESA_CFLAGS) -CFLAGS_x86_64 += $(AGESA_CFLAGS) - -ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) -$(eval $(call create_class_compiler,libagesa,x86_32)) -else -$(eval $(call create_class_compiler,libagesa,x86_64)) -endif - -$(obj)/libagesa.a: $$(libagesa-objs) - @printf " AGESA $(subst $(obj)/,,$(@))\n" - $(AR_libagesa) rcsDT $@ $+ - -romstage-libs += $(obj)/libagesa.a -ramstage-libs += $(obj)/libagesa.a - -# buildOpts should be in libagesa -$(obj)/romstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES) -$(obj)/ramstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES) - -$(obj)/romstage/vendorcode/amd/agesa/common/agesa-entry.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES) -$(obj)/ramstage/vendorcode/amd/agesa/common/agesa-entry.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES) - -endif diff --git a/src/vendorcode/amd/agesa/common/Makefile.inc b/src/vendorcode/amd/agesa/common/Makefile.inc deleted file mode 100644 index a7ddc7f..0000000 --- a/src/vendorcode/amd/agesa/common/Makefile.inc +++ /dev/null @@ -1,36 +0,0 @@ -#***************************************************************************** -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# * Neither the name of Advanced Micro Devices, Inc. nor the names of -# its contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY -# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -#***************************************************************************** - -romstage-y += agesa-entry.c -ramstage-y += agesa-entry.c - -libagesa-y += debug_util.c -libagesa-y += amdlib.c - -# Do not optimise performance-critical low-level IO for size with -Os, -# request -O2 with -falign-functions. - -$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2 diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h deleted file mode 100644 index 3302574..0000000 --- a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef AGESA_ENTRY_CFG_H -#define AGESA_ENTRY_CFG_H - - -#if ENV_RAMINIT - -#define AGESA_ENTRY_INIT_RESET TRUE -#define AGESA_ENTRY_INIT_EARLY TRUE -#define AGESA_ENTRY_INIT_POST TRUE - -#define AGESA_ENTRY_INIT_RESUME CONFIG(HAVE_ACPI_RESUME) - -#else - -#define AGESA_ENTRY_INIT_ENV TRUE -#define AGESA_ENTRY_INIT_LATE_RESTORE CONFIG(HAVE_ACPI_RESUME) - -#define AGESA_ENTRY_INIT_MID TRUE -#define AGESA_ENTRY_INIT_LATE TRUE -#define AGESA_ENTRY_INIT_S3SAVE \ - (CONFIG(HAVE_ACPI_RESUME) || \ - CONFIG(ENABLE_MRC_CACHE)) - -#endif - -/* Not required. */ -#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE - -/* Required for any multi-core. */ -#define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE - -/* Deprecated, reference source is removed from the tree. */ -#define AGESA_ENTRY_INIT_RECOVERY FALSE - -/* Defaults below. */ - -/* Process user desired AGESA entry points */ -#ifndef AGESA_ENTRY_INIT_RESET - #define AGESA_ENTRY_INIT_RESET FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_EARLY - #define AGESA_ENTRY_INIT_EARLY FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_POST - #define AGESA_ENTRY_INIT_POST FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_ENV - #define AGESA_ENTRY_INIT_ENV FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_MID - #define AGESA_ENTRY_INIT_MID FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_LATE - #define AGESA_ENTRY_INIT_LATE FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_S3SAVE - #define AGESA_ENTRY_INIT_S3SAVE FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_RESUME - #define AGESA_ENTRY_INIT_RESUME FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_LATE_RESTORE - #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE -#endif - -#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES - #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE -#endif - -#ifndef AGESA_ENTRY_LATE_RUN_AP_TASK - #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE -#endif - -#endif /* AGESA_ENTRY_CFG_H */ diff --git a/src/vendorcode/amd/agesa/common/agesa-entry.c b/src/vendorcode/amd/agesa/common/agesa-entry.c deleted file mode 100644 index 42f12b3..0000000 --- a/src/vendorcode/amd/agesa/common/agesa-entry.c +++ /dev/null @@ -1,165 +0,0 @@ -#include <Porting.h> -#include <AMD.h> -#include <AGESA.h> - -#include "CommonReturns.h" - -#include <heapManager.h> -#include <CreateStruct.h> - -#include <Options.h> - -#include <agesa-entry-cfg.h> - -CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] = -{ - #if AGESA_ENTRY_INIT_RESET == TRUE - { AMD_INIT_RESET, - sizeof (AMD_RESET_PARAMS), - (PF_AGESA_FUNCTION) AmdInitResetConstructor, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_INIT_RESET_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_EARLY == TRUE - { AMD_INIT_EARLY, - sizeof (AMD_EARLY_PARAMS), - (PF_AGESA_FUNCTION) AmdInitEarlyInitializer, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_INIT_EARLY_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_ENV == TRUE - { AMD_INIT_ENV, - sizeof (AMD_ENV_PARAMS), - (PF_AGESA_FUNCTION) AmdInitEnvInitializer, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_INIT_ENV_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_LATE == TRUE - { AMD_INIT_LATE, - sizeof (AMD_LATE_PARAMS), - (PF_AGESA_FUNCTION) AmdInitLateInitializer, - (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor, - AMD_INIT_LATE_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_MID == TRUE - { AMD_INIT_MID, - sizeof (AMD_MID_PARAMS), - (PF_AGESA_FUNCTION) AmdInitMidInitializer, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_INIT_MID_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_POST == TRUE - { AMD_INIT_POST, - sizeof (AMD_POST_PARAMS), - (PF_AGESA_FUNCTION) AmdInitPostInitializer, - (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor, - AMD_INIT_POST_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_RESUME == TRUE - { AMD_INIT_RESUME, - sizeof (AMD_RESUME_PARAMS), - (PF_AGESA_FUNCTION) AmdInitResumeInitializer, - (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor, - AMD_INIT_RESUME_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE - { AMD_S3LATE_RESTORE, - sizeof (AMD_S3LATE_PARAMS), - (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_S3_LATE_RESTORE_HANDLE - }, - #endif - - #if AGESA_ENTRY_INIT_S3SAVE == TRUE - { AMD_S3_SAVE, - sizeof (AMD_S3SAVE_PARAMS), - (PF_AGESA_FUNCTION) AmdS3SaveInitializer, - (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor, - AMD_S3_SAVE_HANDLE - }, - #endif - - #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE - { AMD_LATE_RUN_AP_TASK, - sizeof (AP_EXE_PARAMS), - (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer, - (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess, - AMD_LATE_RUN_AP_TASK_HANDLE - }, - #endif - { 0, 0, NULL } -}; - -CONST UINTN InitializerCount = ARRAY_SIZE(FuncParamsInfo); - -CONST DISPATCH_TABLE ROMDATA DispatchTable[] = -{ - { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct }, - { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct }, - - #if AGESA_ENTRY_INIT_RESET == TRUE - { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset }, - #endif - - #if AGESA_ENTRY_INIT_EARLY == TRUE - { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly }, - #endif - - #if AGESA_ENTRY_INIT_POST == TRUE - { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost }, - #endif - - #if AGESA_ENTRY_INIT_ENV == TRUE - { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv }, - #endif - - #if AGESA_ENTRY_INIT_MID == TRUE - { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid }, - #endif - - #if AGESA_ENTRY_INIT_LATE == TRUE - { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate }, - #endif - - #if AGESA_ENTRY_INIT_S3SAVE == TRUE - { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save }, - #endif - - #if AGESA_ENTRY_INIT_RESUME == TRUE - { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume }, - #endif - - #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE - { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore }, - #endif - - { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog }, - - #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE - { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId }, - { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress }, - { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore }, - { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm }, - { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize }, - #endif - - #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE - { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask }, - #endif - { 0, NULL } -}; diff --git a/src/vendorcode/amd/agesa/common/amdlib.c b/src/vendorcode/amd/agesa/common/amdlib.c deleted file mode 100644 index dbfdce8..0000000 --- a/src/vendorcode/amd/agesa/common/amdlib.c +++ /dev/null @@ -1,1266 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Library - * - * Contains interface to the AMD AGESA library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Lib - * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#include "AGESA.h" -#include "Ids.h" -#include "cpuRegisters.h" -#include "amdlib.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - -#define FILECODE LIB_AMDLIB_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - - -BOOLEAN -STATIC -GetPciMmioAddress ( - OUT UINT64 *MmioAddress, - OUT UINT32 *MmioSize, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -STATIC -LibAmdGetDataFromPtr ( - IN ACCESS_WIDTH AccessWidth, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - OUT UINT32 *TemData, - OUT UINT32 *TempDataMask - ); - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ -UINT8 -ReadIo8 ( - IN UINT16 Address - ) -{ - return __inbyte (Address); -} -UINT16 -ReadIo16 ( - IN UINT16 Address - ) -{ - return __inword (Address); -} -UINT32 -ReadIo32 ( - IN UINT16 Address - ) -{ - return __indword (Address); -} -VOID -WriteIo8 ( - IN UINT16 Address, - IN UINT8 Data - ) -{ - __outbyte (Address, Data); -} -VOID -WriteIo16 ( - IN UINT16 Address, - IN UINT16 Data - ) -{ - __outword (Address, Data); -} -VOID -WriteIo32 ( - IN UINT16 Address, - IN UINT32 Data - ) -{ - __outdword (Address, Data); -} -STATIC -UINT64 SetFsBase ( - UINT64 address - ) -{ - UINT64 hwcr; - hwcr = __readmsr (0xC0010015); - __writemsr (0xC0010015, hwcr | 1 << 17); - __writemsr (0xC0000100, address); - return hwcr; -} -STATIC -VOID -RestoreHwcr ( - UINT64 - value - ) -{ - __writemsr (0xC0010015, value); -} -UINT8 -Read64Mem8 ( - IN UINT64 Address - ) -{ - UINT8 dataRead; - UINT64 hwcrSave; - if ((Address >> 32) == 0) { - return *(volatile UINT8 *) (UINTN) Address; - } - hwcrSave = SetFsBase (Address); - dataRead = __readfsbyte (0); - RestoreHwcr (hwcrSave); - return dataRead; -} -UINT16 -Read64Mem16 ( - IN UINT64 Address - ) -{ - UINT16 dataRead; - UINT64 hwcrSave; - if ((Address >> 32) == 0) { - return *(volatile UINT16 *) (UINTN) Address; - } - hwcrSave = SetFsBase (Address); - dataRead = __readfsword (0); - RestoreHwcr (hwcrSave); - return dataRead; -} -UINT32 -Read64Mem32 ( - IN UINT64 Address - ) -{ - UINT32 dataRead; - UINT64 hwcrSave; - if ((Address >> 32) == 0) { - return *(volatile UINT32 *) (UINTN) Address; - } - hwcrSave = SetFsBase (Address); - dataRead = __readfsdword (0); - RestoreHwcr (hwcrSave); - return dataRead; - } -VOID -Write64Mem8 ( - IN UINT64 Address, - IN UINT8 Data - ) -{ - if ((Address >> 32) == 0){ - *(volatile UINT8 *) (UINTN) Address = Data; - } - else { - UINT64 hwcrSave; - hwcrSave = SetFsBase (Address); - __writefsbyte (0, Data); - RestoreHwcr (hwcrSave); - } -} -VOID -Write64Mem16 ( - IN UINT64 Address, - IN UINT16 Data - ) -{ - if ((Address >> 32) == 0){ - *(volatile UINT16 *) (UINTN) Address = Data; - } - else { - UINT64 hwcrSave; - hwcrSave = SetFsBase (Address); - __writefsword (0, Data); - RestoreHwcr (hwcrSave); - } -} -VOID -Write64Mem32 ( - IN UINT64 Address, - IN UINT32 Data - ) -{ - if ((Address >> 32) == 0){ - *(volatile UINT32 *) (UINTN) Address = Data; - } - else { - UINT64 hwcrSave; - hwcrSave = SetFsBase (Address); - __writefsdword (0, Data); - RestoreHwcr (hwcrSave); - } -} -VOID -LibAmdReadCpuReg ( - IN UINT8 RegNum, - OUT UINT32 *Value - ) -{ - *Value = 0; - switch (RegNum){ - case CR4_REG: - *Value = __readcr4 (); - break; - case DR0_REG: - *Value = __readdr (0); - break; - case DR1_REG: - *Value = __readdr (1); - break; - case DR2_REG: - *Value = __readdr (2); - break; - case DR3_REG: - *Value = __readdr (3); - break; - case DR7_REG: - *Value = __readdr (7); - break; - default: - *Value = -1; - break; - } -} -VOID -LibAmdWriteCpuReg ( - IN UINT8 RegNum, - IN UINT32 Value - ) -{ - switch (RegNum){ - case CR4_REG: - __writecr4 (Value); - break; - case DR0_REG: - __writedr (0, Value); - break; - case DR1_REG: - __writedr (1, Value); - break; - case DR2_REG: - __writedr (2, Value); - break; - case DR3_REG: - __writedr (3, Value); - break; - case DR7_REG: - __writedr (7, Value); - break; - default: - break; - } -} -VOID -LibAmdWriteBackInvalidateCache ( - IN VOID - ) -{ - __wbinvd (); -} -VOID -LibAmdHDTBreakPoint ( - VOID - ) -{ - __writemsr (0xC001100A, __readmsr (0xC001100A) | 1); - __debugbreak (); // do you really need icebp? If so, go back to asm code -} -UINT8 -LibAmdBitScanForward ( - IN UINT32 value - ) -{ - UINTN Index; - for (Index = 0; Index < 32; Index++){ - if (value & (1 << Index)) break; - } - return (UINT8) Index; -} - -UINT8 -LibAmdBitScanReverse ( - IN UINT32 value -) -{ - uint8_t bit = 31; - do { - if (value & (1 << 31)) - return bit; - - value <<= 1; - bit--; - - } while (value != 0); - - return 0xFF; /* Error code indicating no bit found */ -} - -VOID -LibAmdMsrRead ( - IN UINT32 MsrAddress, - OUT UINT64 *Value, - IN OUT AMD_CONFIG_PARAMS *ConfigPtr - ) -{ - *Value = __readmsr (MsrAddress); -} -VOID -LibAmdMsrWrite ( - IN UINT32 MsrAddress, - CONST IN UINT64 *Value, - IN OUT AMD_CONFIG_PARAMS *ConfigPtr - ) -{ - __writemsr (MsrAddress, *Value); -} -void LibAmdCpuidRead ( - IN UINT32 CpuidFcnAddress, - OUT CPUID_DATA* Value, - IN OUT AMD_CONFIG_PARAMS *ConfigPtr - ) -{ - __cpuid ((int *)Value, CpuidFcnAddress); -} -UINT64 -ReadTSC ( - VOID - ) -{ - return __rdtsc (); -} -VOID -LibAmdSimNowEnterDebugger ( - VOID - ) -{ - STATIC CONST UINT8 opcode [] = {0x60, // pushad - 0xBB, 0x02, 0x00, 0x00, 0x00, // mov ebx, 2 - 0xB8, 0x0B, 0xD0, 0xCC, 0xBA, // mov eax, 0xBACCD00B - 0x0F, 0xA2, // cpuid - 0x61, // popad - 0xC3 // ret - }; - ((VOID (*)(VOID)) (size_t) opcode) (); // call the function -} - -#ifdef __SSE3__ -VOID F10RevDProbeFilterCritical ( - IN PCI_ADDR PciAddress, - IN UINT32 PciRegister - ) -{ - UINT64 msrsave; - msrsave = __readmsr (0xC001001F); - __writemsr (0xC001001F, msrsave | 1ULL << 46); // EnableCf8ExtCfg - _mm_mfence (); - __outdword (0xCF8, PciAddress.AddressValue); - _mm_mfence (); - __outdword (0xCFC, PciRegister | 2); - _mm_mfence (); - __writemsr (0xC001001F, msrsave); -} - -VOID -LibAmdCLFlush ( - IN UINT64 Address, - IN UINT8 Count - ) -{ - UINT64 hwcrSave; - UINT8 *address32; - UINTN Index; - address32 = 0; - hwcrSave = SetFsBase (Address); - for (Index = 0; Index < Count; Index++){ - _mm_mfence (); - _mm_clflush_fs (&address32 [Index * 64]); - } - RestoreHwcr (hwcrSave); -} -#endif //__SSE3__ - -VOID -StopHere ( - VOID - ) -{ - VOLATILE UINTN x = 1; - while (x); -} - -VOID -LibAmdFinit() -{ - /* TODO: finit */ - __asm__ volatile ("finit"); -} -/*---------------------------------------------------------------------------------------*/ -/** - * Read IO port - * - * - * @param[in] AccessWidth Access width - * @param[in] IoAddress IO port address - * @param[in] Value Pointer to save data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdIoRead ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - *(UINT8 *) Value = ReadIo8 (IoAddress); - break; - case AccessWidth16: - case AccessS3SaveWidth16: - *(UINT16 *) Value = ReadIo16 (IoAddress); - break; - case AccessWidth32: - case AccessS3SaveWidth32: - *(UINT32 *) Value = ReadIo32 (IoAddress); - break; - default: - ASSERT (FALSE); - break; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Write IO port - * - * - * @param[in] AccessWidth Access width - * @param[in] IoAddress IO port address - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdIoWrite ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - WriteIo8 (IoAddress, *(UINT8 *) Value); - break; - case AccessWidth16: - case AccessS3SaveWidth16: - WriteIo16 (IoAddress, *(UINT16 *) Value); - break; - case AccessWidth32: - case AccessS3SaveWidth32: - WriteIo32 (IoAddress, *(UINT32 *) Value); - break; - default: - ASSERT (FALSE); - break; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * IO read modify write - * - * - * @param[in] AccessWidth Access width - * @param[in] IoAddress IO address - * @param[in] Data OR data - * @param[in] DataMask Mask to be used before data write back to register. - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdIoRMW ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value = 0; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader); - Value = (Value & (~TempMask)) | TempData; - LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Poll IO register - * - * Poll register until (RegisterValue & DataMask) == Data - * - * @param[in] AccessWidth Access width - * @param[in] IoAddress IO address - * @param[in] Data Data to compare - * @param[in] DataMask And mask - * @param[in] Delay Poll for time in 100ns (not supported) - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdIoPoll ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - do { - LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader); - } while (TempData != (Value & TempMask)); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Read memory/MMIO - * - * - * @param[in] AccessWidth Access width - * @param[in] MemAddress Memory address - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdMemRead ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - *(UINT8 *) Value = Read64Mem8 (MemAddress); - break; - case AccessWidth16: - case AccessS3SaveWidth16: - *(UINT16 *) Value = Read64Mem16 (MemAddress); - break; - case AccessWidth32: - case AccessS3SaveWidth32: - *(UINT32 *) Value = Read64Mem32 (MemAddress); - break; - default: - ASSERT (FALSE); - break; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Write memory/MMIO - * - * - * @param[in] AccessWidth Access width - * @param[in] MemAddress Memory address - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdMemWrite ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - Write64Mem8 (MemAddress, *((UINT8 *) Value)); - break; - case AccessWidth16: - case AccessS3SaveWidth16: - Write64Mem16 (MemAddress, *((UINT16 *) Value)); - break; - case AccessWidth32: - case AccessS3SaveWidth32: - Write64Mem32 (MemAddress, *((UINT32 *) Value)); - break; - default: - ASSERT (FALSE); - break; - } -} -/*---------------------------------------------------------------------------------------*/ -/** - * Memory/MMIO read modify write - * - * - * @param[in] AccessWidth Access width - * @param[in] MemAddress Memory address - * @param[in] Data OR data - * @param[in] DataMask Mask to be used before data write back to register. - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdMemRMW ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader); - Value = (Value & (~TempMask)) | TempData; - LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Poll Mmio - * - * Poll register until (RegisterValue & DataMask) == Data - * - * @param[in] AccessWidth Access width - * @param[in] MemAddress Memory address - * @param[in] Data Data to compare - * @param[in] DataMask AND mask - * @param[in] Delay Poll for time in 100ns (not supported) - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdMemPoll ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - do { - LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader); - } while (TempData != (Value & TempMask)); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Read PCI config space - * - * - * @param[in] AccessWidth Access width - * @param[in] PciAddress Pci address - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdPciRead ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 LegacyPciAccess; - UINT32 MMIOSize; - UINT64 RMWrite; - UINT64 RMWritePrevious; - UINT64 MMIOAddress; - - ASSERT (StdHeader != NULL); - ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO); - if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) { - // We need to convert our "portable" PCI address into a "real" PCI access - LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8))); - if (PciAddress.Address.Register <= 0xFF) { - LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader); - LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader); - } else { - LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader); - RMWrite = RMWritePrevious | 0x0000400000000000ull; - LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader); - LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader); - LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader); - LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader); - } - } else { - // Setup the MMIO address - ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF))); - MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF); - LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader); - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Write PCI config space - * - * - * @param[in] AccessWidth Access width - * @param[in] PciAddress Pci address - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdPciWrite ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 LegacyPciAccess; - UINT32 MMIOSize; - UINT64 RMWrite; - UINT64 RMWritePrevious; - UINT64 MMIOAddress; - - ASSERT (StdHeader != NULL); - ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO); - if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) { - // We need to convert our "portable" PCI address into a "real" PCI access - LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8))); - if (PciAddress.Address.Register <= 0xFF) { - LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader); - LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader); - } else { - LibAmdMsrRead (NB_CFG, &RMWritePrevious, StdHeader); - RMWrite = RMWritePrevious | 0x0000400000000000ull; - LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader); - LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader); - LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader); - LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader); - } - } else { - // Setup the MMIO address - ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF))); - MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF); - LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader); - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * PCI read modify write - * - * - * @param[in] AccessWidth Access width - * @param[in] PciAddress Pci address - * @param[in] Data OR Data - * @param[in] DataMask Mask to be used before data write back to register. - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdPciRMW ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader); - Value = (Value & (~TempMask)) | TempData; - LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Poll PCI config space register - * - * Poll register until (RegisterValue & DataMask) == Data - * - * @param[in] AccessWidth Access width - * @param[in] PciAddress Pci address - * @param[in] Data Data to compare - * @param[in] DataMask AND mask - * @param[in] Delay Poll for time in 100ns (not supported) - * @param[in] StdHeader Standard configuration header - * - */ -VOID -LibAmdPciPoll ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 TempData = 0; - UINT32 TempMask = 0; - UINT32 Value; - LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask); - do { - LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader); - } while (TempData != (Value & TempMask)); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Get MMIO base address for PCI accesses - * - * @param[out] MmioAddress PCI MMIO base address - * @param[out] MmioSize Size of region in bytes - * @param[in] StdHeader Standard configuration header - * - * @retval TRUE MmioAddress/MmioSize are valid - */ -BOOLEAN -STATIC -GetPciMmioAddress ( - OUT UINT64 *MmioAddress, - OUT UINT32 *MmioSize, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - BOOLEAN MmioIsEnabled; - UINT32 EncodedSize; - UINT64 MsrReg; - - ASSERT (StdHeader != NULL); - - MmioIsEnabled = FALSE; - LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader); - if ((MsrReg & BIT0) != 0) { - *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull; - EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2); - *MmioSize = ((1 << EncodedSize) * 0x100000); - MmioIsEnabled = TRUE; - } - return MmioIsEnabled; -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Read field of PCI config register. - * - * - * - * @param[in] Address Pci address (register must be DWORD aligned) - * @param[in] Highbit High bit position of the field in DWORD - * @param[in] Lowbit Low bit position of the field in DWORD - * @param[out] Value Pointer to data - * @param[in] StdHeader Standard configuration header - */ -VOID -LibAmdPciReadBits ( - IN PCI_ADDR Address, - IN UINT8 Highbit, - IN UINT8 Lowbit, - OUT UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0); - - LibAmdPciRead (AccessWidth32, Address, Value, StdHeader); - *Value >>= Lowbit; // Shift - - // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case - - if ((Highbit - Lowbit) != 31) { - *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1); - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Write field of PCI config register. - * - * - * - * @param[in] Address Pci address (register must be DWORD aligned) - * @param[in] Highbit High bit position of the field in DWORD - * @param[in] Lowbit Low bit position of the field in DWORD - * @param[in] Value Pointer to data - * @param[in] StdHeader Standard configuration header - */ -VOID -LibAmdPciWriteBits ( - IN PCI_ADDR Address, - IN UINT8 Highbit, - IN UINT8 Lowbit, - IN CONST UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 Temp; - UINT32 Mask; - - ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0); - - // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case - - if ((Highbit - Lowbit) != 31) { - Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1); - } else { - Mask = (UINT32) 0xFFFFFFFF; - } - - LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader); - Temp &= ~(Mask << Lowbit); - Temp |= (*Value & Mask) << Lowbit; - LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Locate next capability pointer - * - * Given a SBDFO this routine will find the next PCI capabilities list entry. - * if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is - * returned. - * To start a new search from the head of the list, specify a SBDFO with an offset of zero. - * - * @param[in,out] Address Pci address - * @param[in] StdHeader Standard configuration header - */ - -VOID -LibAmdPciFindNextCap ( - IN OUT PCI_ADDR *Address, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - PCI_ADDR Base; - UINT32 Offset; - UINT32 Temp; - PCI_ADDR TempAddress; - - ASSERT (Address != NULL); - ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO); - - Base.AddressValue = Address->AddressValue; - Offset = Base.Address.Register; - Base.Address.Register = 0; - - Address->AddressValue = (UINT32) ILLEGAL_SBDFO; - - // Verify that the SBDFO points to a valid PCI device SANITY CHECK - LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader); - if (Temp == 0xFFFFFFFF) { - ASSERT (FALSE); - return; // There is no device at this address - } - - // Verify that the device supports a capability list - TempAddress.AddressValue = Base.AddressValue + 0x04; - LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader); - if (Temp == 0) { - return; // This PCI device does not support capability lists - } - - if (Offset != 0) { - // If we are continuing on an existing list - TempAddress.AddressValue = Base.AddressValue + Offset; - LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader); - } else { - // We are starting on a new list - TempAddress.AddressValue = Base.AddressValue + 0x34; - LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader); - } - - if (Temp == 0) { - return; // We have reached the end of the capabilities list - } - - // Error detection and recovery- The statement below protects against - // PCI devices with broken PCI capabilities lists. Detect a pointer - // that is not uint32 aligned, points into the first 64 reserved DWORDs - // or points back to itself. - if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) { - ASSERT (FALSE); - return; - } - - Address->AddressValue = Base.AddressValue + Temp; - return; -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Set memory with value - * - * - * @param[in,out] Destination Pointer to memory range - * @param[in] Value Value to set memory with - * @param[in] FillLength Size of the memory range - * @param[in] StdHeader Standard configuration header (Optional) - */ -VOID -LibAmdMemFill ( - IN VOID *Destination, - IN UINT8 Value, - IN UINTN FillLength, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 *Dest; - ASSERT (StdHeader != NULL); - Dest = Destination; - while ((FillLength--) != 0) { - *Dest++ = Value; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Copy memory - * - * - * @param[in,out] Destination Pointer to destination buffer - * @param[in] Source Pointer to source buffer - * @param[in] CopyLength buffer length - * @param[in] StdHeader Standard configuration header (Optional) - */ -VOID -LibAmdMemCopy ( - IN VOID *Destination, - IN CONST VOID *Source, - IN UINTN CopyLength, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 *Dest; - CONST UINT8 *SourcePtr; - ASSERT (StdHeader != NULL); - Dest = Destination; - SourcePtr = Source; - while ((CopyLength--) != 0) { - *Dest++ = *SourcePtr++; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Returns the package type mask for the processor - * - * - * @param[in] StdHeader Standard configuration header (Optional) - */ - -// Returns the package type mask for the processor -UINT32 -LibAmdGetPackageType ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 ProcessorPackageType; - CPUID_DATA CpuId; - - LibAmdCpuidRead (0x80000001, &CpuId, StdHeader); - ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28 - return (UINT32) (1 << ProcessorPackageType); -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Returns the package type mask for the processor - * - * - * @param[in] AccessWidth Access width - * @param[in] Data data - * @param[in] DataMask data - * @param[out] TemData typecast data - * @param[out] TempDataMask typecast data - */ - - -VOID -STATIC -LibAmdGetDataFromPtr ( - IN ACCESS_WIDTH AccessWidth, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - OUT UINT32 *TemData, - OUT UINT32 *TempDataMask - ) -{ - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - *TemData = (UINT32)*(UINT8 *) Data; - *TempDataMask = (UINT32)*(UINT8 *) DataMask; - break; - case AccessWidth16: - case AccessS3SaveWidth16: - *TemData = (UINT32)*(UINT16 *) Data; - *TempDataMask = (UINT32)*(UINT16 *) DataMask; - break; - case AccessWidth32: - case AccessS3SaveWidth32: - *TemData = *(UINT32 *) Data; - *TempDataMask = *(UINT32 *) DataMask; - break; - default: - IDS_ERROR_TRAP; - break; - } -} - -/*---------------------------------------------------------------------------------------*/ -/** - * Returns the package type mask for the processor - * - * - * @param[in] AccessWidth Access width - * @retval Width in number of bytes - */ - - -UINT8 -LibAmdAccessWidth ( - IN ACCESS_WIDTH AccessWidth - ) -{ - UINT8 Width; - - switch (AccessWidth) { - case AccessWidth8: - case AccessS3SaveWidth8: - Width = 1; - break; - case AccessWidth16: - case AccessS3SaveWidth16: - Width = 2; - break; - case AccessWidth32: - case AccessS3SaveWidth32: - Width = 4; - break; - case AccessWidth64: - case AccessS3SaveWidth64: - Width = 8; - break; - default: - Width = 0; - IDS_ERROR_TRAP; - break; - } - return Width; -} - -VOID -CpuidRead ( - IN UINT32 CpuidFcnAddress, - OUT CPUID_DATA *Value - ) -{ - __cpuid ((int *)Value, CpuidFcnAddress); -} - -UINT8 -ReadNumberOfCpuCores( - VOID - ) -{ - CPUID_DATA Value; - CpuidRead (0x80000008, &Value); - return Value.ECX_Reg & 0xff; -} diff --git a/src/vendorcode/amd/agesa/common/amdlib.h b/src/vendorcode/amd/agesa/common/amdlib.h deleted file mode 100644 index 5ba3952..0000000 --- a/src/vendorcode/amd/agesa/common/amdlib.h +++ /dev/null @@ -1,398 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Library - * - * Contains interface to the AMD AGESA library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Lib - * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -#ifndef _AMD_LIB_H_ -#define _AMD_LIB_H_ - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ -#define IOCF8 0xCF8 -#define IOCFC 0xCFC - -// Reg Values for ReadCpuReg and WriteCpuReg -#define CR0_REG 0x00 -#define CR4_REG 0x04 -#define DR0_REG 0x10 -#define DR1_REG 0x11 -#define DR2_REG 0x12 -#define DR3_REG 0x13 -#define DR7_REG 0x17 - -UINT8 -ReadIo8 ( - IN UINT16 Address - ); - -UINT16 -ReadIo16 ( - IN UINT16 Address - ); - -UINT32 -ReadIo32 ( - IN UINT16 Address - ); - -VOID -WriteIo8 ( - IN UINT16 Address, - IN UINT8 Data - ); - -VOID -WriteIo16 ( - IN UINT16 Address, - IN UINT16 Data - ); - -VOID -WriteIo32 ( - IN UINT16 Address, - IN UINT32 Data - ); - -UINT8 -Read64Mem8 ( - IN UINT64 Address - ); - -UINT16 -Read64Mem16 ( - IN UINT64 Address - ); - -UINT32 -Read64Mem32 ( - IN UINT64 Address - ); - -VOID -Write64Mem8 ( - IN UINT64 Address, - IN UINT8 Data - ); - -VOID -Write64Mem16 ( - IN UINT64 Address, - IN UINT16 Data - ); - -VOID -Write64Mem32 ( - IN UINT64 Address, - IN UINT32 Data - ); - -UINT64 -ReadTSC ( - VOID - ); - -// MSR -VOID -LibAmdMsrRead ( - IN UINT32 MsrAddress, - OUT UINT64 *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdMsrWrite ( - IN UINT32 MsrAddress, - CONST IN UINT64 *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -// IO -VOID -LibAmdIoRead ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdIoWrite ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdIoRMW ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdIoPoll ( - IN ACCESS_WIDTH AccessWidth, - IN UINT16 IoAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -// Memory or MMIO -VOID -LibAmdMemRead ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdMemWrite ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdMemRMW ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdMemPoll ( - IN ACCESS_WIDTH AccessWidth, - IN UINT64 MemAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -// PCI -VOID -LibAmdPciRead ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - OUT VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciWrite ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciRMW ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciPoll ( - IN ACCESS_WIDTH AccessWidth, - IN PCI_ADDR PciAddress, - IN CONST VOID *Data, - IN CONST VOID *DataMask, - IN UINT64 Delay, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciReadBits ( - IN PCI_ADDR Address, - IN UINT8 Highbit, - IN UINT8 Lowbit, - OUT UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciWriteBits ( - IN PCI_ADDR Address, - IN UINT8 Highbit, - IN UINT8 Lowbit, - IN CONST UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdPciFindNextCap ( - IN OUT PCI_ADDR *Address, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -// CPUID -VOID -LibAmdCpuidRead ( - IN UINT32 CpuidFcnAddress, - OUT CPUID_DATA *Value, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -// Utility Functions -VOID -LibAmdMemFill ( - IN VOID *Destination, - IN UINT8 Value, - IN UINTN FillLength, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -LibAmdMemCopy ( - IN VOID *Destination, - IN CONST VOID *Source, - IN UINTN CopyLength, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ); - -UINT32 -LibAmdGetPackageType ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -UINT8 -LibAmdBitScanReverse ( - IN UINT32 value - ); -UINT8 -LibAmdBitScanForward ( - IN UINT32 value - ); - -VOID -LibAmdReadCpuReg ( - IN UINT8 RegNum, - OUT UINT32 *Value - ); -VOID -LibAmdWriteCpuReg ( - IN UINT8 RegNum, - IN UINT32 Value - ); - -VOID -LibAmdWriteBackInvalidateCache ( - IN VOID - ); - -VOID -LibAmdSimNowEnterDebugger (VOID); - -VOID -LibAmdHDTBreakPoint (VOID); - -UINT8 -LibAmdAccessWidth ( - IN ACCESS_WIDTH AccessWidth - ); - -VOID -LibAmdCLFlush ( - IN UINT64 Address, - IN UINT8 Count - ); - -VOID F10RevDProbeFilterCritical ( - IN PCI_ADDR PciAddress, - IN UINT32 PciRegister - ); - -VOID -LibAmdFinit ( - VOID - ); - -VOID -StopHere ( - VOID - ); - -/* For f14 or older. */ -VOID -CpuidRead ( - IN UINT32 CpuidFcnAddress, - OUT CPUID_DATA *Value - ); - -UINT8 -ReadNumberOfCpuCores( - VOID - ); - -/* From 16kb, no implementation supplied. */ -VOID -LibAmdFnclex ( - VOID); - -VOID -LibAmdReadMxcsr ( - OUT UINT32 *Value - ); -VOID -LibAmdWriteMxcsr ( - IN UINT32 *Value - ); - - -#endif // _AMD_LIB_H_ diff --git a/src/vendorcode/amd/agesa/common/debug_util.c b/src/vendorcode/amd/agesa/common/debug_util.c deleted file mode 100644 index 29d0841..0000000 --- a/src/vendorcode/amd/agesa/common/debug_util.c +++ /dev/null @@ -1,24 +0,0 @@ - -#include <AGESA.h> -#include <AMD.h> -#include <heapManager.h> - -#include "debug_util.h" - -static const char undefined[] = "undefined"; - -static const char *HeapStatusStr[] = { - "DoNotExistYet", "LocalCache", "TempMem", "SystemMem", "DoNotExistAnymore","S3Resume" -}; - -/* This function has to match with enumeration of XXXX defined - * inside heapManager.h header file. - */ -const char *heap_status_name(UINT8 HeapStatus) -{ - if ((HeapStatus < HEAP_DO_NOT_EXIST_YET) || (HeapStatus > HEAP_S3_RESUME)) - return undefined; - - int index = HeapStatus - HEAP_DO_NOT_EXIST_YET; - return HeapStatusStr[index]; -} diff --git a/src/vendorcode/amd/agesa/common/debug_util.h b/src/vendorcode/amd/agesa/common/debug_util.h deleted file mode 100644 index a8d9a33..0000000 --- a/src/vendorcode/amd/agesa/common/debug_util.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __AGESA_DEBUG_UTIL_H__ -#define __AGESA_DEBUG_UTIL_H__ - -#include "AMD.h" - -const char *heap_status_name(UINT8 HeapStatus); - -#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/69127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If32a4de7ef263f1d4f7ab7a36751ad9dcf52dc7e Gerrit-Change-Number: 69127 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[XL] Change in coreboot[master]: vendorcode/amd/agesa/family16: Drop unused platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69126 ) Change subject: vendorcode/amd/agesa/family16: Drop unused platform ...................................................................... vendorcode/amd/agesa/family16: Drop unused platform This platform use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: Ie2ef5424c3ebe75ff98361639a0f9980101c1141 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/amd/agesa/Makefile.inc D src/vendorcode/amd/agesa/f16kb/AGESA.h D src/vendorcode/amd/agesa/f16kb/AMD.h D src/vendorcode/amd/agesa/f16kb/Config/OptionApmInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionC6Install.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCditInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpbInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpuCacheFlushOnHaltInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpuCoreLevelingInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpuFamiliesInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpuFeaturesInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCpuSpecificServicesInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionCratInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionDmiInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionFamily16hInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionFchInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionGfxRecoveryInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionGnbInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionHtInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionHtcInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionIdsInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionIoCstateInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionL3FeaturesInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionLowPwrPstateInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionMemoryInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionMmioMapInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionMsgBasedC1eInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionMultiSocketInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionPrefetchModeInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionPreserveMailboxInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionPsiInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionPstateHpcModeInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionPstateInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionS3ScriptInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionSlitInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionSratInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionTdpLimitingInstall.h D src/vendorcode/amd/agesa/f16kb/Config/OptionWheaInstall.h D src/vendorcode/amd/agesa/f16kb/Config/PlatformInstall.h D src/vendorcode/amd/agesa/f16kb/Dispatcher.h D src/vendorcode/amd/agesa/f16kb/Include/AdvancedApi.h D src/vendorcode/amd/agesa/f16kb/Include/CommonReturns.h D src/vendorcode/amd/agesa/f16kb/Include/Filecode.h D src/vendorcode/amd/agesa/f16kb/Include/GeneralServices.h D src/vendorcode/amd/agesa/f16kb/Include/GnbInterface.h D src/vendorcode/amd/agesa/f16kb/Include/Ids.h D src/vendorcode/amd/agesa/f16kb/Include/IdsHt.h D src/vendorcode/amd/agesa/f16kb/Include/IdsPerf.h D src/vendorcode/amd/agesa/f16kb/Include/OptionCdit.h D src/vendorcode/amd/agesa/f16kb/Include/OptionCpuSpecificServicesInstallReset.h D src/vendorcode/amd/agesa/f16kb/Include/OptionCrat.h D src/vendorcode/amd/agesa/f16kb/Include/OptionDmi.h D src/vendorcode/amd/agesa/f16kb/Include/OptionFamily16hEarlySample.h D src/vendorcode/amd/agesa/f16kb/Include/OptionGfxRecovery.h D src/vendorcode/amd/agesa/f16kb/Include/OptionGnb.h D src/vendorcode/amd/agesa/f16kb/Include/OptionMemory.h D src/vendorcode/amd/agesa/f16kb/Include/OptionMultiSocket.h D src/vendorcode/amd/agesa/f16kb/Include/OptionPstate.h D src/vendorcode/amd/agesa/f16kb/Include/OptionSlit.h D src/vendorcode/amd/agesa/f16kb/Include/OptionSrat.h D src/vendorcode/amd/agesa/f16kb/Include/OptionWhea.h D src/vendorcode/amd/agesa/f16kb/Include/Options.h D src/vendorcode/amd/agesa/f16kb/Include/OptionsHt.h D src/vendorcode/amd/agesa/f16kb/Include/PlatformMemoryConfiguration.h D src/vendorcode/amd/agesa/f16kb/Include/Topology.h D src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Dispatcher.c D src/vendorcode/amd/agesa/f16kb/Legacy/Proc/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c D src/vendorcode/amd/agesa/f16kb/Legacy/Proc/hobTransfer.c D src/vendorcode/amd/agesa/f16kb/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbC6State.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbCoreAfterReset.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbCoreAfterReset.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbCpb.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbDmi.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbEquivalenceTable.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbHtc.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbInitEarlyTable.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbIoCstate.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbLogicalIdTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMsrTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbNbAfterReset.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbNbAfterReset.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPciTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPowerCheck.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPowerCheck.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPowerMgmt.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPowerMgmtSystemTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPsi.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbPstate.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbSharedMsrTable.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16Apm.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16BrandId.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16CacheDefaults.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16Dmi.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16Dmi.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16MmioMap.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16MmioMap.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16MsrUnknownTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16PciUnknownTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16PowerMgmt.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16Utilities.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16Utilities.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/cpuF16WheaInitDataTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/cpuFamRegisters.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/PreserveMailbox.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuApm.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuApm.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuC6State.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuC6State.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCacheInit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCacheInit.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCdit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCoreLeveling.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCpb.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCpb.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCrat.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuCrat.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuDmi.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatureLeveling.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatures.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatures.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuIoCstate.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuIoCstate.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuL3Features.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuMsgBasedC1e.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPrefetchMode.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPstateGather.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPstateHpcMode.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPstateLeveling.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPstateTables.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPstateTables.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuSlit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuSrat.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuTdpLimiting.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuWhea.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cahalt.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cahaltasm.S D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuApicUtilities.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuApicUtilities.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuBist.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEnvInit.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEventLog.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuGeneralServices.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuMicrocodePatch.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPostInit.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPowerMgmt.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPowerMgmtSingleSocket.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPowerMgmtSingleSocket.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuPowerMgmtSystemTables.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuServices.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuWarmReset.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.c D src/vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.h D src/vendorcode/amd/agesa/f16kb/Proc/CPU/mmioMapManager.h D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdFch.h D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitEarly.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitPost.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdInitResume.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdLateRunApTask.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3LateRestore.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/AmdS3Save.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/CommonInits.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/CommonInits.h D src/vendorcode/amd/agesa/f16kb/Proc/Common/CommonReturns.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/CreateStruct.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/CreateStruct.h D src/vendorcode/amd/agesa/f16kb/Proc/Common/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Common/S3RestoreState.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/S3SaveState.c D src/vendorcode/amd/agesa/f16kb/Proc/Common/S3SaveState.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Azalia/AzaliaEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Azalia/AzaliaLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Azalia/AzaliaMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Azalia/AzaliaReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Azalia/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/AcpiLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/AcpiLib.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchBiosRamUsage.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommon.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchDef.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchPeLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/MemLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/PciLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/FchPlatform.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Family/Yangtze/YangtzeHwAcpiEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Family/Yangtze/YangtzeHwAcpiLateService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Family/Yangtze/YangtzeHwAcpiMidService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Family/Yangtze/YangtzeSSService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/HwAcpiEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/HwAcpiLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/HwAcpiMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/HwAcpiReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/HwAcpi/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Hwm/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Hwm/Family/Yangtze/YangtzeHwmEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Hwm/Family/Yangtze/YangtzeHwmLateService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Hwm/HwmLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Hwm/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Ide/IdeEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Ide/IdeLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Ide/IdeMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Ide/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/Family/Yangtze/YangtzeImcService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/FchEcEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/FchEcLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/FchEcMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/ImcReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Imc/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Family/Yangtze/EnvDefYangtze.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Family/Yangtze/ResetDefYangtze.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchInitEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchInitLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchInitMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchInitReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchInitS3.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchTaskLauncher.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/FchTaskLauncher.h D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/InitEnvDef.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/InitResetDef.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Interface/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/AbEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/AbLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/AbMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/AbReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/Family/Yangtze/YangtzeAbEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/Family/Yangtze/YangtzeAbResetService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/Family/Yangtze/YangtzeAbService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/PcieEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/PcieLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/PcieMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Pcie/PcieReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/AhciEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/AhciLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/AhciLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/AhciMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataResetService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Family/Yangtze/YangtzeSataService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Ide2AhciEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Ide2AhciLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Ide2AhciLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Ide2AhciMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/RaidEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/RaidLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/RaidLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/RaidMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataEnvLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataIdeEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataIdeLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataIdeLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataIdeMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataLib.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sata/SataReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/Family/Yangtze/YangtzeSdEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/Family/Yangtze/YangtzeSdResetService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/Family/Yangtze/YangtzeSdService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/SdEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/SdLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Sd/SdMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/Family/Yangtze/YangtzeLpcEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/Family/Yangtze/YangtzeLpcResetService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/LpcEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/LpcLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/LpcMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/LpcReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/SpiEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/SpiLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/SpiMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Spi/SpiReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/EhciEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/EhciLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/EhciMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/EhciReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciLateService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeOhciEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeOhciLateService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeOhciMidService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciLateService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciMidService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciResetService.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/OhciEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/OhciLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/OhciMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/OhciReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/UsbEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/UsbLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/UsbMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/UsbReset.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/XhciEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/XhciLate.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/XhciMid.c D src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/XhciReset.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Gnb.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbFamServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbGfx.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbGfxFamServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbIommu.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbLibFeatures.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbLibFeatures.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbPcie.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbPcieFamServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbRegistersCommon.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbRegistersCommonV2.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbRegistersKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbUra.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbUraServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbUraToken.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtEarly.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtLate.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtMid.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtPost.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtReset.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/GnbInitAtS3Save.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbFamTranslation/GnbTranslation.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbFamTranslation/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GfxConfigMid.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxConfig/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxIntegratedInfoTable.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxIntegratedInfoTable.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxLibV3.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxPwrPlayTable.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxPwrPlayTable.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/AlibSsdtKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxEnvInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxGmcInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxGmcInitKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxIntegratedInfoTableKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxLibKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxLibKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxMidInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxPostInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxSamuInitKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GfxTablesKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbEarlyInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbEnvInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbInitKBInstall.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbIommuTablesKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbMidInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbPostInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbRegisterAccKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbRegisterAccKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSamuPatchKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbSmuFirmwareKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbTablesKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbUraKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/GnbUraTokenMapKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieComplexDataKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieComplexDataKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieConfigKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieEarlyInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieEnvInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieLibKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieLibKB.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieMidInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PciePostInitKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/PcieTablesKB.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbInitKB/excel925.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbIoapic/GnbIoapic.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbIoapic/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV5/GnbNbInitLibV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV5/GnbNbInitLibV5.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbNbInitLibV5/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAlibV2/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAlibV2/PcieAlibV2.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAlibV2/PcieAlibV2.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAspm/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieClkPm/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/GnbPcieInitLibV4.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/PciePowerMgmtV4.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/GnbPcieInitLibV5.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PciePhyServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PciePifServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PciePortServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PcieSiliconServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PcieTopologyServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieInitLibV5/PcieWrapperServicesV5.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieMaxPayload/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieMaxPayload/PcieMaxPayload.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieMaxPayload/PcieMaxPayload.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/GnbPcieTrainingV2.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/PcieTrainingV2.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/PcieTrainingV2.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/PcieWorkaroundsV2.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbPcieTrainingV2/PcieWorkaroundsV2.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSSocketLib/GnbSSocketLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSSocketLib/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSbLib/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbScsLibV1/GnbScsLibV1.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbScsLibV1/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSmuLibV7/GnbSmuInitLibV7.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSmuLibV7/GnbSmuInitLibV7.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSmuLibV7/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSview/GnbSview.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbSview/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbTable/GnbTable.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbTable/GnbTable.h D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbTable/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbUraLibV1/GnbUraLibV1.c D src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbUraLibV1/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/HT/Fam16/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/HT/Fam16/htNbFam16.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/Fam16/htNbUtilitiesFam16.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/Fam16/htNbUtilitiesFam16.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/HT/htFeat.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htFeat.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterface.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterface.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceCoherent.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceCoherent.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceGeneral.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceGeneral.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceNonCoherent.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htInterfaceNonCoherent.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htMain.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htNb.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htNb.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htNbCommonHardware.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htNotify.c D src/vendorcode/amd/agesa/f16kb/Proc/HT/htNotify.h D src/vendorcode/amd/agesa/f16kb/Proc/HT/htTopologies.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebug.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpHdtout.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDpSerial.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Family/0x16/KB/IdsF16KbAllService.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Family/0x16/KB/IdsF16KbAllService.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Family/0x16/KB/IdsF16KbNvDef.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Family/0x16/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/IDS/IdsLib.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsLib.c D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/IdsRegAcc.h D src/vendorcode/amd/agesa/f16kb/Proc/IDS/Library/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ardk/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ardk/ma.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/CRAT/mfCrat.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/CSINTLV/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/CSINTLV/mfcsi.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/CSINTLV/mfcsi.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ECC/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ECC/mfecc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ECC/mfecc.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ECC/mfemp.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/EXCLUDIMM/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/IDENDIMM/mfidendimm.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/LVDDR3/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/LVDDR3/mflvddr3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/LVDDR3/mflvddr3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/MEMCLR/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/MEMCLR/mfmemclr.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ODTHERMAL/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/PARTRN/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/PARTRN/mfStandardTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/KB/mfRdWr2DKb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/mfRdDqs2DTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/mfRdWr2DEyeRimSearch.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/mfRdWr2DPatternGeneration.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/mfRdWr2DTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/RDWR2DTRAINING/mfRdWr2DTraining.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/S3/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/S3/mfs3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/TABLE/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/TABLE/mftds.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/KB/mmflowkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mdef.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/merrhdl.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/minit.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mm.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmConditionalPso.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmEcc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmExcludeDimm.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmLvDdr3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemClr.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmNodeInterleave.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmOnlineSpare.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmParallelTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmStandardTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmUmaAlloc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmflow.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmlvddr3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mu.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnS3kb.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mndctkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnflowkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnidendimmkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnkb.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnmctkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnotkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnphykb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mns3kb.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mn.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnS3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mndct.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnfeat.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnflow.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnmct.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnreg.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mntrain3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/FT3/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/FT3/mpSkbft3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpSkb3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpkb3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mp.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mpmaxfreq.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mpmr0.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mpodtpat.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mprtt.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mps2d.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mpsao.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mt3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtlrdimm3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtot3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtot3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtrci3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtrci3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtsdi3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtsdi3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mttecc3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mttwl3.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/Makefile.inc D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mt.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mthdi.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttEdgeDetect.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttEdgeDetect.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DEyeRimSearch.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttdimbt.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttecc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mtthrc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mtthrcSeedTrain.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttml.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttoptsrc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttsrc.c D src/vendorcode/amd/agesa/f16kb/Proc/Mem/ma.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/merrhdl.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mfParallelTraining.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mfStandardTraining.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mfmemclr.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mfs3.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mftds.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mm.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mn.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mnpmu.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mnreg.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mp.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mport.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mt.h D src/vendorcode/amd/agesa/f16kb/Proc/Mem/mu.h D src/vendorcode/amd/agesa/f16kb/gcccar.inc 729 files changed, 13 insertions(+), 229,112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/69126/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie2ef5424c3ebe75ff98361639a0f9980101c1141 Gerrit-Change-Number: 69126 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[XL] Change in coreboot[master]: vendorcode/amd/agesa/fam15tn: Drop unused platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69125 ) Change subject: vendorcode/amd/agesa/fam15tn: Drop unused platform ...................................................................... vendorcode/amd/agesa/fam15tn: Drop unused platform This platform use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: I749cf33fad12bb9bc5cd5d682df2652107d60a0f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/vendorcode/amd/agesa/Makefile.inc D src/vendorcode/amd/agesa/f15tn/AGESA.h D src/vendorcode/amd/agesa/f15tn/AMD.h D src/vendorcode/amd/agesa/f15tn/Config/OptionApmInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionC6Install.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpbInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuCacheFlushOnHaltInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuCoreLevelingInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuFamiliesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionCpuFeaturesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionDmiInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionFamily15hInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionFchInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionGfxRecoveryInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionGnbInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHtInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHtcInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionHwC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionIdsInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionIoCstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionL3FeaturesInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionLowPwrPstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMemoryInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMmioMapInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMsgBasedC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionMultiSocketInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPreserveMailboxInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPsiInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPstateHpcModeInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionPstateInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionS3ScriptInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSlitInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSratInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionSwC1eInstall.h D src/vendorcode/amd/agesa/f15tn/Config/OptionWheaInstall.h D src/vendorcode/amd/agesa/f15tn/Config/PlatformInstall.h D src/vendorcode/amd/agesa/f15tn/Dispatcher.h D src/vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h D src/vendorcode/amd/agesa/f15tn/Include/CommonReturns.h D src/vendorcode/amd/agesa/f15tn/Include/Filecode.h D src/vendorcode/amd/agesa/f15tn/Include/GeneralServices.h D src/vendorcode/amd/agesa/f15tn/Include/GnbInterface.h D src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h D src/vendorcode/amd/agesa/f15tn/Include/Ids.h D src/vendorcode/amd/agesa/f15tn/Include/IdsHt.h D src/vendorcode/amd/agesa/f15tn/Include/OptionDmi.h D src/vendorcode/amd/agesa/f15tn/Include/OptionGfxRecovery.h D src/vendorcode/amd/agesa/f15tn/Include/OptionGnb.h D src/vendorcode/amd/agesa/f15tn/Include/OptionMemory.h D src/vendorcode/amd/agesa/f15tn/Include/OptionMultiSocket.h D src/vendorcode/amd/agesa/f15tn/Include/OptionPstate.h D src/vendorcode/amd/agesa/f15tn/Include/OptionSlit.h D src/vendorcode/amd/agesa/f15tn/Include/OptionSrat.h D src/vendorcode/amd/agesa/f15tn/Include/OptionWhea.h D src/vendorcode/amd/agesa/f15tn/Include/Options.h D src/vendorcode/amd/agesa/f15tn/Include/OptionsHt.h D src/vendorcode/amd/agesa/f15tn/Include/OptionsPage.h D src/vendorcode/amd/agesa/f15tn/Include/PlatformMemoryConfiguration.h D src/vendorcode/amd/agesa/f15tn/Include/Topology.h D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Dispatcher.c D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c D src/vendorcode/amd/agesa/f15tn/Legacy/Proc/hobTransfer.c D src/vendorcode/amd/agesa/f15tn/MainPage.h D src/vendorcode/amd/agesa/f15tn/Makefile.inc D src/vendorcode/amd/agesa/f15tn/OptionsIds.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/F15PstateHpcMode.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnC6State.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnInitEarlyTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnIoCstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600111F_Enc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMsrTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPackageType.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPciTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerMgmtSystemTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerPlane.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnPowerPlane.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnSharedMsrTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnUtilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnUtilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCoreAfterReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnCoreAfterReset.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnDmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnHtc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnNbAfterReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnNbAfterReset.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerCheck.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerCheck.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPsi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/cpuF15TnPstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuCommonF15Utilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuCommonF15Utilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Apm.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15BrandId.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15CacheDefaults.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Crat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Dmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Dmi.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MsrTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PciTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerCheck.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerCheck.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15PowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Utilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15Utilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15WheaInitDataTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/cpuFamRegisters.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/PreserveMailbox.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/PreserveMailbox.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuApm.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuApm.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuC6State.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuC6State.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCacheInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCdit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCoreLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCpb.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCpb.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCrat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuCrat.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuDmi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHtc.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHtc.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHwC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuHwC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuIoCstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuIoCstate.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuL3Features.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuL3Features.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuLowPwrPstate.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuLowPwrPstate.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuMsgBasedC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuMsgBasedC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPsi.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPsi.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateGather.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateHpcMode.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateHpcMode.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateLeveling.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateTables.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuPstateTables.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSlit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSrat.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSwC1e.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuSwC1e.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuWhea.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/Table.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/TableHt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cahalt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cahaltasm.S D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuApicUtilities.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuApicUtilities.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuBist.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuBrandId.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEnvInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuInitEarlyTable.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuLateInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuLateInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPage.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmt.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtMultiSocket.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtMultiSocket.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSingleSocket.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSingleSocket.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPowerMgmtSystemTables.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuServices.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuWarmReset.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h D src/vendorcode/amd/agesa/f15tn/Proc/CPU/mmioMapManager.c D src/vendorcode/amd/agesa/f15tn/Proc/CPU/mmioMapManager.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdFch.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitEarly.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitPost.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitResume.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdLateRunApTask.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3Save.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonInits.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonInits.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h D src/vendorcode/amd/agesa/f15tn/Proc/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3RestoreState.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.c D src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/AzaliaReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Azalia/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/AcpiLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/AcpiLib.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchBiosRamUsage.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommon.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonSmm.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchDef.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchPeLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/MemLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/PciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Fch.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/GecReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Gec/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/HwAcpiReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/HwAcpi/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/HwmReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Hwm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/IdeMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ide/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/FchEcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/ImcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Imc/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchInitS3.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchTaskLauncher.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/FchTaskLauncher.h D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/InitEnvDef.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/InitResetDef.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Interface/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/IrMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Ir/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcib/PcibReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/AbReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppPortInit.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/PcieReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/AhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/RaidMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataEnvLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataLib.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Hudson2SdService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sd/SdMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Hudson2LpcEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Hudson2LpcResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/LpcReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Spi/SpiReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/EhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Family/Hudson2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/OhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/UsbReset.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciLate.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciMid.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciRecovery.c D src/vendorcode/amd/agesa/f15tn/Proc/Fch/Usb/XhciReset.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/Gnb.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbFuseTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfxFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbIommu.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbLibFeatures.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbLibFeatures.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcieFamServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbRegistersLN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbRegistersTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtEarly.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtLate.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtMid.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtPost.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtReset.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtS3Save.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Include/Library/GnbTimerLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Library/GnbTimerLibWrap0/GnbTimerLibWrap0.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Library/GnbTimerLibWrap0/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/GnbTranslation.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbFamTranslation/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigMid.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxIntegratedInfoTableTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxPostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbBapmCoeffCalcTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbBapmCoeffCalcTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbCacWeightsTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbEarlyInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbFuseTableTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbFuseTableTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbInitTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbInitTNInstall.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbIommuIvrsTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbPostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbRegisterAccTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbRegisterAccTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFM2.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibSsdtTNFS1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFM2.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFM2.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieAlibTNFS1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieComplexDataTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieComplexDataTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieConfigTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieEarlyInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieEnvInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieLibTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieLibTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieMidInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePostInitTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/PcieTablesTN.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuIvrs/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIvrsLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbMSocketLib/GnbMSocketLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbMSocketLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/GnbNbInitLibV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbNbInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibDebugLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibMmioData.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPciLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPortData.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAspm/PcieAspm.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieClkPm/PcieClkPm.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbHandleLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieService.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuVidReq.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/GnbPcieInitLibV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieMaxPayloadV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieMaxPayloadV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePortServicesV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePowerMgmtV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PciePowerMgmtV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieServiceV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieSmuServiceV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieSmuVidReqV4.esl D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieInitLibV4/PcieWrapperServicesV4.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSSocketLib/GnbSSocketLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbIommuLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSbLib/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSview/GnbSview.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbSview/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/GnbTable.c D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/GnbTable.h D src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbTable/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbFam15Mod1x.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbUtilitiesFam15Mod1x.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/Fam15Mod1x/htNbUtilitiesFam15Mod1x.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/HT/htFeat.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htFeat.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htGraph.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterface.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterface.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceCoherent.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceCoherent.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceGeneral.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceGeneral.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceNonCoherent.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htInterfaceNonCoherent.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htMain.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNb.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNb.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNbCommonHardware.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNotify.c D src/vendorcode/amd/agesa/f15tn/Proc/HT/htNotify.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htPage.h D src/vendorcode/amd/agesa/f15tn/Proc/HT/htTopologies.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsCtrl.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsNvToCmos.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Control/IdsNvToCmos.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebug.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpHdtout.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpHdtout.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpRedirectIo.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDpSerial.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsIdtTable.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/IdsF15AllService.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/IdsF15AllService.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnAllService.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/IdsF15TnNvDef.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Family/0x15/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/IdsLib.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/IdsPage.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsLib.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsRegAcc.c D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/IdsRegAcc.h D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Library/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/IDS/Perf/IdsPerf.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ardk/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ardk/ma.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/mfchi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CHINTLV/mfchi.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CRAT/mfCrat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CRAT/mfCrat.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/mfcsi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/CSINTLV/mfcsi.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/DMI/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/DMI/mfDMI.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfecc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfecc.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ECC/mfemp.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/EXCLUDIMM/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/IDENDIMM/mfidendimm.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/mfintlvrn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/INTLVRN/mfintlvrn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/mflvddr3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/LVDDR3/mflvddr3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/MEMCLR/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/MEMCLR/mfmemclr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/PARTRN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/PARTRN/mfStandardTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/S3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/S3/mfs3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/TABLE/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/TABLE/mftds.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/TN/mmflowtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mdef.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/merrhdl.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/minit.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmConditionalPso.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmEcc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmExcludeDimm.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmLvDdr3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemClr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmNodeInterleave.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmOnlineSpare.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmParallelTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmStandardTraining.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmUmaAlloc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmflow.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmlvddr3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mu.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnS3tn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mndcttn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnflowtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnidendimmtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnmcttn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnottn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnphytn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mns3tn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnS3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnfeat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnflow.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnmct.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnreg.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mntrain3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FM2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FM2/mpUtnfm2.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FP2/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FP2/mpStnfp2.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FS1/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/FS1/mpStnfs1.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mpStn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mpUtn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/TN/mptn3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mp.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplribt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplrnlr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mplrnpr.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpmaxfreq.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpmr0.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpodtpat.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprc10opspd.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprc2ibt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mprtt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpsao.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Ps/mpseeds.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mt3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mt3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtlrdimm3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtrci3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtrci3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtsdi3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtsdi3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtspd3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtspd3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mttecc3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mttwl3.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/Makefile.inc D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mthdi.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttEdgeDetect.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttEdgeDetect.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttdimbt.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttecc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttml.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttoptsrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mttsrc.c D src/vendorcode/amd/agesa/f15tn/Proc/Mem/ma.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/memPage.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/merrhdl.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfParallelTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfStandardTraining.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfmemclr.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mfs3.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mftds.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mnreg.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mp.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mport.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mt.h D src/vendorcode/amd/agesa/f15tn/Proc/Mem/mu.h D src/vendorcode/amd/agesa/f15tn/gcccar.inc 813 files changed, 13 insertions(+), 277,330 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/69125/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I749cf33fad12bb9bc5cd5d682df2652107d60a0f Gerrit-Change-Number: 69125 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[XL] Change in coreboot[master]: vendorcode/amd/agesa/fam14: Remove dropped platform
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69124 ) Change subject: vendorcode/amd/agesa/fam14: Remove dropped platform ...................................................................... vendorcode/amd/agesa/fam14: Remove dropped platform This platform use the LEGACY_SMP_INIT which is to be deprecated after release 4.18. Change-Id: I9dd3ce763418ff767acd0c55be26a998df77081b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- D src/vendorcode/amd/agesa/f14/AGESA.h D src/vendorcode/amd/agesa/f14/AMD.h D src/vendorcode/amd/agesa/f14/Config/OptionC6Install.h D src/vendorcode/amd/agesa/f14/Config/OptionCpbInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuCacheFlushOnHaltInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuCoreLevelingInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuFamiliesInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionCpuFeaturesInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionDmiInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionFamily14hInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionGfxRecoveryInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionGnbInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHtAssistInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHtInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionHwC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionIdsInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionIoCstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionLowPwrPstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMemoryInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMsgBasedC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionMultiSocketInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionPreserveMailboxInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionPstateInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionS3ScriptInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSlitInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSratInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionSwC1eInstall.h D src/vendorcode/amd/agesa/f14/Config/OptionWheaInstall.h D src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h D src/vendorcode/amd/agesa/f14/Dispatcher.h D src/vendorcode/amd/agesa/f14/Include/AdvancedApi.h D src/vendorcode/amd/agesa/f14/Include/CommonReturns.h D src/vendorcode/amd/agesa/f14/Include/Filecode.h D src/vendorcode/amd/agesa/f14/Include/GeneralServices.h D src/vendorcode/amd/agesa/f14/Include/GnbInterface.h D src/vendorcode/amd/agesa/f14/Include/GnbInterfaceStub.h D src/vendorcode/amd/agesa/f14/Include/Ids.h D src/vendorcode/amd/agesa/f14/Include/IdsHt.h D src/vendorcode/amd/agesa/f14/Include/OptionDmi.h D src/vendorcode/amd/agesa/f14/Include/OptionFamily12hEarlySample.h D src/vendorcode/amd/agesa/f14/Include/OptionFamily14hEarlySample.h D src/vendorcode/amd/agesa/f14/Include/OptionGfxRecovery.h D src/vendorcode/amd/agesa/f14/Include/OptionGnb.h D src/vendorcode/amd/agesa/f14/Include/OptionMemory.h D src/vendorcode/amd/agesa/f14/Include/OptionMultiSocket.h D src/vendorcode/amd/agesa/f14/Include/OptionPstate.h D src/vendorcode/amd/agesa/f14/Include/OptionSlit.h D src/vendorcode/amd/agesa/f14/Include/OptionSrat.h D src/vendorcode/amd/agesa/f14/Include/OptionWhea.h D src/vendorcode/amd/agesa/f14/Include/Options.h D src/vendorcode/amd/agesa/f14/Include/OptionsHt.h D src/vendorcode/amd/agesa/f14/Include/OptionsPage.h D src/vendorcode/amd/agesa/f14/Include/PlatformMemoryConfiguration.h D src/vendorcode/amd/agesa/f14/Include/Topology.h D src/vendorcode/amd/agesa/f14/Legacy/Proc/Dispatcher.c D src/vendorcode/amd/agesa/f14/Legacy/Proc/Makefile.inc D src/vendorcode/amd/agesa/f14/Legacy/Proc/agesaCallouts.c D src/vendorcode/amd/agesa/f14/Legacy/Proc/hobTransfer.c D src/vendorcode/amd/agesa/f14/MainPage.h D src/vendorcode/amd/agesa/f14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14C6State.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14IoCstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000029.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000119.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14PackageType.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnCpb.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnInitEarlyTable.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnLogicalIdTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnMicrocodePatchTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnPciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuCommonF14Utilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuCommonF14Utilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14BrandId.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14BrandIdFt1.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14CacheDefaults.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Dmi.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14LowPowerInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14LowPowerInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14MsrTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PerCorePciTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerCheck.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerCheck.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerMgmtSystemTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerPlane.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14PowerPlane.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Pstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14SoftwareThermal.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14SoftwareThermal.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Utilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14Utilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/cpuF14WheaInitDataTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Family/cpuFamRegisters.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c D src/vendorcode/amd/agesa/f14/Proc/CPU/S3.h D src/vendorcode/amd/agesa/f14/Proc/CPU/Table.c D src/vendorcode/amd/agesa/f14/Proc/CPU/Table.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cahalt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cahaltasm.S D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuApicUtilities.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuApicUtilities.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuBist.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuBrandId.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEarlyInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEarlyInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEnvInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuEventLog.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuFamilyTranslation.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuFamilyTranslation.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuGeneralServices.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuInitEarlyTable.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuLateInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuLateInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuMicrocodePatch.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPage.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPostInit.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPostInit.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtMultiSocket.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtMultiSocket.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSingleSocket.c D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSingleSocket.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuPowerMgmtSystemTables.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuRegisters.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuServices.h D src/vendorcode/amd/agesa/f14/Proc/CPU/cpuWarmReset.c D src/vendorcode/amd/agesa/f14/Proc/CPU/heapManager.c D src/vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c D src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c D src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c D src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.h D src/vendorcode/amd/agesa/f14/Proc/Common/CommonPage.h D src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c D src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c D src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h D src/vendorcode/amd/agesa/f14/Proc/Common/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Common/S3RestoreState.c D src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c D src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/Gnb.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbGfx.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbGfxFamServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbLibFeatures.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbLibFeatures.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbPcie.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbPcieFamServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbRegistersON.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Common/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/0x14/F14GfxServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Family/GfxFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxGmcInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxGmcInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtEnvPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtEnvPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtMidPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtMidPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxRegisterAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxRegisterAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxStrapsInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/GfxStrapsInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Gfx/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtEarly.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtLate.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtMid.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbInitAtReset.c D src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxConfig/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbGfxInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbNbInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSbLink.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSbLink.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkNclkRatio.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbLclkNclkRatio.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbPowerGate.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbPowerGate.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmu.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/F14NbSmuFirmware.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Family/NbFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbFuseTable.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbFuseTable.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbLclkDpm.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Feature/NbLclkDpm.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbConfigData.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbConfigData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEarly.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEarly.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtEnv.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtLatePost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtLatePost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtReset.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbInitAtReset.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlib.esl D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieAlibSsdt.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexConfig.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieComplexServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePhyServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PciePifServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioComplexData.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/OntarioDefinitions.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/PcieFamilyServices.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEarlyPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEarlyPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEnv.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtEnv.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtLatePost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtLatePost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtPost.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieInitAtPost.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieLateInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieLateInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieMiscLib.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PcieMiscLib.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortInit.h D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c D src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.h D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbFam14.c D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.c D src/vendorcode/amd/agesa/f14/Proc/HT/Fam14/htNbUtilitiesFam14.h D src/vendorcode/amd/agesa/f14/Proc/HT/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/HT/htFeat.c D src/vendorcode/amd/agesa/f14/Proc/HT/htFeat.h D src/vendorcode/amd/agesa/f14/Proc/HT/htGraph.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterface.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterface.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceCoherent.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceCoherent.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceGeneral.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceGeneral.h D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceNonCoherent.c D src/vendorcode/amd/agesa/f14/Proc/HT/htInterfaceNonCoherent.h D src/vendorcode/amd/agesa/f14/Proc/HT/htMain.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNb.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNb.h D src/vendorcode/amd/agesa/f14/Proc/HT/htNbHardwareFam10.h D src/vendorcode/amd/agesa/f14/Proc/HT/htNotify.c D src/vendorcode/amd/agesa/f14/Proc/HT/htNotify.h D src/vendorcode/amd/agesa/f14/Proc/HT/htPage.h D src/vendorcode/amd/agesa/f14/Proc/HT/htTopologies.h D src/vendorcode/amd/agesa/f14/Proc/IDS/IdsLib.h D src/vendorcode/amd/agesa/f14/Proc/IDS/IdsPage.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/mason3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ON/mauon3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ardk/ma.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/mfchi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CHINTLV/mfchi.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/mfcsi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/CSINTLV/mfcsi.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/DMI/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/DMI/mfDMI.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfecc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfecc.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ECC/mfemp.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/EXCLUDIMM/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/mfidendimm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/IDENDIMM/mfidendimm.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/mfintlvrn.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/INTLVRN/mfintlvrn.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/mflvddr3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/LVDDR3/mflvddr3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/MEMCLR/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/MEMCLR/mfmemclr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/PARTRN/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/PARTRN/mfStandardTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/S3/mfs3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/TABLE/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Feat/TABLE/mftds.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/ON/mmflowon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mdef.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/merrhdl.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/minit.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmConditionalPso.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmEcc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmExcludeDimm.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmLvDdr3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemClr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmNodeInterleave.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmOnlineSpare.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmParallelTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmStandardTraining.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmUmaAlloc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmflow.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmlvddr3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mu.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnS3on.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnS3on.h D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mndcton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnflowon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnidendimmon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnmcton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnon.h D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnoton.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnphyon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnprotoon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/ON/mnregon.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mn.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnS3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnfeat.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnflow.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnreg.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mntrain2.c D src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mntrain3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/mpson3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/ON/mpuon3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mp.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplribt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplrnlr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mplrnpr.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpmaxfreq.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpmr0.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpodtpat.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprc10opspd.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprc2ibt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mprtt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Ps/mpsao.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mt3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mt3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtlrdimm3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtot3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtot3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtrci3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtrci3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtsdi3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtsdi3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mttecc3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mttwl3.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/Makefile.inc D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mthdi.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttEdgeDetect.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttEdgeDetect.h D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttdimbt.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttecc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mtthrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttml.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttoptsrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/mttsrc.c D src/vendorcode/amd/agesa/f14/Proc/Mem/ma.h D src/vendorcode/amd/agesa/f14/Proc/Mem/memPage.h D src/vendorcode/amd/agesa/f14/Proc/Mem/merrhdl.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfParallelTraining.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfStandardTraining.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfmemclr.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mfs3.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mftds.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mm.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mp.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mport.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mt.h D src/vendorcode/amd/agesa/f14/Proc/Mem/mu.h D src/vendorcode/amd/agesa/f14/errno.h D src/vendorcode/amd/agesa/f14/gcccar.inc 549 files changed, 13 insertions(+), 158,342 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/69124/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd3ce763418ff767acd0c55be26a998df77081b Gerrit-Change-Number: 69124 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

1 0

[XL] Change in coreboot[master]: sb/amd: Remove dropped platforms
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

Attention is currently required from: Arthur Heymans. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69120 to look at the new patch set (#4). Change subject: sb/amd: Remove dropped platforms ...................................................................... sb/amd: Remove dropped platforms This code is now unused by any platform. Change-Id: I60afbde6ead70f0c887866fc351b4a6a15a89287 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- D src/southbridge/amd/agesa/Kconfig D src/southbridge/amd/agesa/Makefile.inc D src/southbridge/amd/agesa/hudson/Kconfig D src/southbridge/amd/agesa/hudson/Makefile.inc D src/southbridge/amd/agesa/hudson/acpi/AmdImc.asl D src/southbridge/amd/agesa/hudson/acpi/audio.asl D src/southbridge/amd/agesa/hudson/acpi/fch.asl D src/southbridge/amd/agesa/hudson/acpi/lpc.asl D src/southbridge/amd/agesa/hudson/acpi/pci_int.asl D src/southbridge/amd/agesa/hudson/acpi/pcie.asl D src/southbridge/amd/agesa/hudson/acpi/smbus.asl D src/southbridge/amd/agesa/hudson/acpi/usb.asl D src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h D src/southbridge/amd/agesa/hudson/amd_pci_int_types.h D src/southbridge/amd/agesa/hudson/bootblock.c D src/southbridge/amd/agesa/hudson/chip.h D src/southbridge/amd/agesa/hudson/early_setup.c D src/southbridge/amd/agesa/hudson/enable_usbdebug.c D src/southbridge/amd/agesa/hudson/fadt.c D src/southbridge/amd/agesa/hudson/hda.c D src/southbridge/amd/agesa/hudson/hudson.c D src/southbridge/amd/agesa/hudson/hudson.h D src/southbridge/amd/agesa/hudson/ide.c D src/southbridge/amd/agesa/hudson/imc.c D src/southbridge/amd/agesa/hudson/imc.h D src/southbridge/amd/agesa/hudson/lpc.c D src/southbridge/amd/agesa/hudson/pci.c D src/southbridge/amd/agesa/hudson/pci_devs.h D src/southbridge/amd/agesa/hudson/pcie.c D src/southbridge/amd/agesa/hudson/ramtop.c D src/southbridge/amd/agesa/hudson/reset.c D src/southbridge/amd/agesa/hudson/resume.c D src/southbridge/amd/agesa/hudson/sata.c D src/southbridge/amd/agesa/hudson/sd.c D src/southbridge/amd/agesa/hudson/sm.c D src/southbridge/amd/agesa/hudson/smbus.c D src/southbridge/amd/agesa/hudson/smbus.h D src/southbridge/amd/agesa/hudson/smbus_spd.c D src/southbridge/amd/agesa/hudson/smi.c D src/southbridge/amd/agesa/hudson/smi.h D src/southbridge/amd/agesa/hudson/smi_util.c D src/southbridge/amd/agesa/hudson/smihandler.c D src/southbridge/amd/agesa/hudson/spi.c D src/southbridge/amd/agesa/hudson/usb.c D src/southbridge/amd/cimx/Kconfig D src/southbridge/amd/cimx/Makefile.inc D src/southbridge/amd/cimx/sb800/Amd.h D src/southbridge/amd/cimx/sb800/AmdSbLib.h D src/southbridge/amd/cimx/sb800/Kconfig D src/southbridge/amd/cimx/sb800/Makefile.inc D src/southbridge/amd/cimx/sb800/SBPLATFORM.h D src/southbridge/amd/cimx/sb800/acpi/audio.asl D src/southbridge/amd/cimx/sb800/acpi/fch.asl D src/southbridge/amd/cimx/sb800/acpi/lpc.asl D src/southbridge/amd/cimx/sb800/acpi/misc_io.asl D src/southbridge/amd/cimx/sb800/acpi/pcie.asl D src/southbridge/amd/cimx/sb800/acpi/smbus.asl D src/southbridge/amd/cimx/sb800/acpi/usb.asl D src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h D src/southbridge/amd/cimx/sb800/amd_pci_int_types.h D src/southbridge/amd/cimx/sb800/bootblock.c D src/southbridge/amd/cimx/sb800/cfg.c D src/southbridge/amd/cimx/sb800/cfg.h D src/southbridge/amd/cimx/sb800/chip.h D src/southbridge/amd/cimx/sb800/early.c D src/southbridge/amd/cimx/sb800/fadt.c D src/southbridge/amd/cimx/sb800/fan.c D src/southbridge/amd/cimx/sb800/fan.h D src/southbridge/amd/cimx/sb800/gpio_oem.h D src/southbridge/amd/cimx/sb800/late.c D src/southbridge/amd/cimx/sb800/lpc.c D src/southbridge/amd/cimx/sb800/lpc.h D src/southbridge/amd/cimx/sb800/pci_devs.h D src/southbridge/amd/cimx/sb800/ramtop.c D src/southbridge/amd/cimx/sb800/reset.c D src/southbridge/amd/cimx/sb800/sb_cimx.h D src/southbridge/amd/cimx/sb800/smbus.c D src/southbridge/amd/cimx/sb800/smbus.h D src/southbridge/amd/cimx/sb800/smbus_spd.c D src/southbridge/amd/cimx/sb800/smbus_spd.h D src/southbridge/amd/cimx/sb800/spi.c M src/southbridge/amd/common/Makefile.inc M src/vendorcode/amd/Makefile.inc D src/vendorcode/amd/cimx/Makefile.inc D src/vendorcode/amd/cimx/sb800/ACPILIB.c D src/vendorcode/amd/cimx/sb800/ACPILIB.h D src/vendorcode/amd/cimx/sb800/AMDLIB.c D src/vendorcode/amd/cimx/sb800/AMDSBLIB.c D src/vendorcode/amd/cimx/sb800/AMDSBLIB.h D src/vendorcode/amd/cimx/sb800/AZALIA.c D src/vendorcode/amd/cimx/sb800/DISPATCHER.c D src/vendorcode/amd/cimx/sb800/EC.c D src/vendorcode/amd/cimx/sb800/ECLIB.c D src/vendorcode/amd/cimx/sb800/ECfan.h D src/vendorcode/amd/cimx/sb800/ECfanLIB.c D src/vendorcode/amd/cimx/sb800/ECfanc.c D src/vendorcode/amd/cimx/sb800/GEC.c D src/vendorcode/amd/cimx/sb800/Gpp.c D src/vendorcode/amd/cimx/sb800/IOLIB.c D src/vendorcode/amd/cimx/sb800/LEGACY.c D src/vendorcode/amd/cimx/sb800/MEMLIB.c D src/vendorcode/amd/cimx/sb800/Makefile.inc D src/vendorcode/amd/cimx/sb800/OEM.h D src/vendorcode/amd/cimx/sb800/PCILIB.c D src/vendorcode/amd/cimx/sb800/PMIO2LIB.c D src/vendorcode/amd/cimx/sb800/PMIOLIB.c D src/vendorcode/amd/cimx/sb800/SATA.c D src/vendorcode/amd/cimx/sb800/SB800.h D src/vendorcode/amd/cimx/sb800/SBCMN.c D src/vendorcode/amd/cimx/sb800/SBDEF.h D src/vendorcode/amd/cimx/sb800/SBMAIN.c D src/vendorcode/amd/cimx/sb800/SBPELIB.c D src/vendorcode/amd/cimx/sb800/SBPort.c D src/vendorcode/amd/cimx/sb800/SBSUBFUN.h D src/vendorcode/amd/cimx/sb800/SBTYPE.h D src/vendorcode/amd/cimx/sb800/SMM.c D src/vendorcode/amd/cimx/sb800/SbModInf.c D src/vendorcode/amd/cimx/sb800/USB.c 118 files changed, 12 insertions(+), 19,185 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/69120/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60afbde6ead70f0c887866fc351b4a6a15a89287 Gerrit-Change-Number: 69120 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: cpu/amd/agesa: Remove leftover code
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

1 0

[XL] Change in coreboot[master]: cpu/x86: Drop LEGACY_SMP_INIT
by Arthur Heymans (Code Review) 01 Nov '22

01 Nov '22

1 0

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