Attention is currently required from: Felix Singer, Michał Żygowski, Tim Wawrzynczak, Michał Kopeć, Michael Niewöhner.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68789 )
Change subject: soc/intel/common: provide display hook in PEP for ECs
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/68789
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icbfd294cdd238e63eb947c227a9cf73daca702ef
Gerrit-Change-Number: 68789
Gerrit-PatchSet: 4
Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Comment-Date: Wed, 02 Nov 2022 00:09:06 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Felix Singer, Michał Żygowski, Tim Wawrzynczak, Michał Kopeć, Arthur Heymans, Michael Niewöhner.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68791 )
Change subject: ec/clevo/it5570e: add driver for EC used on various Clevo laptops
......................................................................
Patch Set 6:
(1 comment)
File src/ec/clevo/it5570e/acpi/buttons.asl:
https://review.coreboot.org/c/coreboot/+/68791/comment/dd5a091a_976ff01c
PS4, Line 3: Device (PWRB)
: {
: Name (_HID, "PNP0C0C")
: Name (_PRW, Package () { EC_GPE_PWRB, 4 })
: }
> Read the ACPI spec :-) The PWRB device is required, when implementing the "Control method power butt […]
Ah, the EC queries reference the PWRB, thanks
--
To view, visit https://review.coreboot.org/c/coreboot/+/68791
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic8c0bee9002ad9edcd10c83b775fc723744caaa0
Gerrit-Change-Number: 68791
Gerrit-PatchSet: 6
Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net>
Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-Comment-Date: Tue, 01 Nov 2022 23:59:44 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>
Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de>
Gerrit-MessageType: comment
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69119
to look at the new patch set (#8).
Change subject: nb/amd/agesa: Remove leftover code
......................................................................
nb/amd/agesa: Remove leftover code
This code is now unused by any platform.
Change-Id: I5464daa8cfb8231e2b19447c343fc80ab1d68ce8
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/northbridge/amd/agesa/BiosCallOuts.h
D src/northbridge/amd/agesa/Kconfig
D src/northbridge/amd/agesa/Makefile.inc
D src/northbridge/amd/agesa/agesa_helper.h
D src/northbridge/amd/agesa/dimmSpd.h
D src/northbridge/amd/agesa/state_machine.h
6 files changed, 12 insertions(+), 233 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/69119/8
--
To view, visit https://review.coreboot.org/c/coreboot/+/69119
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5464daa8cfb8231e2b19447c343fc80ab1d68ce8
Gerrit-Change-Number: 69119
Gerrit-PatchSet: 8
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69118
to look at the new patch set (#8).
Change subject: cpu/amd/agesa: Remove leftover code
......................................................................
cpu/amd/agesa: Remove leftover code
Now that all agesa CPUs are removed this code is unused.
Change-Id: If0c082bbdb09457e3876962fa75725add11cb67c
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/include/arch/cpu.h
M src/cpu/amd/Kconfig
M src/cpu/amd/Makefile.inc
D src/cpu/amd/agesa/Kconfig
D src/cpu/amd/agesa/Makefile.inc
D src/cpu/amd/smm/Makefile.inc
D src/cpu/amd/smm/smm_init.c
M src/drivers/amd/agesa/Makefile.inc
M src/northbridge/amd/agesa/Kconfig
M src/vendorcode/amd/Kconfig
10 files changed, 14 insertions(+), 151 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/69118/8
--
To view, visit https://review.coreboot.org/c/coreboot/+/69118
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If0c082bbdb09457e3876962fa75725add11cb67c
Gerrit-Change-Number: 69118
Gerrit-PatchSet: 8
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69123
to look at the new patch set (#7).
Change subject: cpu/x86: Set up a separate stack for APs
......................................................................
cpu/x86: Set up a separate stack for APs
APs use a lot less stack, so set up a separate stack for those in .bss.
Now that CPU_INFO_V2 is the only code path that is used, there is no
need to align stacks in c_start.S.
Change-Id: I7a681a2e3003da0400843daa5d6d6180d952abf5
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/c_start.S
M src/cpu/x86/Kconfig
M src/cpu/x86/mp_init.c
3 files changed, 29 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/69123/7
--
To view, visit https://review.coreboot.org/c/coreboot/+/69123
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7a681a2e3003da0400843daa5d6d6180d952abf5
Gerrit-Change-Number: 69123
Gerrit-PatchSet: 7
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69122
to look at the new patch set (#7).
Change subject: cpu/x86: Drop !CPU_INFO_V2 code
......................................................................
cpu/x86: Drop !CPU_INFO_V2 code
Now that all platforms use parallel_mp this is the only codepath used
for cpu_info() local thread storage.
Change-Id: I119214e703aea8a4fe93f83b784159cf86d859d3
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/Kconfig
M src/arch/x86/c_start.S
M src/arch/x86/include/arch/cpu.h
M src/cpu/x86/Kconfig
M src/security/intel/txt/getsec_enteraccs.S
5 files changed, 16 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/69122/7
--
To view, visit https://review.coreboot.org/c/coreboot/+/69122
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I119214e703aea8a4fe93f83b784159cf86d859d3
Gerrit-Change-Number: 69122
Gerrit-PatchSet: 7
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69121
to look at the new patch set (#7).
Change subject: cpu/x86: Drop LEGACY_SMP_INIT
......................................................................
cpu/x86: Drop LEGACY_SMP_INIT
This codepath is deprecated after the 4.18 release.
Change-Id: I7e90f457f3979781d06323ef1350d5fb05a6be43
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/qemu-x86/Kconfig
M src/cpu/x86/Kconfig
M src/cpu/x86/lapic/Makefile.inc
D src/cpu/x86/lapic/lapic_cpu_init.c
D src/cpu/x86/lapic/secondary.S
M src/cpu/x86/smm/Makefile.inc
D src/cpu/x86/smm/smihandler.c
D src/cpu/x86/smm/smm.ld
D src/cpu/x86/smm/smmhandler.S
D src/cpu/x86/smm/smmrelocate.S
M src/southbridge/intel/i82801ix/Makefile.inc
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801ix/smihandler.c
13 files changed, 13 insertions(+), 1,254 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/69121/7
--
To view, visit https://review.coreboot.org/c/coreboot/+/69121
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7e90f457f3979781d06323ef1350d5fb05a6be43
Gerrit-Change-Number: 69121
Gerrit-PatchSet: 7
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset
Attention is currently required from: Arthur Heymans.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69120
to look at the new patch set (#7).
Change subject: sb/amd: Remove dropped platforms
......................................................................
sb/amd: Remove dropped platforms
This code is now unused by any platform.
Change-Id: I60afbde6ead70f0c887866fc351b4a6a15a89287
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/southbridge/amd/agesa/Kconfig
D src/southbridge/amd/agesa/Makefile.inc
D src/southbridge/amd/agesa/hudson/Kconfig
D src/southbridge/amd/agesa/hudson/Makefile.inc
D src/southbridge/amd/agesa/hudson/acpi/AmdImc.asl
D src/southbridge/amd/agesa/hudson/acpi/audio.asl
D src/southbridge/amd/agesa/hudson/acpi/fch.asl
D src/southbridge/amd/agesa/hudson/acpi/lpc.asl
D src/southbridge/amd/agesa/hudson/acpi/pci_int.asl
D src/southbridge/amd/agesa/hudson/acpi/pcie.asl
D src/southbridge/amd/agesa/hudson/acpi/smbus.asl
D src/southbridge/amd/agesa/hudson/acpi/usb.asl
D src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h
D src/southbridge/amd/agesa/hudson/amd_pci_int_types.h
D src/southbridge/amd/agesa/hudson/bootblock.c
D src/southbridge/amd/agesa/hudson/chip.h
D src/southbridge/amd/agesa/hudson/early_setup.c
D src/southbridge/amd/agesa/hudson/enable_usbdebug.c
D src/southbridge/amd/agesa/hudson/fadt.c
D src/southbridge/amd/agesa/hudson/hda.c
D src/southbridge/amd/agesa/hudson/hudson.c
D src/southbridge/amd/agesa/hudson/hudson.h
D src/southbridge/amd/agesa/hudson/ide.c
D src/southbridge/amd/agesa/hudson/imc.c
D src/southbridge/amd/agesa/hudson/imc.h
D src/southbridge/amd/agesa/hudson/lpc.c
D src/southbridge/amd/agesa/hudson/pci.c
D src/southbridge/amd/agesa/hudson/pci_devs.h
D src/southbridge/amd/agesa/hudson/pcie.c
D src/southbridge/amd/agesa/hudson/ramtop.c
D src/southbridge/amd/agesa/hudson/reset.c
D src/southbridge/amd/agesa/hudson/resume.c
D src/southbridge/amd/agesa/hudson/sata.c
D src/southbridge/amd/agesa/hudson/sd.c
D src/southbridge/amd/agesa/hudson/sm.c
D src/southbridge/amd/agesa/hudson/smbus.c
D src/southbridge/amd/agesa/hudson/smbus.h
D src/southbridge/amd/agesa/hudson/smbus_spd.c
D src/southbridge/amd/agesa/hudson/smi.c
D src/southbridge/amd/agesa/hudson/smi.h
D src/southbridge/amd/agesa/hudson/smi_util.c
D src/southbridge/amd/agesa/hudson/smihandler.c
D src/southbridge/amd/agesa/hudson/spi.c
D src/southbridge/amd/agesa/hudson/usb.c
D src/southbridge/amd/cimx/Kconfig
D src/southbridge/amd/cimx/Makefile.inc
D src/southbridge/amd/cimx/sb800/Amd.h
D src/southbridge/amd/cimx/sb800/AmdSbLib.h
D src/southbridge/amd/cimx/sb800/Kconfig
D src/southbridge/amd/cimx/sb800/Makefile.inc
D src/southbridge/amd/cimx/sb800/SBPLATFORM.h
D src/southbridge/amd/cimx/sb800/acpi/audio.asl
D src/southbridge/amd/cimx/sb800/acpi/fch.asl
D src/southbridge/amd/cimx/sb800/acpi/lpc.asl
D src/southbridge/amd/cimx/sb800/acpi/misc_io.asl
D src/southbridge/amd/cimx/sb800/acpi/pcie.asl
D src/southbridge/amd/cimx/sb800/acpi/smbus.asl
D src/southbridge/amd/cimx/sb800/acpi/usb.asl
D src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h
D src/southbridge/amd/cimx/sb800/amd_pci_int_types.h
D src/southbridge/amd/cimx/sb800/bootblock.c
D src/southbridge/amd/cimx/sb800/cfg.c
D src/southbridge/amd/cimx/sb800/cfg.h
D src/southbridge/amd/cimx/sb800/chip.h
D src/southbridge/amd/cimx/sb800/early.c
D src/southbridge/amd/cimx/sb800/fadt.c
D src/southbridge/amd/cimx/sb800/fan.c
D src/southbridge/amd/cimx/sb800/fan.h
D src/southbridge/amd/cimx/sb800/gpio_oem.h
D src/southbridge/amd/cimx/sb800/late.c
D src/southbridge/amd/cimx/sb800/lpc.c
D src/southbridge/amd/cimx/sb800/lpc.h
D src/southbridge/amd/cimx/sb800/pci_devs.h
D src/southbridge/amd/cimx/sb800/ramtop.c
D src/southbridge/amd/cimx/sb800/reset.c
D src/southbridge/amd/cimx/sb800/sb_cimx.h
D src/southbridge/amd/cimx/sb800/smbus.c
D src/southbridge/amd/cimx/sb800/smbus.h
D src/southbridge/amd/cimx/sb800/smbus_spd.c
D src/southbridge/amd/cimx/sb800/smbus_spd.h
D src/southbridge/amd/cimx/sb800/spi.c
M src/southbridge/amd/common/Makefile.inc
M src/vendorcode/amd/Makefile.inc
D src/vendorcode/amd/cimx/Makefile.inc
D src/vendorcode/amd/cimx/sb800/ACPILIB.c
D src/vendorcode/amd/cimx/sb800/ACPILIB.h
D src/vendorcode/amd/cimx/sb800/AMDLIB.c
D src/vendorcode/amd/cimx/sb800/AMDSBLIB.c
D src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
D src/vendorcode/amd/cimx/sb800/AZALIA.c
D src/vendorcode/amd/cimx/sb800/DISPATCHER.c
D src/vendorcode/amd/cimx/sb800/EC.c
D src/vendorcode/amd/cimx/sb800/ECLIB.c
D src/vendorcode/amd/cimx/sb800/ECfan.h
D src/vendorcode/amd/cimx/sb800/ECfanLIB.c
D src/vendorcode/amd/cimx/sb800/ECfanc.c
D src/vendorcode/amd/cimx/sb800/GEC.c
D src/vendorcode/amd/cimx/sb800/Gpp.c
D src/vendorcode/amd/cimx/sb800/IOLIB.c
D src/vendorcode/amd/cimx/sb800/LEGACY.c
D src/vendorcode/amd/cimx/sb800/MEMLIB.c
D src/vendorcode/amd/cimx/sb800/Makefile.inc
D src/vendorcode/amd/cimx/sb800/OEM.h
D src/vendorcode/amd/cimx/sb800/PCILIB.c
D src/vendorcode/amd/cimx/sb800/PMIO2LIB.c
D src/vendorcode/amd/cimx/sb800/PMIOLIB.c
D src/vendorcode/amd/cimx/sb800/SATA.c
D src/vendorcode/amd/cimx/sb800/SB800.h
D src/vendorcode/amd/cimx/sb800/SBCMN.c
D src/vendorcode/amd/cimx/sb800/SBDEF.h
D src/vendorcode/amd/cimx/sb800/SBMAIN.c
D src/vendorcode/amd/cimx/sb800/SBPELIB.c
D src/vendorcode/amd/cimx/sb800/SBPort.c
D src/vendorcode/amd/cimx/sb800/SBSUBFUN.h
D src/vendorcode/amd/cimx/sb800/SBTYPE.h
D src/vendorcode/amd/cimx/sb800/SMM.c
D src/vendorcode/amd/cimx/sb800/SbModInf.c
D src/vendorcode/amd/cimx/sb800/USB.c
118 files changed, 12 insertions(+), 19,185 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/69120/7
--
To view, visit https://review.coreboot.org/c/coreboot/+/69120
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I60afbde6ead70f0c887866fc351b4a6a15a89287
Gerrit-Change-Number: 69120
Gerrit-PatchSet: 7
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newpatchset