coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: soc: Use a more qualified path for "../../chip.h"
by Elyes Haouas (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Hung-Te Lin, Jeff Daly, Jonathan Zhang, Julius Werner, Arthur Heymans, Nico Huber, Sean Rhodes, Tarun Tuli, Subrata Banik, Johnny Lin, Christian Walter, Kapil Porwal, Vanessa Eusebio, Lean Sheng Tan, Werner Zeh, Tim Chu. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69061 ) Change subject: soc: Use a more qualified path for "../../chip.h" ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/xeon_sp/include/soc/soc_chip.h: https://review.coreboot.org/c/coreboot/+/69061/comment/8ae54d1d_4fba7160 PS2, Line 6: ../chip.h > this refer to what ? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69061 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e73e3599e65b82b70c33947683198778c1b3491 Gerrit-Change-Number: 69061 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 12:34:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Remove unused 'soc_chip.h' file
by Elyes Haouas (Code Review) 04 Nov '22

04 Nov '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69207 ) Change subject: soc/intel/xeon_sp: Remove unused 'soc_chip.h' file ...................................................................... soc/intel/xeon_sp: Remove unused 'soc_chip.h' file Change-Id: Icb968972bf55f4792ae71255aac4b87e36e395b7 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- D src/soc/intel/xeon_sp/include/soc/soc_chip.h 1 file changed, 10 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/69207/1 diff --git a/src/soc/intel/xeon_sp/include/soc/soc_chip.h b/src/soc/intel/xeon_sp/include/soc/soc_chip.h deleted file mode 100644 index 3113ead..0000000 --- a/src/soc/intel/xeon_sp/include/soc/soc_chip.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _SOC_XEON_SP_SOC_CHIP_H_ -#define _SOC_XEON_SP_SOC_CHIP_H_ - -#include "../chip.h" - -#endif /* _SOC_XEON_SP_SOC_CHIP_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/69207 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb968972bf55f4792ae71255aac4b87e36e395b7 Gerrit-Change-Number: 69207 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: cpu/x86: Add function to get logical CPU number based on lapicid
by Subrata Banik (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Tarun Tuli, Tim Wawrzynczak, Arthur Heymans, Shuming Chu (Shuming), TangYiwei. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64343 ) Change subject: cpu/x86: Add function to get logical CPU number based on lapicid ...................................................................... Patch Set 13: (1 comment) File src/include/cpu/cpu.h: https://review.coreboot.org/c/coreboot/+/64343/comment/84964146_bd2aeaba PS13, Line 12: 0 nit: just specify -1 may be enough here rather saying < 0 -- To view, visit https://review.coreboot.org/c/coreboot/+/64343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67caba8270bc385f64ad5b3f0f287cb77486f2c2 Gerrit-Change-Number: 64343 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: TangYiwei Gerrit-Comment-Date: Fri, 04 Nov 2022 12:08:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: UPSTREAM: security/vboot: Fix different size operands in bitwise oper...
by Shahina Shaik (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: V Sowmya, Shahina Shaik, Haribalaraman Ramasubramanian, Rizwan Qureshi, Sridhar Siricilla, Julius Werner, Balaji Manigandan, Yu-Ping Wu. Shahina Shaik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69221 ) Change subject: UPSTREAM: security/vboot: Fix different size operands in bitwise operation ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69221 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifecd5de843bd0229c0cab758d4a641889b4bffd6 Gerrit-Change-Number: 69221 Gerrit-PatchSet: 1 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shahina Shaik <shahina.shaik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 12:08:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: UPSTREAM: cbfstool: Fix possible memory leak
by Shahina Shaik (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: V Sowmya, Shahina Shaik, Haribalaraman Ramasubramanian, Rizwan Qureshi, Sridhar Siricilla, Balaji Manigandan. Shahina Shaik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69220 ) Change subject: UPSTREAM: cbfstool: Fix possible memory leak ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Gerrit-Change-Number: 69220 Gerrit-PatchSet: 1 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shahina Shaik <shahina.shaik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 12:06:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: UPSTREAM: security/vboot: Fix different size operands in bitwise oper...
by Shahina Shaik (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Julius Werner, Yu-Ping Wu. Shahina Shaik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69221 ) Change subject: UPSTREAM: security/vboot: Fix different size operands in bitwise operation ...................................................................... UPSTREAM: security/vboot: Fix different size operands in bitwise operation Handle operands of different size in bitwise operation Foundby=klocwork BUG=NONE TEST=Boot to OS on Nivviks Change-Id: Ifecd5de843bd0229c0cab758d4a641889b4bffd6 Signed-off-by: Shaik Shahina <shahina.shaik(a)intel.com> --- M src/security/vboot/vboot_common.c 1 file changed, 19 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/69221/1 diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c index c557f25..1577f75 100644 --- a/src/security/vboot/vboot_common.c +++ b/src/security/vboot/vboot_common.c @@ -15,20 +15,20 @@ (CONFIG(VBOOT_MOCK_SECDATA) || tlcl_lib_init() == VB2_SUCCESS)) { printk(BIOS_INFO, "Saving secdata firmware\n"); antirollback_write_space_firmware(ctx); - ctx->flags &= ~VB2_CONTEXT_SECDATA_FIRMWARE_CHANGED; + ctx->flags &= (uint64_t)(~VB2_CONTEXT_SECDATA_FIRMWARE_CHANGED); } if (ctx->flags & VB2_CONTEXT_SECDATA_KERNEL_CHANGED && (CONFIG(VBOOT_MOCK_SECDATA) || tlcl_lib_init() == VB2_SUCCESS)) { printk(BIOS_INFO, "Saving secdata kernel\n"); antirollback_write_space_kernel(ctx); - ctx->flags &= ~VB2_CONTEXT_SECDATA_KERNEL_CHANGED; + ctx->flags &= (uint64_t)(~VB2_CONTEXT_SECDATA_KERNEL_CHANGED); } if (ctx->flags & VB2_CONTEXT_NVDATA_CHANGED) { printk(BIOS_INFO, "Saving nvdata\n"); save_vbnv(ctx->nvdata); - ctx->flags &= ~VB2_CONTEXT_NVDATA_CHANGED; + ctx->flags &= (uint64_t)(~VB2_CONTEXT_NVDATA_CHANGED); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/69221 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifecd5de843bd0229c0cab758d4a641889b4bffd6 Gerrit-Change-Number: 69221 Gerrit-PatchSet: 1 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: UPSTREAM: cbfstool: Fix possible memory leak
by Shahina Shaik (Code Review) 04 Nov '22

04 Nov '22

Shahina Shaik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69220 ) Change subject: UPSTREAM: cbfstool: Fix possible memory leak ...................................................................... UPSTREAM: cbfstool: Fix possible memory leak Handle the possible memory leak scenario. Foundby=klocwork BUG=NONE TEST=Boot to OS on Nivviks Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Signed-off-by: Shaik Shahina <shahina.shaik(a)intel.com> --- M util/cbfstool/cbfstool.c M util/cbfstool/common.c 2 files changed, 21 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/69220/1 diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 04b91e5..a41bb27 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -771,7 +771,7 @@ if (param.topswap_size) { if (update_master_header_loc_topswap(&image, h_loc, header_offset)) - return 1; + goto done; } ret = maybe_update_metadata_hash(&image); diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c index 8ae9120..52fad1c 100644 --- a/util/cbfstool/common.c +++ b/util/cbfstool/common.c @@ -34,6 +34,10 @@ if (!buffer->data) { fprintf(stderr, "buffer_create: Insufficient memory (0x%zx).\n", size); + if (buffer->name) { + free(buffer->name); + buffer->name = NULL; + } } return (buffer->data == NULL); } -- To view, visit https://review.coreboot.org/c/coreboot/+/69220 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01c4643d1e671d9bd9971ac6db8031634fffd61e Gerrit-Change-Number: 69220 Gerrit-PatchSet: 1 Gerrit-Owner: Shahina Shaik <shahina.shaik(a)intel.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/nissa/var/craask: Add temp_sensor_3 settings
by Tyler Wang (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: V Sowmya, Tarun Tuli, Kangheui Won, Reka Norman, Sumeet R Pawnikar, Nick Vaccaro, Peter Ou. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69197 ) Change subject: mb/google/nissa/var/craask: Add temp_sensor_3 settings ...................................................................... Patch Set 5: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/69197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I026a8b3e1a27bedc3e0082e15e80a74a2f8adfda Gerrit-Change-Number: 69197 Gerrit-PatchSet: 5 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cathy Chen <cathy_chen(a)quanta.corp-partner.google.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 11:34:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Fix fw_config probe for UFC and WFC
by 9elements QA (Code Review) 04 Nov '22

04 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69152 ) Change subject: mb/google/rex: Fix fw_config probe for UFC and WFC ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133705 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133704 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133703 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133702 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133701 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133700 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133699 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133698 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133697 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133696 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133695 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133694 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133693 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133692 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133691 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133690 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69152 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5103e7da04004414d96f42057c105cf9fbf51b25 Gerrit-Change-Number: 69152 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 11:22:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/cbmem: Update formatting for cbmem -l command
by 9elements QA (Code Review) 04 Nov '22

04 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68644 ) Change subject: util/cbmem: Update formatting for cbmem -l command ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133688 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133687 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133686 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133685 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133684 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133683 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133682 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133681 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133680 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133679 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133678 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133677 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133676 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133675 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133674 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133673 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68644 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d91d21c6ad418d9fee9880550fb6cb9e41e93f0 Gerrit-Change-Number: 68644 Gerrit-PatchSet: 4 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 11:17:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2022